Claims
- 1. An information reproduction apparatus, comprising:
- read means for reading information signals from an information recording medium from a data read start time to a data read completion time;
- memory means for storing said information signals read from the recording medium by said read means, said memory means having a memory capacity expressible as a numerical quantity; and
- control means, including a reference clock generator means for generating a first predetermined frequency signal and a second predetermined frequency signal, for controlling (i) said read means to read said information signals from the recording medium at a first read speed determined by said first predetermined frequency signal, (ii) said memory means to store said information signals at said first read speed during a time in which said read means reads said information signals at said first read speed and to determine when a predetermined percentage of said memory capacity is filled, (iii) said read means to read said information signals from the recording medium at a second read speed which is lower than said first read speed and which is determined by said second predetermined frequency signal after said predetermined percentage of said memory capacity has been filled, and (iv) said memory means to store said information signals at said second read speed after said predetermined percentage of said memory capacity has been filled and to output said information signals stored in said memory means so that a data output completion time of said memory means occurs after said data read completion time, whereby information signals are still being output from said memory means after completion of reading of said information signals from the recording medium by said read means.
- 2. An information reproduction apparatus according to claim 1, wherein said control means further comprises means for controlling (a) said memory means to determine when a predetermined intermediate percentage of said memory capacity is filled, said predetermined intermediate percentage being less than said predetermined percentage, (b) said read means to read said information signals from the recording medium at an intermediate read speed which is between said first read speed and said second read speed during an intermediate time period between a time when said predetermined intermediate percentage has been filled and a time when said predetermined percentage has been filled, and (c) said memory means to store said information signals at said intermediate read speed during said intermediate time period.
- 3. An information reproduction apparatus according to claim 2, wherein said control means further comprises means for controlling (I) said memory means to determine when a predetermined second intermediate percentage of said memory capacity is filled, said predetermined second intermediate percentage being greater than said predetermined intermediate percentage and less than said predetermined percentage, (II) said read means to read said information signals from the recording medium at a second intermediate read speed which is between said intermediate read speed and said second read speed during a second intermediate time period between a time when said predetermined second intermediate percentage has been filled and a time when said predetermined percentage has been filled and a time when said predetermined percentage has been filled, and (III) said memory means to store said information signals at said second intermediate read speed during said second intermediate time period.
- 4. An information reproduction apparatus, comprising:
- read means for reading information signals from an information recording medium from a data read start time to a data read completion time;
- signal processor means in communication with said read means for demodulating and error correcting said information signals read from said read means;
- FIFO memory means in communication with said signal processor means for storing said information signals demodulated and error corrected by said signal processor means and for outputting said information signals demodulated and error corrected by said signal processor means on a first in, first out basis; and
- control means, including a reference clock generator means for generating a first predetermined frequency signal and a second predetermined frequency signal, for controlling (i) said read means to read said information signals from the recording medium at a first read speed determined by said first predetermined frequency signal during a first time period from said data read start time to a FIFO-filled time at which a capacity of said FIFO memory means is filled, (ii) said signal processor means during said first time period to demodulate and to error correct said information signals at said first read speed, (iii) said FIFO memory means to store at said first read speed said information signals demodulated and error corrected by said signal processor means in operation (ii) above, (iv) said read means to read said information signals from the recording medium at a second read speed which is lower than said first read speed and which is determined by said second predetermined frequency signal during a second time period from said FIFO-filled time to a data output completion time at which output of information signals stored in said FIFO memory means is completed, (v) said signal processor means during said second time period to demodulate and to error correct said information signals at said second read speed, and (vi) said FIFO memory means to store at said second read speed said information signals demodulated and error corrected by said signal processor means in operation (v) above, said data read completion time occurring before said data output completion time, said control means controlling output of said information signals stored in said FIFO memory means from a data output start time at which said FIFO memory means starts to output said information signals stored in said FIFO memory means to said data output completion time, whereby information signals are still being output from said FIFO memory means after completion of reading of said information signals from the recording medium by said read means.
- 5. An information reproduction apparatus according to claim 4, wherein said control means controls said signal processor means to output said demodulated and error corrected information signals to said FIFO memory means substantially without a time delay while said signal processor means demodulates and error corrects said information signals.
- 6. An information reproduction apparatus according to claim 4, wherein said control means controls said signal processor means to introduce a time delay between an operation of demodulating and error correcting said information signals and an operation of outputting said demodulated and error corrected signals to said FIFO memory means.
- 7. An information reproduction apparatus according to claim 4, further comprising buffer memory means in communication with said signal processor means for buffering said information signals during an operation of demodulating and error correcting of said information signals by said signal processor means.
- 8. An information reproduction apparatus according to claim 4, wherein said control means controls a speed at which said information signals are output from said FIFO memory means so as to be lower than said first read speed.
- 9. An information reproduction apparatus, comprising:
- read means for reading information signals from an information recording medium from a data read start time to a data read completion time;
- signal processor means in communication with said read means for demodulating and error correcting said information signals read from said read means;
- FIFO memory means in communication with said signal processor means for storing data of said information signals demodulated and error corrected by said signal processor means, and for outputting the data of said information signals on a first in, first out basis; and
- control means, including a reference clock generator means for generating a first predetermined frequency signal and a second predetermined frequency signal, for controlling (i) said read means to read said information signals from the recording medium at a read speed determined by said first predetermined frequency signal during a read/store time period from said data read start time to said data read completion time, wherein said data read completion time may occur before or at a time at which a capacity of said FIFO memory means is filled, (ii) said signal processor means during said first time period to demodulate and to error correct said information signals at said read speed, (iii) said FIFO memory means to store at said read speed data of said information signals demodulated and error corrected by said signal processor means in operation (ii) above, (iv) said FIFO memory means to output the stored data of said information signals at a reproduction speed determined by said second predetermined frequency signal and lower than said read speed from a data output start time of said FIFO memory means to said data output completion time, whereby information signals are still being output from said FIFO memory means after completion of reading of said information signals from the recording medium by said read means.
Priority Claims (1)
Number |
Date |
Country |
Kind |
1-170201 |
Jun 1989 |
JPX |
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Parent Case Info
This is a continuation-in-part of Ser. No. 07/543,543 filed Jun. 26, 1990, the entire subject matter of which is expressly incorporated by reference herein.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
4603412 |
Yamazaki et al. |
Jul 1986 |
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4796247 |
Vogelsang |
Jan 1989 |
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Foreign Referenced Citations (1)
Number |
Date |
Country |
2-15456 |
Jan 1990 |
JPX |
Continuation in Parts (1)
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Number |
Date |
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Parent |
543543 |
Jun 1990 |
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