The present application relates to a digital signal processor which suppresses transient changes in a digital signal.
In a digital signal processor, an analog signal is converted to a digital signal by an AD (Analog to Digital) converter, and digital signal processing is performed on the digital signal, whereby, for example, a received waveform distorted in a transmission line can be compensated in a digital region. The digital signal processor is used in various technical fields, such as image processing, sound processing, wireless communication, and optical communication.
When performing the digital signal processing, if transient changes, such as pulse noise, occur in the digital signal during the digital signal processing, errors in the digital signal processing increase and the quality of an output signal is deteriorated. However, the influence of the transient change components on the digital signal processing can be reduced by, for example, averaging processing of the digital signal using a low pass filter.
For example, in a digital coherent receiver in an optical communication field, in order to reduce the influence of the transient changes, there is a method which, when performing equalization processing on a received waveform using a FIR (Finite Impulse Response) filter, increases the number of taps of FIR filters. Alternatively, there is a method which estimates the phase shift from the phase point of the phase modulation signal using an M-power algorithm, and when removing the phase shift, increases the cumulative number of signals (the number of taps) of the M-power algorithm.
Here, a digital coherent receiver which uses a coherent optical communication technique and a digital signal processing technique in combination will be described.
In
The digital signal processor 230 has an equalizer 231, a phase shift compensator 232, and a demodulator 233. The equalizer 231 equalizes waveform distortion of the input digital signal, and the phase shift of the waveform-equalized digital signal is compensated by the phase shift compensator 232. The demodulator 233 outputs the phase shift-compensated digital signal output from the phase shift compensator 232 as a symbol string. In this way, since the correction of the waveform distortion can be performed with a simple configuration, a large-capacity and high-speed transmission system can be realized.
The phase shift compensator 232 can estimate and correct the phase shift using, for example, the M-power algorithm (Non-Patent Document 2). Since the estimation range of the phase shift in the M-power algorithm is limited within the range of ±π/4 from a reference point for a QPSK (Quadrature Phase Shift Keying) signal, a phase shift outside the range cannot be estimated. A phenomenon in which the time continuity of the phase shift estimation values is not maintained is called a “cycle slip”, and signal quality is deteriorated. For example, when transient changes like pulse noise occur in the digital signal, time continuity is not maintained due to the error expansion of the digital signal processing, and as shown in
As a countermeasure against the cycle slip, a method which performs logical differential coding on a transmission signal to prevent the propagation of the influence, or the like is used (Non-Patent Document 3). However, bit errors at the moment when the cycle slip occurs cannot be prevented. When one bit error occurs in differentially coded data, since the bit error is subjected to differential decoding as continuous two bit errors, transmission quality is deteriorated.
Non-Patent Document 1: S. J. Savory, “Digital filters for coherent optical receivers” Optics Express, vol. 16, no. 2, pp. 804-814, 2008
Non-Patent Document 2: S. Tsukamoto, Y. Ishikawa, and K. Kikuchi, “Optical Homodyne Receiver Comprising Phase and Polarization Diversities with Digital Signal Processing” Proc. ECOC, 2006
Non-Patent Document 3: T. Mizuochi, Y. Miyata, K. Kubo, T. Sugihara, K. Onohara and H. Yoshida, “Progress in Soft-Decision FEC” OSA/OFC/NFOEC, NWC2, 2011
While it is possible to cope with the transient changes of the digital signal, such as the phase shift from the phase point of the phase modulation signal, by performing averaging of the digital signal, averaging causes an increase in delay amount during signal processing, degradation of followability, or the like.
A proposition of the present application is to provide a digital signal processor capable of suppressing transient changes of a digital signal by performing statistical analysis of the digital signal without increasing the number of times of averaging during digital signal processing.
The present application provides a digital signal processor which performs digital signal processing of a digital signal, the digital signal processor including a statistical analysis method calculating a moving average and a standard deviation from the digital signal, performing statistical decision deciding whether or not the digital signal is within a predetermined range obtained from the moving average and the standard deviation, and correcting the digital signal outside the range to be within the range.
In the digital signal processor of the present application, the statistical analysis method includes a moving average calculation block which inputs the digital signal and outputs the moving average, a standard deviation calculation block which inputs the digital signal and the moving average output from the moving average calculation block and outputs the standard deviation, and a statistical decision/signal correction block which inputs the digital signal, the moving average, and the standard deviation, corrects the digital signal by the statistical decision for the digital signal, and outputs the digital signal being corrected.
In the digital signal processor of the present application, when n is an integer equal to or greater than 3 and L is an integer equal to or greater than 2, the moving average calculation block inputs digital signals of L points in total from an (n−L)th digital signal S(n−L) to an (n−1)th digital signal S(n−1) and outputs a moving average A(n−1); the standard deviation calculation block inputs the digital signals of the L points to the (n−1)th digital signal and the moving average A(n−1) output from the moving average calculation block and outputs a standard deviation σ(n−1); and the statistical decision/signal correction block inputs an n−th digital signal S(n), the moving average A(n−1) output from the moving average calculator, and the standard deviation σ(n−1) output from the standard deviation calculation block, performs the statistical decision deciding, with an arbitrary positive number as x, whether or not the digital signal S(n) is within a range of:
A(n−1)−xσ(n−1)≦S(n)≦A(n−1)+xσ(n−1)
outputs the digital signal S(n) as it is when the digital signal S(n) is within the range, and corrects the digital signal S(n) to be within the range when the digital signal S(n) is outside the range and outputs the corrected digital signal S(n).
The present application corrects a digital signal by statistical decision for the digital signal during digital signal processing, thereby suppressing transient changes of the digital signal and improving stability of the digital signal processing.
In
The digital signal processor 230 of the present embodiment has a feature in which a statistical analysis method 234 is connected to the phase shift compensator 232, thereby suppressing transient changes of a digital signal, such as the phase shift from the phase point of the phase modulation signal, and securing time continuity of the phase modulation signal. That is, a digital signal which exhibit a phase shift output from the phase shift compensator 232 are input to the statistical analysis method 234, and the statistical analysis method 234 returns the digital signal with the uncorrected or corrected phase shift by statistical analysis processing described below to the phase shift compensator 232. The phase shift compensator 232 compensates for the phase shift of the digital signal input from the equalizer 231 using the digital signal with the uncorrected or corrected phase shift input from the statistical analysis method 234 and outputs the compensated digital signal to the demodulator 233.
In
The moving average calculation block 11 inputs digital signals of L points in total from an (n−L)th digital signal S(n−L) to an (n−1)th digital signal S(n−1) when n is an integer equal to or greater than 3 and L is an integer equal to or greater than 2, and calculates a moving average A(n−1).
The standard deviation calculation block 12 inputs the digital signals of the L points from the (n−L)th digital signal to the (n−1)th digital signal and the moving average A(n−1) output from the moving average calculation block 11 and calculates a standard deviation σ(n−1).
The statistical decision/signal correction block 13 inputs the n−th digital signal S(n), the moving average A(n−1) output from the moving average calculation block 11, and the standard deviation σ(n−1) output from the standard deviation calculation block 12, performs the statistical decision deciding, with an arbitrary positive number as x, whether or not the digital signal S(n) is within a range of:
A(n−1)−xσ(n−1)≦S(n)A(n−1)+xσ(n−1)
outputs the phase shift of the digital signal S(n) as it is when the digital signal S(n) is within the range, and corrects the phase shift of the digital signal S(n) to be within the range and outputs the corrected phase shift of the digital signal S(n) when the digital signal S(n) is outside the range.
Here, when x=2, the above-described range is:
A(n−1)−2σ(n−1)≦S(n)≦A(n−1)+2σ(n−1)
For example, when the digital signal S(n) is smaller than A(n−1)−2σ(n−1), it is corrected to:
S(n)=A(n−1)−2σ(n−1)
and when the digital signal S(n) is greater than A(n−1)+2σ(n−1), it is corrected to:
S(n)=A(n−1)+2σ(n−1)
With this, it is possible to remove the transient changes of the digital signal.
A moving average A(m) and a standard deviation σ(m) of the digital signals of the L points to the m-th digital signal can be respectively calculated by the following expressions.
A point B of
In
The present invention can be applied to various kinds of digital signal processing for a time-varying digital signal as well as the time-varying phase shift in the phase shift compensator 232 of the digital signal processor 230 of the digital coherent receiver 200 shown in
10: statistical analysis method
11: moving average calculation block
12: standard deviation calculation block
13: statistical decision/signal correction block
100: transmitter
200: digital coherent receiver
210: coherent receiver
220: AD converter
230: digital signal processor
231: equalizer
232: phase shift compensator
233: demodulator
234: statistical analysis method
301: optical local oscillator
Number | Date | Country | Kind |
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2012-195209 | Sep 2012 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2013/004398 | 7/18/2013 | WO | 00 |