1. Field of the Invention
The present invention relates generally to the field of digital signal processing and more particularly to a method and apparatus for generating a DSP clock signal which always tracks the fundamental frequency of an input analog signal.
2. Background Art
Traditionally, digital signal processors employ a clock running at a constant frequency. However, there are circumstances where it would be preferable to employ a clock frequency which is always a constant integer multiple of the fundamental frequency of the input analog signal. By way of example, a music synthesizer which employs DSP to modify each harmonic component of a monophonic analog signal would benefit from always having a clock frequency which is a constant integer multiple of the fundamental frequency of the input analog signal.
This invention relates to situations in which Digital Signal Processing (DSP) is performed on analog signals which have been digitized using an A/D converter. Usually, DSP employs a clock which runs at a constant frequency, often the same rate as the sample rate of the A/D converter. In this manner, for example, filters can be easily designed to attenuate the input signal in certain fixed frequency bands. High-pass and low-pass filters are two-well-known examples of this application.
This invention applies in situations where the analog signal exhibits certain characteristics in which a fixed clock frequency is not desired, but rather what is needed is a clock which tracks the fundamental frequency of the analog signal, for example, a signal from a monophonic musical instrument (any instrument which cannot play multiple notes together) or a polyphonic instrument being played “one note at a time”. This invention relates to a method and apparatus for clocking the DSP at a frequency which is always a constant integer multiple of the fundamental frequency of the input analog signal.
One example of a DSP application where it is highly advantageous to use a clock frequency which tracks the fundamental frequency of the input analog signal, is disclosed in co-pending patent application Ser. No. ______ filed on even date herewith and entitled FREQUENCY-TRACKED SYNTHESIZER EMPLOYING SELECTIVE HARMONIC AMPLIFICATION.
The various embodiments, features and advances of the present invention will be understood more completely hereinafter as a result of a detailed description thereof in which reference will be made to the following drawings:
Further, the frequency-multiplying circuit necessary for generating the clock for the A/D converter and DSP may be an analog Phase-Locked Loop (PLL), shown in
A “threshold monitor” circuit shown in
The PLL, shown in
Having thus disclosed a preferred embodiment of the present invention, it will now be seen that there may be various alternative ways for carrying out the invention, as well as certain modifications that could be made to the described embodiment while still realizing the advantageous features and benefits thereof. Therefore, the scope of protection sought herein should not necessarily be deemed to be limited by the disclosed embodiment. The invention hereof should be deemed to be defined only by the appended claims and their equivalents.