Claims
- 1. An apparatus comprising:
a media for carrying high speed digital data from a high speed digital data transmitter to a high speed digital data receiver; a subchannel transmitter having an output coupled to said media and having an input for receiving subchannel data which is separate from and at a much lower baud rate than said high speed digital data and including a modulator which modulates such subchannel data onto a host signal for propagation across said media; a subchannel receiver having an input coupled to said media through a means for passing the frequency components of the subchannel data spectrum but not passing the frequency components of the high speed data spectrum, and having an amplifier that amplifies the output of said low pass filter and having a mixer and local oscillator that combine to mix the frequencies output by said amplifier down to an intermediate frequency, and having a bandpass filter for filtering the intermediate frequency signal using a passband which is approximately centered on said intermediate frequency and which has a bandwidth which is wide enough to encompass enough of the frequency components of the subchannel data spectrum and exclude enough of the frequency components of the high speed data signal to provide adequate sensitivity and selectivity of said subchannel receiver to detect said subchannel data signal despite manufacture lot variations in the rise times of said high speed data signals, and having one or more detectors to detect the subchannel data.
- 2. The apparatus of claim 1 wherein said subchannel transmitter comprises:
a clock generating a clock signal that has a frequency 48*FC, where FC is the desired subchannel carrier frequency; a divide-by-48 counter having an input for receiving said clock signal and having a count-up-by-two input for receiving a signal, which when activated, causes the counter to count up by two on the next clock pulse, and having a skip-a-count input for receiving a signal that causes said counter to skip a count on the next clock pulse; a divide-by-40 counter having a clock input coupled to receive said clock signal and having a count output; a first AND gate having a first input coupled to receive said subchannel data and having a second input coupled to said output of said divide-by-40 counter and having an output coupled to said count-up-by two input; an inverter having an input coupled to receive said subchannel data and having an output; a second AND gate having a first input coupled to said output of said inverter and having a second input coupled to said output of said divide-by-40 counter and having an output coupled to said skip-a-count input; and a bandpass filter or lowpass filter coupled to filter the output of said divide-by-48 counter with a passband selected to pass the subchannel carrier fundamental but reject most of the spurious frequency components caused by the irregular waveform output by said divide-by-48 counter and to reject the third harmonic of the subchannel carrier and to round off the edges of the square wave signal so as to not cause excessively fast jumps in the zero crossing times of said high speed data signal caused by said subchannel modulation.
- 3. The apparatus of claim 2 further comprising a variable attenuator coupled to attenuate the amplitude of the output signal from said divide-by-48 counter by a selectable amount prior to filtering.
- 4. The apparatus of claim 2 wherein said subchannel receiver comprises:
a low pass filter coupled to said media and having a transfer function defining a passband which provides a high impedance to the majority of the frequency components above the subchannel carrier frequency but a relatively low impedance to the frequency components of the modulated subchannel signal; a first amplifier coupled to receive the output signal from said low pass filter; an analog-to-digital converter having an input for receiving a signal to be converted to digital samples, and having an output at which said digital samples appear, said input having a parasitic capacitive load coupled thereto; a two-pole active low pass filter and amplifier circuit coupled to receive the output of said first amplifier and having a transfer function suitable for performing an anti-aliasing function to eliminate or suppress the third and fifth harmonics of said subchannel carrier frequency, and functioning to buffer and amplify the signal from said first amplifier so as to drive said input including the parasitic capacitance load of said input of said analog-to-digital converter to voltages which cover substantially all the full dynamic range of said converter; a mixer coupled to receive said samples and having an input for data that defines a quadrature local oscillator signal having the subchannel carrier frequency; a local oscillator for transmitting to said local oscillator input of said mixer digital data defining a quadrature local oscillator signal at the frequency of said subchannel carrier; a digital bandpass filter with filter coefficients which establish a narrow passband which is substantially centered on said subchannel carrier frequency and with a bandwidth wide enough to pass enough frequency components of said subchannel data spectrum to allow adequate reception of said subchannel data and which rejects the majority of frequency components of said high speed data spectrum; means for detecting the relative amplitude of mark and space frequency signals in the output signal from said digital bandpass filter.
- 5. The apparatus of claim 4 further comprising a resampler circuit coupled to the output of said digital bandpass filter and having an output coupled to an input of said means for detecting the relative amplitude of mark and space frequencies.
- 6. A subchannel digital data communication system, comprising:
a media for carrying high speed digital data signals generated by a high speed data transmitter; transmitter means for receiving subchannel data and modulating it onto a host signal which propagates on said media; receiver means coupled to said media for recovering said subchannel data from said host signal.
- 7. The apparatus of claim 6 wherein said host signal is a subchannel carrier having a frequency in a portion of the spectrum of said high speed data where excessive interference from frequency components of said high speed data signals will not be experienced.
- 8. The apparatus of claim 7 wherein said high speed digital data signal is a D.C. balanced signal, and wherein said subchannel carrier is in the frequency from approximately 0.5 MHz to slightly above 1 MHz.
- 9. The apparatus of claim 8 wherein said transmitter means uses frequency shift keying to alter the frequency of said subchannel carrier between mark and space frequencies, and wherein said receiver means includes a digital filter in an intermediate frequency section having a passband centered on said subchannel carrier frequency and having a bandwidth just wide enough to simultaneously encompass most of the frequency components of said mark and space frequencies but relatively few of the frequency components of said high speed digital data signal.
- 10. A subchannel data transmitter, comprising:
a clock generating a clock signal that has a frequency 48*FC, where FC is the desired subchannel carrier frequency; a divide-by-48 counter having an input for receiving said clock signal and having a count-up-by-two input for receiving a signal, which when activated, causes the counter to count up by two on the next clock pulse, and having a skip-a-count input for receiving a signal that causes said counter to skip a count on the next clock pulse; a divide-by-40 counter having a clock input coupled to receive said clock signal and having a count output; a first AND gate having a first input coupled to receive said subchannel data and having a second input coupled to said output of said divide-by-40 counter and having an output coupled to said count-up-by two input; an inverter having an input coupled to receive said subchannel data and having an output; a second AND gate having a first input coupled to said output of said inverter and having a second input coupled to said output of said divide-by-40 counter and having an output coupled to said skip-a-count input; and a bandpass filter or lowpass filter coupled to filter the output of said divide-by-48 counter with a passband selected to pass the subchannel carrier fundamental but reject most of the spurious frequency components caused by the irregular waveform output by said divide-by-48 counter and to reject the third harmonic of the subchannel carrier and to round off the edges of the square wave signal so as to not cause excessively fast jumps in the zero crossing times of said high speed data signal caused by said subchannel modulation.
- 11. The apparatus of claim 10 further comprising a variable attenuator coupled to attenuate the amplitude of the output signal from said divide-by-48 counter by a selectable amount prior to filtering.
- 12. A subchannel data receiver, comprising:
a low pass filter coupled to said media and having a transfer function defining a passband which provides a high impedance to the majority of the frequency components above the subchannel carrier frequency but a relatively low impedance to the frequency components of the modulated subchannel signal; a first amplifier coupled to receive the output signal from said low pass filter; an analog-to-digital converter having an input for receiving a signal to be converted to digital samples, and having an output at which said digital samples appear, said input having a parasitic capacitive load coupled thereto; a two-pole active low pass filter and amplifier circuit coupled to receive the output of said first amplifier and having a transfer function suitable for performing an anti-aliasing function to eliminate or suppress the third and fifth harmonics of said subchannel carrier frequency, and functioning to buffer and amplify the signal from said first amplifier so as to drive said input including the parasitic capacitance load of said input of said analog-to-digital converter to voltages which cover substantially all the full dynamic range of said converter; a mixer coupled to receive said samples and having an input for data that defines a quadrature local oscillator signal having the subchannel carrier frequency; a local oscillator for transmitting to said local oscillator input of said mixer digital data defining a quadrature local oscillator signal at the frequency of said subchannel carrier; a digital bandpass filter with filter coefficients which establish a narrow passband which is substantially centered on said subchannel carrier frequency and with a bandwidth wide enough to pass enough frequency components of said subchannel data spectrum to allow adequate reception of said subchannel data and which rejects the majority of frequency components of said high speed data spectrum; means for detecting the relative amplitude of mark and space frequency signals in the output signal from said digital bandpass filter.
- 13. The apparatus of claim 12 further comprising a resampler circuit coupled to the output of said digital bandpass filter and having an output coupled to an input of said means for detecting the relative amplitude of mark and space frequencies.
- 14. A process for transmitting subchannel data bits on the same media through which a high speed data signal is transmitted, comprising:
receiving a plurality of subchannel data bits; modulating said subchannel data bits onto a host signal to create a spectrum of subchannel frequency components and transmitting said host signal through said media directly or by superposition of said host signal with said high speed data signal; recovering said subchannel data bits by filtering out most of the frequency components in the spectrum of said high speed data signal and passing the frequency components comprising said subchannel data through a bandpass filter with a passband approximately centered on the center frequency of said spectrum of subchannel frequency components and with a bandwidth which is just wide enough to pass most or all of the frequency components of said spectrum of subchannel frequency components while rejecting substantially all the frequency components in the spectrum of the high speed data which lie above and below the frequencies in the spectrum of the subchannel data thereby providing much more sensitive and selective detection by elimination of more noise attributable to the high speed data signal, and recovering the subchannel data bits by generating from the signal output by said bandpass filter one or more signals having characteristics which depend upon the subchannel data bits encoded into said host signal.
- 15. A process for transmitting subchannel data bits on the same media through which a D.C. balanced high speed data signal is transmitted, comprising:
receiving a plurality of subchannel data bits; frequency shift key modulating said subchannel data bits onto a subchannel carrier having a frequency in a range of frequencies on the skirt of said high speed data signal spectrum where the amplitudes of the high speed data signal frequency components are sufficiently lower than the amplitudes of the frequency components in the spectrum of subchannel frequency components to allow successful detection of the subchannel bits; superimposing the modulated subchannel carrier on said high speed data signal and transmitting the combined signal through said media; recovering said subchannel data bits by:
filtering out most of the frequency components in the spectrum of said high speed data signal; amplifying the remaining frequency components and passing them through an anti-aliasing filter; digitizing the output of said anti-aliasing filter; mixing the digital representation of the filtered signal output by the anti-aliasing filter with a digital quadrature representation of a local oscillator signal at the subchannel carrier frequency; passing the data output stream from said mixing process through a digital bandpass filter with a passband approximately centered on the center frequency of said spectrum of subchannel frequency components and with a bandwidth which is just wide enough to pass most or all of the frequency components of said spectrum of subchannel frequency components while rejecting substantially all the frequency components in the spectrum of the high speed data which lie above and below the frequencies in the spectrum of the subchannel data thereby providing much more sensitive and selective detection by elimination of more noise attributable to the high speed data signal, said digital bandpass filter also structured to resample the incoming sample stream to lower the sample rate by computing only one-of-N output samples; recovering the subchannel data bits by processing the output data from said digital bandpass filter in two separate mark and space detectors, each of which mixes the resampled data with a digital representation of a local oscillator signal at the deviation frequency FD used in said frequency shift keyed modulation to shift the subcarrier frequency to the mark or space frequency, said mark detector local oscillator signal being at −FD and said space detector local oscillator signal being at +FD, and, in each mark and space detector, filtering the resulting data from the mixing process through digital narrow bandwidth bandpass filters having passbands centered on the mark and space frequencies, respectively, and calculating an indicia of the relative amplitude of the signals represented by the data emerging from the bandpass filters in the mark and space detectors.
- 16. An apparatus comprising:
a media for carrying high speed digital data from a high speed digital data transmitter to a high speed digital data receiver; a subchannel transmitter having an output coupled to said media and including a UART with a variable baud rate and having an input for receiving subchannel data in parallel format and an input for receiving a baud rate control signal, for serializing said subchannel data and outputting said subchannel data as a serial bit stream at a programmable baud rate controlled by said baud rate control signal, and further comprising a modulator which modulates such serial bit stream of subchannel data received from said UART onto a host signal for propagation across said media; a subchannel receiver having an input coupled to said media through a low pass filter which provides a high impedance to the majority of the frequency components of the high speed data signal but a low impedance to the frequency components of the subchannel data spectrum and having an amplifier that amplifies the output of said low pass filter and having an analog-to-digital converter for converting the subchannel signal to a stream of digital samples and having a mixer and local oscillator that combine to digitally mix the frequencies output by said analog-to-digital converter down to an intermediate frequency, and having a digital bandpass filter for filtering the intermediate frequency signal using a passband which is approximately centered on said intermediate frequency and which has a bandwidth which is wide enough to encompass enough of the frequency components of the subchannel data spectrum and exclude enough of the frequency components of the high speed data signal to provide adequate sensitivity and selectivity of said subchannel receiver to detect said subchannel data signal despite manufacture lot variations in the rise times of said high speed data signals, said digital bandpass filter having a programmable bandwidth which is changed by changing filter coefficients such that said bandwidth corresponds to at least the minimum necessary bandwidth to reliably receive the subchannel data given the baud rate output by said UART, and having one or more detectors to detect the subchannel data.
- 17. A system for transmitting subchannel data, comprising:
a media; transmitter means for receiving subchannel data and modulating it onto a host signal which propagates on said media.
- 18. A system for transmitting subchannel data, comprising:
a media; receiver means coupled to said media for recovering said subchannel data from a host signal modulated with said subchannel data propagating on said media.
Parent Case Info
[0001] This is a continuation-in-part of prior U.S. patent application Ser. No. 09/063,633, filed Apr. 20, 1998 entitled SUBCHANNEL MODULATION SCHEME FOR CARRYING MANAGEMENT AND CONTROL DATA OUTSIDE THE REGULAR DATA CHANNEL, which is hereby incorporated by reference.
Continuations (1)
|
Number |
Date |
Country |
Parent |
09384496 |
Aug 1999 |
US |
Child |
10684873 |
Oct 2003 |
US |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09063633 |
Apr 1998 |
US |
Child |
09384496 |
Aug 1999 |
US |