As shown in
In
In this embodiment, the DTV backend controller 5 includes a video decoder 51, such as a MPEG2 decoder, an OSD control circuit 52, a blending circuit 53, a first transmission interface 54, such as the BT1120, a first receiving interface 55, such as the LVDS, and an output interface 56, such as the LVDS. The components in the DTV backend controller 5 are coupled to each other through an internal bus. The first transmission interface 54 and the first receiving interface 55 are coupled to the LCD TV controller 6, and the output interface 56 is coupled to the display panel 7. The components of the DTV backend controller 5 mentioned above are well known thus the detailed illustration is omitted.
In the embodiment, an ATV tuner 83, an ATV signal demodulator 84 and an analog video decoder 85 are configured between the ATV receiver and the LCD TV controller 6, so that the LCD TV controller 6 can receive a demodulated and decoded video signal from an analog TV signal source, and the demodulated and decoded audio signal from the analog TV signal source can be transmitted to an audio decoder 86 for following process before being broadcasted by an external audio output device, such as a speaker. The implementation of the technology mentioned above is well known thus the detailed illustration is omitted.
In the embodiment, the LCD TV controller 6 includes a signal receiving interface 61, such as the CCIR-656, a de-interlacing/scaling/resolution and color process circuit, abbreviated de-interlace processor 62, a second blending circuit 63, a second receiving interface 64, such as the BT1120, and a second transmission interface 65, such as the LVDS. The signal receiving interface 61 enables the LCD TV controller 6 to receive the analog video signal, which has been demodulated and decoded, from the analog TV signal source. The second receiving interface 64 is applied to receive the digital video signal which has been decoded and processed. Please refer to
If the user requires to switch the screen into PIP (picture in picture) mode, as shown in
For understanding the process steps in accordance with the present invention in detail, as shown in
Step 401: Modulating the digital TV signal.
Step 402: Demodulating the digital TV signal so that the DTV backend controller 5 can receive a transport packet stream which has been demodulated and packetized.
Step 403: Decoding the transport packet stream to generate the digital video signal, and transmit the digital video signal to the LCD TV controller 6 for further process.
Step 404: De-interlacing the digital video signal, and transmitting it back to the DTV backend controller 5.
Step 405: Generating the OSD image information.
Step 406: Blending the de-interlaced digital video signal with the OSD image information to generate a blended signal.
Step 407: Transmitting the blended signal to the display panel for display.
Please refer to
Step 501: Modulating the analog TV signal.
Step 502: Demodulating the analog TV signal.
Step 503: Transmitting the analog video signal to the LCD TV controller 6 for further process after the analog video signal is decoded.
Step 504: De-interlacing the analog video signal.
Step 505: Generating the PIP image containing the de-interlaced analog video signal and the digital video signal, and transmitting the PIP image to the DTV backend controller 5.
Then, continuing executing the step 405˜step 407 can make the blending video signal being transmitted to display panel 7 for display.
It is noted is that the analog video signal received from the ATV receiver also should be de-interlaced. The sequence of the PIP process and the other processes such as de-interlace is tunable by the designer and is not limiting the scope of the invention. Meanwhile, the PIP image also can be synthesized by several digital video signals and/or several analog signals. It is noted that that the image process performed by the LCD TV control 6 before de-interlacing process or the second blending circuit 63 or after the second blending circuit 63, such as scaling or color processing, are well known, the combination of utilizing the image processes being variable, and thus the scope of the present invention is not limited to the above-mentioned embodiments.
The LCD TV controller 6, the DTV backend controller 5 can also be implemented by ASIC, dedicated hardwired circuitry, microprocessor or general-purpose processing circuitry to meet the designing requirements. In addition, the present invention can not only be applied for LCD, flat plat displays, such as LCOS and plasma thin-film panel, and non-flat digital TV displays.
In the embodiment of the digital TV system in accordance with the present invention, the OSD image information generated by the DTV backend controller 5 is not blended with the video signal until the digital video signal or the analog video signal until the OSD image information is de-interlaced, and/or PIP processed, and transmitted back to the DTV backend controller 5. Then the video signal and the OSD image information are blended to generate a blended signal.
Although the embodiment above refers to the local OSD image information, the present invention also can be applied to the system information (SI) which is transmitted with the digital TV signal from the far-end terminal. The system information usually includes a still image, such as the subtitle at a corner of the screen, a time-corresponsively still image, such as the closed caption which is switched over an interval of several seconds following the playing of program, or a space-corresponsively still image, such as the scrolling or text crawling which locates in part of the screen and moves in a steady velocity. The display processor should includes a SI processor to receive the separated SI information and generate a SI image signal corresponding to the separated SI information, and deliver the SI image signal to the LCD TV controller 6. Then, the SI image signal is blended with the video signal which has been de-interlaced.
The DTV backend controller 5 and the LCD TV controller 6 are implemented in individual IC chips, and the transmission interface is realized by the CCIR656 or DVI. However, a combination of the DTV backend controller 5, the LCD TV controller 6 and other components of the digital TV system in one chip also belongs to the scope of the present invention, meaning that as long as the still or corresponsively still images, such as the OSD information or the SI signal, are blended with the video signal after the video signal has been de-interlaced or PIP processed, the drawbacks of the conventional apparatus or method could be solved.
While the present invention has been described by way of example and in terms of a preferred embodiment, it is to be understood that the present invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
Number | Date | Country | Kind |
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095133408 | Sep 2006 | TW | national |