Claims
- 1. A digital to analog converter (DAC) comprising:an output circuit across which an output signal appears; a bias source; a clock pulse source; a plurality of stages arranged in a matrix of cells; a selector circuit for turning the cells on and off depending on the state of a multi-bit binary signal; each stage comprising a clock actuated switch and a cell selecting switch connected between the bias source and the output circuit such that the bias source is applied to the output circuit if the corresponding cell is turned on when a clock pulse appears and is not applied to the output circuit if the corresponding cell is turned off when a clock pulse appears and such that the amplitude of the output signal depends on the cells that are turned on; means for connecting the clock pulse source to the clock actuated switch of each stage to render the clock actuated switch of the stage conditionally conductive when a clock pulse appears; means for connecting the selector circuit to the cell selecting switch of each stage to render the cell selecting switch of the stage conditionally conductive if the cell is turned on by the state of the binary signal; and a bistable latch for each stage, the bistable latch being alternatively connected between the bias source and the output circuit such that the bias source is connected to the output circuit and the cell selecting switch of the stage is floating when the bias source is connected to the output circuit.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of application Ser. No. 09/909,282, filed Jul. 19, 2001 now U.S. Pat. No. 6,414,618, which is a continuation of application Ser. No. 09/753,874, filed Jan. 3, 2001 (now U.S. Pat. No. 6,268,816), which is a continuation of application Ser. No. 09/458,331, filed Dec. 10, 1999 (now U.S. Pat. No. 6,191,719), which is a continuation of application Ser. No. 08/917,408, filed Aug. 25, 1997, now abandoned.
US Referenced Citations (11)
Non-Patent Literature Citations (3)
Entry |
Article entitled “An 8-bit 2-ns Monolithic DAC”, IEEE Journal of Solid-State Circuits, vol. 23, No. 1, Feb. 1988, pp. 142-146. |
Article entitled “a 27-MHz Digital-to-Analog Video Processor”, IEEE Journal of Solid-State Circuits, vol. 23, No. 6, Dec. 1988, pp. 1358-1369. |
Vogt, Alexander W. et al., Article entitled “A 10-Bit High Speed CMOS DAC Macrocell”, 1989, pp. 6.7.1-6.7.4. |
Continuations (4)
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Number |
Date |
Country |
Parent |
09/909282 |
Jul 2001 |
US |
Child |
10/175663 |
|
US |
Parent |
09/753874 |
Jan 2001 |
US |
Child |
09/909282 |
|
US |
Parent |
09/458331 |
Dec 1999 |
US |
Child |
09/753874 |
|
US |
Parent |
08/917408 |
Aug 1997 |
US |
Child |
09/458331 |
|
US |