Patent Grant
11815620
This application claims the priority under 35 U.S.C. § 119 of European Patent application no. 19207102.5, filed on 5 Nov. 2019, the contents of which are incorporated by reference herein.
The present disclosure relates to digitally modulated radar, DMR, and in particular to digitally modulated radar, DMR, transmitter modules, DMR systems, and to methods of generating a DMR signal.
In conventional radar systems a pulsed signal is transmitted from a transceiver, and reflected signals are received back at the transceiver. The reflected signals are analysed to provide distance and velocity information on the source of the reflection by analysing time-of-flight and Doppler effects. Both the dead time between pulses, and the problem of distinguishing between multiple, interfering, signals are limitations which may be addressed by the use of digitally modulated radar, DMR. In digitally modulated radar, instead of transmitting a simple high-frequency carrier signal, the carrier signal is modulated, according to a digital signal. The digital signal both provides an identification code by which reflections of the transmitted signals can be distinguished from interfering signals, and introduces variation in the time domain such that it is not necessary to include a dead time in order to determine a total time-of-flight of the transmitted and reflected signal.
However, modulation of a carrier signal by according to a digital signal introduces side lobes in the frequency domain. These side lobes may carry significant power, and this may be undesirable, or even unacceptable, in certain regulatory environments, for instance for applications such as 77 GHz automotive radar. It would be desirable to reduce the power or magnitude of these side lobes.
According to a first aspect of the present disclosure there is provided a digitally modulated radar, DMR, transmitter module comprising: a sequence generator, configured to generate a repeating digital sequence signal based on a relatively low-frequency clock signal; a mixer configured to combine the digital sequence signal with at least one phase-delayed copy of the digital sequence signal, to provide a combined signal; and a modulator configured to modulate a relatively high-frequency carrier signal, in dependence on the combined signal, to provide a modulated signal. Combining the original repeating digital sequence signal, alters the positioning of and power in the side-lobes, associated with the transmitted modulated high-frequency signal, and may reduce the power in any individual side-lobe. There may be one, two, or more phase-delayed copies. They may be evenly separated in phase, or they may be irregularly spaced apart. Irregular phase-spacing may reduce the power in the side-lobe further,
In one or more embodiments, the DMR transmitter module further comprises one or more phase-delay circuits, each phase-delay circuit being configured to receive as input the digital sequence signal, and provide to the mixer a respective one of the least one phase-delayed copy of the digital sequence signal, delayed in phase by a respective predetermined phase-shift.
In one or more other embodiments, the DMR transmitter module further comprises one or more phase-delay circuit, each phase-delay circuit being configured to receive as input the clock signal, and to output a respective copy of the clock signal, delayed in phase by a respective predetermined phase-shift; and one or more further sequence generators, each configured to generate a digital sequence signal based on a respective one of the at least one phase-delayed copy of the clock signal to provide a respectively phase-delayed copy of the digital sequence signal to the mixer. Such modules, in which the phase delay is applied to the clock signal, may be simpler to implement, compared with those in which the phase delay is applied to the digital sequence signal.
The modulator may be a phase shift key PSK modulator and the modulated signal a PSK modulated signal. The PSK modulated signal may a binary phase shift key, BPSK, signal. Phase shift key modulated signals, and in particular binary phase shift keys modulated signals, have been proven to be particularly effective as transmitted radar signals
Nonetheless, in one or more other embodiments, the modulator is an amplitude modulator and the modulated signal is an amplitude modulated signal, or the modulator is a frequency modulator, and the modulated signal is a frequency modulated signal.
In one or more embodiments, the relatively high frequency carrier signal is derived from a local oscillator, and a one of the clock signal is derived from the local oscillator, or the local oscillator is derived from the clock signal. In general, it may be that it is easier to frequency-multiply a clock signal running at, for example, between 500 MHz and 4 GHz, to result in a higher relatively high-frequency carrier signal, running at for example 77 GHz or 140 GHz, rather than directly generate the relatively high frequency signal
According to another aspect of the present disclosure, there is provided a DMR system, comprising a DMR transmitter module as above, and further comprising a receiver module, wherein the receiver module comprises: a down converter configured to down-convert a received signal to a baseline frequency; a track-and-hold circuit, and an analog-to-digital converter, ADC, configured to digitise portions of the down-converted received signal.
The receiver module further may comprise a cross-correlation unit configured to cross-correlate the portions of the down-converted received signal with the digital sequence signal.
According to yet further aspect, there is provided a method of generating a digitally modulated radar signal, the method comprising: generating a digital sequence, and, a repeating digital sequence signal based on the digital sequence and a relatively low-frequency clock signal; generating at least one phase-delayed copy of the digital sequence signal; combining the digital sequence signal, in a mixer, with at least one phase-delayed copy of the digital sequence signal, to provide a combined signal; and modulating a relatively high-frequency carrier signal, in dependence on the combined signal, to provide the digitally modulated radar signal.
In one or more embodiments, generating a one of the at least one phase-delayed copy of the digital sequence signal comprises: receiving, in a respective phase-delay circuit, the repeating digital sequence signal, delaying the phase by a respective predetermined phase-shift, and providing to the mixer the respective one of the least one phase-delayed copy of the digital sequence signal,
In one or in other embodiments, generating a one of the at least one phase-delayed copy of the digital sequence signal comprises: receiving, in a respective phase-delay circuit, the clock signal, delaying the phase by a respective predetermined phase-shift, and outputting a phase-delayed copy of the clock signal; and generating a digital sequence signal, based on the digital sequence and the phase-delayed copy of the clock signal, to provide the one of the least one phase-delayed copy of the digital sequence signal to the mixer.
These and other aspects of the invention will be apparent from, and elucidated with reference to, the embodiments described hereinafter.
Embodiments will be described, by way of example only, with reference to the drawings, in which
It should be noted that the Figures are diagrammatic and not necessarily drawn to scale. Relative dimensions and proportions of parts of these Figures may be shown exaggerated or reduced in size, for the sake of clarity and convenience in the drawings. The same reference signs are generally used to refer to corresponding or similar features in modified and different embodiments
The sequence is applied to a clock to generate a digital sequence signal 120. The clock may be running at a so-called baseline frequency, which may typically—but without limitation—be of the order of 500 MHz to 4 GHz. At a clock frequency of 4 GHz, a 4 k bit sequence, shown at 130, thus lasts approximately 1 ms. The sequence is repeated to generate a repeating digital sequence signal 140.
As will be familiar to the person skilled in the art of DMR, this repeating digital sequence signal 140 may be used to modulate a carrier signal to generate a radar transmission signal. The carrier signal has a frequency which is relatively higher than the baseline frequency. In the case of automotive radar, a frequency band centred on 77 GHz has been allocated by regulatory authorities, so this band is typically used. However, the present disclosure is not limited thereto: for example, again in the automotive field, another band around 140 GHz is also being considered for use.
The repeating digital sequence signal 140 is used to modulate the carrier signal. Most commonly the modulation is phase modulation, but the skilled person will be aware that other forms of modulation, such as amplitude modulation frequency modulation, are equally applicable. In the case of phase modulation, also known as phase shift keying (PSK), use of a binary digital signal such as that described above results in binary phase shift keying (BPSK); in the case of multilevel signals or high consolations, alternative forms of phase shift keying, such as Quaternary phase shift keying QPSK or n-QSPK, are equally applicable.
Again, as will be familiar to the skilled person, modulating a carrier signal by a digital signal results in side lobes, when viewed in frequency domain.
Also shown in
It is known to attenuate these side lobes by using a bandpass filter, tuned to allow the correct centre frequency of the carrier wave together with necessary sidebands to properly convey the digital signal. The bandpass filter may be implemented with passive components; however this may be impractical in some applications in which monolithic integration is desired or required.
An alternative solution is to implement the bandpass filter in the digital domain. This may be done by applying a finite impulse response (FIR) filter in the signal generation chain. However, to implement this the signal has to be generated by a high-speed digital-to-analog converter (DAC) running at a higher speed than the bit rate of the signal to be generated. This in turn requires space on the silicon chip to implement the DAC and the FIR filter, and significant processing power and efforts to operate those IP blocks.
The signals are then combined to provide a combined signal, which may be plotted as amplitude against time as shown at 340, in the third part of the figure. In the case of the binary signal, the combination is done such that the combined signal is “high”, or “1” whenever any one or more of the individual signals are “high” or “1”, and only “low” or “0”, when all of the individual signals are “low” or “0”. As a result, a single “0” bit in the original signal results in a much shorter “0” time in the combined signal, as shown at 342, and a single “1” bit in the original signal results in a longer “1” time in the combined signal, as shown at 344. It will be observed that where a bit is followed by another bit of the same parity (such as the two “0”s shown at 346), one of the bits is unaffected. This is the second bit in the case of two consecutive “0”s. In the case of two consecutive “1”s, it will be the first bit which is unaffected.
Finally, the bottom part of the figure shows the signal 345, after smoothing. It will be appreciated that the “square wave” digital signals shown at the top of the figure are idealised. In any practical circuit the sharp transitions—shown as being instantaneous in the upper part of the figure—between the high and low states do not occur, and the signal transitions are rounded. By including phase-delayed copies of the signal, the irregularity of the spacing of the transitions is increased, and an effect of this is to smooth the transitions between levels. It will increase the slope of the transition and will round the square signal, in such a way as to reduce the spectral components.
The exact extent of the reduction in the power in the side lobes depends on the digital sequence, the number phase-delayed copies of the repeated digital sequence signal which are combined with the original repeated digital sequence signal, and the choice of phase delays. At present it is not possible to mathematically calculate the optimum phase delays for a given number of copies and a range of digital sequences.
It will be appreciated that the choice of the digital sequence used in a system depends on several criteria. Apart from the sequence length, already mentioned above, two important factors are auto-correlation and cross-correlation. In general for radar applications, it is desired to have minimum, and preferably zero, cross-correlation between two sequences which either are in the same system, or in two systems which are expected to operate in the same physical space and thus potentially are going to interfere. As used in the field of radar, cross-correlation is a mathematical function corresponding to the result of convolving two sequences or signals. Perfect cross-correlation—corresponding to a correlation level of “1”—results if the sequences are identical; conversely, zero cross-correlation—corresponding to a correlation level of “0”—results if the sequences are completely unrelated. The lower the cross-correlation, the lower the probability that a receiver will incorrectly identify a signal carrying one sequence as being a signal carrying the other sequence, or a reflected version of that signal. For two sequences to have zero cross-correlation they must be completely orthogonal, and it will be appreciated that this is only the case in an infinitely long sequence. The shorter the sequence, the higher the cross-correlation with any other sequence. The choice of sequence length thus is a compromise with the degree of cross-correlation which is tolerable.
Considering now auto-correlation, for perfect auto-correlation, the sequence should be infinitely long. Conceptually, autocorrelation relates to the extent to which a sequence corresponds to a time shifted copy of itself. Perfect autocorrelation—corresponding to a correlation level of “1” results if the sequence is perfectly matched with the time shifted sequence—giving absolute in confidence that the time-shifted sequence originated with (for example it is a reflection from) the original sequence; conversely, zero auto-correlation—corresponding to a correlation level of “0”, results if the sequence is entirely unrelated to the time shifted sequence, from which it can be concluded that the time-shifted sequence did not originate from the original sequence, and thus is comes from an interfering signal. In the field of radar, the autocorrelation function is not a discrete signal: if there is a match in the autocorrelation due to a reflected signal, delayed relative to transmitted signal, but having the same sequence, a delta Dirac in the autocorrelation will be generated. The level of the delta Dirac will depend on the magnitude of the reflected signal.
It will thus be appreciated that a phase-delayed copy of the original sequence has a very high level of auto-correlation with the original sequence. This is significant, since it greatly simplifies the processing requirements of signals received by a radar receiver in order to identify and analyse reflections of the transmitted signal, as will be discussed in more detail below.
Returning now to the issue of the choice of number and phase delay of the phase-delayed copies of the repeating digital sequence signal, as has already be mentioned it is likely not possible to mathematically calculate the optimum number and phase delays. However, it has been found experimentally that, in general, an increasing number of copies results in lower side lobes, as does irregular spacing of the phase delay. Conceptually, this may be explained as follows: it is known that a pure square wave signal has very high harmonic components, particularly when compared with a sine wave signal which has only the fundamental frequency component. The original repeating digital sequence signal corresponds closely to a square wave signal, and this has high harmonic content. By combining the sequence with phase-delayed versions of the sequence, it is made to be less similar to a square wave, and this results in a reduction of the harmonic content.
Turning now to
Considering now specifically
Turning now to
Turning now to
The DMR transmitter 720 comprises a transmitter module 710, having one or more—in this example three—phase delay circuits 642, 644 and 646, configured to delay the phase of a clock signal 620. The transmitter module 600 includes sequence generators 610, which applies a digital sequence to the incoming clock signal, as well as sequence generators 612, 614 and 616 which apply the digital sequence to respectively phase-delayed versions of the clock signal, to result in an original repeating digital sequence signal, together with three phase-delayed versions of the repeating digital sequence signal, as discussed above with respect to
The relatively high-frequency carrier signal 715 may be provided by means of a local oscillator 717. In a nonlimiting example, the local oscillator may be operating at the relatively high frequency (which may for instance be 77 GHz) The output from the local oscillator may be frequency divided in a frequency divider 718 to the baseline frequency (which may be for instance be between 500 MHz and 4 GHz). The frequency divider may include or be associated with a fractional divider 719. As the skilled person will be aware, in other embodiments, the relatively high-frequency carrier signal may be provided by frequency multiplying a clock signal. The clock signal may be operating at the baseline signal which, in another nonlimiting example, may be between 500 MHz and 4 GHz.
Reflections from the transmitted modulated carrier signal along with other interfering, or spurious, signals are received at an antenna 738 which forms part of the receiver 730. Along with the antenna 738, the receiver 730 comprises a receiver module 740 as well as a digital signal processing (DSP) unit 760.
The receiver module 740 receives the incoming signal from antenna 738, and processes it in a conventional manner. In particular, after being amplified by a variable gain amplifier 744, the signal is down-converter into real and quadrature components with a phase difference of 90° therebetween, by downconverter 446. The downconverter makes use of the relatively high frequency carrier signal 715. The real and quadrature components of the downconverter signal may be amplified in variable gain amplifiers 748 and filtered in low-pass filters 752. The filtered baseband signal may digitized with an effective sampling frequency of twice the bandwidth of the signal. For example, to do this the frequency-divided LO signal may be used to drive a track and hold amplifiers 754 in a normal sampling way. Alternatively, the frequency-divided LO signal can be further divided in frequency by a factor k (to provide a signal which is a factor of K lower in frequency than the baseline frequency): in this way, the signal is subsampled: in other words, the signal is sampled with an instantaneous sampling frequency lower than the indicated by the Nyquist theorem but the signal will be repeated k times in order to sample a part of the signal in every repetition.
The receiver also includes a DSP module 760. The DSP module 760 may be part of a microcontroller, (It should be noted that in one or more other embodiments, the DSP module and/or the microcontroller may be separate to receiver; it may be part of a central processing unit).
The DSP module 760 carries out functions required for DMR signal processing. In particular, after the signal has been digitized, it can be averaged by using a coherent adder 762, in order to increase the SNR of the system and after the signal will be cross correlated with the original digital sequence used at the transmitter 764. If there are multiple transmitters, each transmitter can use a different orthogonal digital signal and therefore, at each receiver, the same amount of cross correlators have to be implemented. In this way a MIMO system is built and all the transmitters can transmit at the same time allowing to reconstruct the response of each TX channel on each RX channel which is an advantage to increase the angular resolution of the radar system by using the same amount of physical TX/RX but allowing to reconstruct virtual RX channels with the cross correlators. This is shown as MIMO synthesis 766 in
It will be appreciated that, according to embodiments of the present disclosure, the received baseband signal which is used for the radar processing is not a simple copy of the original digital sequence signal, not only may there be Doppler effects as would be the case in conventional DMR radar, according to embodiments, the received signal is a combination of multiple, phase-delayed versions of the original digital sequence signal. Whereas this might be expected to add additional complexity to the processing, in practice this is not the case: since the received signal is based on multiple copies of the same digital sequence, these appear to the correlators simply as additional, time shifted, copies of the original signal which are readily identifiable. The correlator can be implemented as a match filter, in the form of a finite impulse response (FI filter to the incoming signal.
Turning now to
Reflected signals, along with any interfering signals, are received by two or more antennas 738 four are shown in this particular example. The combination of N transmitters and M receivers results in N×M combinations—in the example shown this is 4×4 resulting in 16 combinations. As shown, each receiver includes a receiver module such as that shown in
From reading the present disclosure, other variations and modifications will be apparent to the skilled person. Such variations and modifications may involve equivalent and other features which are already known in the art of DMR and which may be used instead of, or in addition to, features already described herein.
As used herein, the terms phase-delayed copy of a signal, (or in general phase-shifted copy of a signal), refers to a signal which has the same content as the original signal, but is delayed (or shifted, respectively) in time. Thus if a signal has a fundamental frequency of for instance 1 GHz, it has a primary period of 1 ns. A phase-delayed copy of that signal which has a phase delay of 90°, would thus lag the original signal by (90°/360°)×1 ns, that is to say 250 ps, and a phase-delayed copy of that signal which has a phase delay of 270° would lag the original signal by (270°/360°)×1 ns, or 750 ps.
Although the appended claims are directed to particular combinations of features, it should be understood that the scope of the disclosure of the present invention also includes any novel feature or any novel combination of features disclosed herein either explicitly or implicitly or any generalisation thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention.
Features which are described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, various features which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination. The applicant hereby gives notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.
For the sake of completeness it is also stated that the term “comprising” does not exclude other elements or steps, the term “a” or “an” does not exclude a plurality, a single processor or other unit may fulfil the functions of several means recited in the claims and reference signs in the claims shall not be construed as limiting the scope of the claims.
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