1. Field of the Invention
The present invention relates to analog filters, and particularly to a digitally programmable high-order filter analog filter.
2. Description of the Related Art
Current-mode building blocks (CMBBs), transconductance amplifiers (gm), and operation transconductance amplifiers (OTAs) have been used to realize several high-order filters. Prior art filters however, have a single output and modifying the filter type would require changes in the hardware. In addition, the absence of a programmability feature hinders the use of most of these filters in integrated circuit (IC) applications.
Thus, a digitally programmable high-order filter solving the aforementioned problems is desired.
The digitally programmable high-order filter uses simple active elements, namely, DCCAs (digitally controlled current amplifiers) and VBs (unity gain voltage buffers) with the help of R-2R ladders, in order to realize several nth-order filters. Both DCCAs and n VBs may be used, and can provide programmability to either the filter's numerator coefficients or to the denominator coefficients. The digitally programmable high-order filter may include R-2R ladders in its negative feedback loops, resulting in a filter in which all coefficients are programmable.
These and other features of the present invention will become readily apparent upon further review of the following specification and drawings.
Similar reference characters denote corresponding features consistently throughout the attached drawings.
The digitally programmable high-order filter uses simple active elements, namely, digitally controlled current amplifiers (DCCAs) and unity gain voltage buffers (VBs) with the help of R-2R ladders to realize several nth-order filters. ‘n+3’ DCCAs and ‘n’ VBs may be used, and can provide programmability to either the filter's numerator coefficients or to the denominator coefficients. The digitally programmable high-order filter may include R-2R ladders in its negative feedback loops, resulting in a filter in which all coefficients are programmable. R-2R ladders and current division networks (CDNs) are incorporated in the circuitry for adjusting various transfer functions to affect tuning of the filters.
The general transfer function of an nth-order filter is given by:
where a0 through an are real numbers, and b0 through bn-1 are positive real numbers. It is typically realized by designing a filter providing basic responses, namely, aisi/D(s) for i=0 to n, simultaneously. Other functions are obtained by properly adding or subtracting these basic responses, and hence it serves wide range of applications. However, to be compatible with IC applications, the filter has to satisfy the following two conditions. First, it must be reconfigurable without changing the hardware to promote the realization of different filter types. Second, it must exhibit programmable parameters to adjust the filter frequency responses.
Two-integrator-loop filter family is a vital topology for realizing multi-functions simultaneously. They inherently have the advantage of providing filter responses with independent tunable characteristics. They are realized either with a Tow-Thomas (TT) structure providing low pass and bandpass functions, or with a Kerwin-Huelsman-Newcomb (KHN) topology offering high pass response in addition to low pass and bandpass responses. Filter designs based on current-mode building blocks (CMBBs) have the potential to provide higher bandwidth and better linearity than their counterparts based on op-amps and gm (OTAs), respectively. A current follower (CF) has inherent advantages of wide bandwidth, large signal swings, and low power consumption. Similarly a current division network (CDN) can be utilized in the design of the CF to form a digitally controlled current follower (DCCF), which gives the advantage of programmability.
As shown in
The R-2R ladder circuit, shown in
Therefore, the equivalent resistance, seen between the input and output nodes, is given by
where bi (equal to 0 or 1) is the ith bit in an n-bit digital control word.
The R-2R ladder can be incorporated as a circuit element into the design to provide precise frequency characteristics that can be tuned over a wide range. This can be applied as long as these resistors are connected to virtual ground, which simulates the proper operating condition of the R-2R ladder. This feature is inherently available at the input port X of the CF (current follower).
The current division network (CDN) II shown in
where di is the ith digital bit and n is the size of control word. The CDN 11 is suitable for low power operation, since it does not dissipate standby current. The proper operation of the CDN 11 requires the input node to be current driven and the output node to be virtually grounded.
A current division network, such as CDN 11, can be utilized in the design of a current follower (CF) to form a digitally controlled current amplifier (DCCA) 13, as shown in
Iz=αIX with α=1/Σi=1ndi2−i (5)
The most basic voltage buffer (VB) is the source follower circuit. However, since the transconductance of the MOS transistor is small, a negative feedback has to be applied to provide the required low output impedance. Also, additional circuitry is required to cancel the large DC offset between the input and the output. To avoid distortion caused by the body effect, a differential pair should be employed at the input port of the VB. CMOS realization of a low power VB with class-AB output stage is shown by the voltage buffer 15 in
The general transfer functions of the basic filter of
In general,
The output signals can be properly added to realize the general transfer function of (1). It can be seen from equations (6a)-(6e) that either the coefficients of the numerator or of the denominator can be adjusted by choosing αn,αn-1, . . . α1,α0 in the given order. However, it would not be possible to arbitrarily set all of the coefficients. Fortunately, there are several ways to enhance the programmability feature, starting from the basic design of
The tuning range of the filter of
The main drawback of the filters of
Therefore, it can be seen that the coefficients of numerator can be adjusted by choosing αn,αn-1, . . . α1,α0 in the given order. Then, the coefficients of the denominator polynomial can be adjusted independently by selecting β0 through βn-1.
The third class exhibiting enhanced tuning features consists of the following alternatives: Option 3 (i), using R-2R ladders and DCCAs in the forward path, and using DCCAs in the feedback path; Option 3 (ii), using DCCAs in the forward path, and using R-2R ladders and DCCAs in the feedback path; and Option 3 (iii), using R-2R ladders and DCCAs in the forward path, and using R-2R ladders in the feedback path. The fourth category exhibits the largest tuning range, but with maximum power and area. Table I summarizes the different possible tuning features and their ranges for various topologies.
Therefore, apart from Option 1 all other topologies exhibit electronically programmable coefficients. For applications where power is the most important factor, designs (2)(ii) and (3)(iii) are the most attractive. If area is also important, then Option 2(ii) (i.e., the filter of
The non-ideal AC response of the filter can be found by considering the non-ideal effects of the DCCA and CF characterized by input parasitic impedance (Zx) and output parasitic conductance (Yz). Since the DCCA is designed to exhibit low input impedance and high output impedance, Zx and Yz are dominated by series resistance (rx) and parallel capacitance (Cz), respectively. Similarly, the non-ideal terminal characteristics of the VB can be modeled by shunt capacitance Cb and series resistance rb at the input and output ports, respectively.
For the topologies of
For example, it can be shown that non-ideal analysis of the 4th-order filter obtained from
It can be seen that rx4 and R result in introducing s6 and s5 terms in D(s) and error in its s4 coefficient. The error s4 can be safely neglected as long as rx4 is kept small. But the s6 and s5 terms will cause deviations in the high frequency response compared with the ideal response. It can be shown for frequencies ‘ω’ much smaller than 1/(CArx4+Cz4R) (CA is the total capacitance at node A), the effect of the s6 term can be neglected. Similarly, the s5 term can be neglected for frequencies ‘ω’ much smaller than 1/(CArx4+Cz4R). Since R is typically larger than rx4, and assuming CA and CZ4 of similar size, the non-ideal terms can be neglected as long as the operating frequency is smaller than 1/(CZ4R). For example, when CA and CZ4 are 0.1 pF, Rx4 is 500Ω, and R is 1 kΩ, the effects of s6 and s5 terms can be neglected for frequencies up to approximately 2 GHz and 1 GHz, respectively.
Table II shows a summary of the main characteristics of the filter 80 of
The filter 80 has the advantage of providing programmability of numerator and denominator coefficients.
The DCCA using a 6-bit CDN and the VB has been fabricated in a 0.35 μm N-well CMOS process. A 4th-order filter obtained from filter 80 was implemented using equal resistors in the forward path (R0=R1=R2=R3) of 801 kΩ and equal capacitors (C0=C1=C2=C3) of 50 pF. R-2R ladders with 6-bits and base resistance of 2 kΩ were used in the feedback paths. Also, the passive resistance Ri was replaced by an R-2R ladder with 6-bits and base resistance of 2 kΩ to allow tuning of the filter gain. The grounded resistor R is selected to be 8 kΩ in order to permit achieving high pass gain up to 12 dB. Throughout testing, the supply voltages were set to ±1.5V and the currents of the DCCA and VB were IB=20 μA and ISB=5 μA. With 6-bit CDN, the current gain (α) of the DCCA can be adjusted from 1.02 to 64. Similarly, using 6-bit R-2R ladders allows varying the equivalent resistance over the range 2kΩ to 26×2kΩ. First, the filter was designed to realize a low pass Butterworth response with pole frequency of 500 kHz through programming the gains of the DCCAs such that α4-1.02, α3=8, α2=16, α1=9.14, α0=4.92. These values correspond to respective digital words of 111111, 001000, 000100, 000111, 001101. Meanwhile, the controlling word of all ladders was 111111 so that the equivalent resistance of each is 2 kΩ. The resulting low pass magnitude response having unity gain was measured. Then, α3, α2, α1, and α0 were programmed simultaneously (divided by two and then by four) to scale down the pole frequency from 500 kHz to 250 kHz and then to 125 kHz. The results of these measurements are shown in plot 900 of
The importance of having R-2R ladders to enhance the programmability feature will be demonstrated by considering the bandpass filter design in the following example. It will be shown how the ladders can be utilized to increase the quality factor of the filter without changing the center frequency and gain. The starting response of the bandpass filter is that associated with low pass Butterworth response having Qo of 0.707, shown in plot 1000 of
In addition, several high pass magnitude responses demonstrating gain tuning of −6, 0, 6 and 12 dB through proper programming of R-2R ladder of Ri are shown in plot 1100 of
It is to be understood that the present invention is not limited to the embodiments described above, but encompasses any and all embodiments within the scope of the following claims.
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Digitally programmable high-order current-mode universal filters, Alzaher, H.A. et al., May 2011, Analog Integrated Circuits and Signal Processing, vol. 67 No. 2, pp. 179-187. |