Claims
- 1. A reproduction speed detecting circuit for use in processing data read from a rotating disc, the processing including generating a reproduction reference clock responsive to a modulated signal obtained by quantizing the data, comprising:
- a first divider for dividing the reproduction reference clock to generate a first clock;
- a second divider for dividing a constant clock to generate a second clock;
- a timing pulse generator to generate a latch pulse and a clear pulse in response to detection of a falling edge of the second clock;
- a counter to count up the first clock, the counter being reset by the clear pulse; and
- an output circuit to output a value of the counter in response to the latch pulse.
- 2. The reproduction speed detecting circuit according to claim 1 wherein the output circuit comprises:
- an encoder to encode an output of the counter to decrease a bit-width thereof; and
- a latch circuit to latch an output of the encoder in response to the latch pulse.
Priority Claims (3)
Number |
Date |
Country |
Kind |
5-222179 |
Aug 1993 |
JPX |
|
5-300836 |
Nov 1993 |
JPX |
|
6-051350 |
Feb 1994 |
JPX |
|
Parent Case Info
This is a division of application Ser. No. 08/288,785, filed Aug. 12, 1994.
US Referenced Citations (7)
Foreign Referenced Citations (12)
Number |
Date |
Country |
0046231A1 |
Feb 1982 |
EPX |
0096162A1 |
Dec 1983 |
EPX |
0096164A2 |
Dec 1983 |
EPX |
0400810A3 |
Dec 1990 |
EPX |
00400810A2 |
Dec 1990 |
EPX |
0485234A2 |
May 1992 |
EPX |
0534883A1 |
Mar 1993 |
EPX |
2 492 149 |
Apr 1982 |
FRX |
4103973A1 |
Aug 1992 |
DEX |
5-028632 |
Feb 1993 |
JPX |
5-189885 |
Jul 1993 |
JPX |
6-119710 |
Apr 1994 |
JPX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
288785 |
Aug 1994 |
|