Patent Application
20150262540
This application claims priority to Chinese Patent Application No. 201410090663.7 filed on Mar. 12, 2014, the disclosures of which are incorporated in their entirety by reference herein.
The present invention relates to the technical field of display, and in particular to a discharge circuit of a display panel and a display device.
The liquid crystal display (LCD) is widely used for a display device such as a television, a display, a laptop, a tablet computer and a mobile internet apparatus due to the advantages of a small size, low power consumption and a long life thereof.
The conventional design for a display panel is prone to cause charge accumulation, which makes the display panel appear an undesirable phenomenon such as a greenish phenomenon and a residual image, seriously affecting the display effect of the display panel. Thus, a discharge circuit is needed which enables the display panel to discharge rapidly in a standby mode.
The technical problem to be solved by the present disclosure is that the display panel is prone to have the issue of charge accumulation.
For this purpose, the present disclosure provides a discharge circuit of a display panel including a time-delay control module configured to output a discharge control signal for a predetermined time period after the display panel is powered off; and a grounding module configured to receive the discharge control signal and enable a signal line to be grounded for the predetermined time period based on the discharge control signal.
Alternatively, the time-delay control module comprises a time-delay unit and a first switch, wherein one end of the first switch is coupled to the time-delay unit and the other end of the first switch is coupled to the grounding module.
Alternatively, the time-delay unit is configured to keep a high level signal before the display panel is powered off for the predetermined time period, the first switch is turned on when the display panel is powered off so that the high level signal sent by the time-delay unit is transmitted to the grounding module as the discharge control signal.
Alternatively, the first switch comprises a first MOS transistor, wherein a gate electrode of the first MOS transistor is coupled to a power supply of the display panel, a source electrode of the first MOS transistor is coupled to the grounding module, and a drain electrode of the first MOS transistor is coupled to the time-delay unit.
Alternatively, the time-delay control module further comprises an inverter in the case that the first MOS transistor is an N-type MOS transistor, wherein the inverter is coupled between the power supply of the display panel and the gate electrode of the first MOS transistor.
Alternatively, the grounding module comprises a signal line switch, wherein the signal line switch is turned on for the predetermined time period when the discharge control signal is received so that the signal line is grounded.
Alternatively, the grounding module comprises a plurality of signal line switches and there are a plurality of signal lines, wherein the one of plurality of signal line switches are coupled to the corresponding one of the plurality of signal lines and the ground, the plurality of signal line switches are all turned on for the predetermined time period when the discharge control signal is received, so that the plurality of signal lines corresponding to the plurality of signal line switches are all grounded.
Alternatively, the plurality of signal lines comprise a gate line, a data line and a common electrode line.
Alternatively, the plurality of signal line switches comprises a second switch, a third switch and a fourth switch, wherein the second switch is coupled to the gate line and the ground, the third switch is coupled to the data line and the ground, the fourth switch is coupled to the common electrode line and the ground, and the second switch, the third switch and the fourth switch are turned on simultaneously for the predetermined time period when the discharge control signal is received so that the gate line, the data line and the common electrode line are all grounded.
Alternatively, the second switch comprises a second MOS transistor, the third switch comprises a third MOS transistor, and the fourth switch comprises a fourth MOS transistor.
Alternatively, gate electrodes of the second MOS transistor, the third MOS transistor and the fourth MOS transistor are coupled to the time-delay control module; source electrodes of the second MOS transistor, the third MOS transistor and the fourth MOS transistor are respectively coupled to the gate line, the data line and the common electrode line; and drain electrodes of the second MOS transistor, the third MOS transistor and the fourth MOS transistor are grounded.
Alternatively, the grounding module further comprises an inverter in the case that the second MOS transistor, the third MOS transistor and the fourth MOS transistors are all P-type MOS transistors, wherein the inverter is coupled between the time-delay control module and the gate electrodes of the second MOS transistor, the third MOS transistor and the fourth MOS transistor.
Alternatively, the second MOS transistor comprises three MOS transistors for controlling RGB data signal lines respectively.
Alternatively, the discharge circuit further comprising a gate line switch and a data line switch, wherein the gate line switch and the data line switch are turned on when the discharge control signal is received so that a gate voltage is loaded onto the gate line and a data signal is loaded onto the data line.
The present invention further provides a display device comprising the discharge circuit of the display panel described above.
By applying the discharge circuit of the display panel disclosed in the present invention, the gate line, the data line and the common electrode line of the display panel are grounded simultaneously to achieve the purpose of discharge, and thus charge accumulation for a long time may be avoided by performing one time discharge operation when the display panel is in standby mode.
Features and advantages of the present invention will become more clearly with reference to the accompanying drawings, and the drawings are intend to illustrate and should not be construed as any limitation on the present invention, in which:
Embodiments of the present invention will be described in detail hereinafter in conjunction with the drawings.
By applying the discharge circuit of the display panel disclosed in the present invention, the signal lines of the display panel are enabled to be grounded simultaneously to achieve the purpose of discharge, and thus charge accumulation for a long time may be avoided by performing one time discharge operation when the display panel is in standby mode.
It should be noted that a conventional time-delay relay may be applied as the time-delay unit, where a specific length of delay time may be selected and set as required.
Hereinafter, in the case that the signal lines includes a gate line, a data line and a common electrode line of the display panel and the corresponding signal line switches 23 include three switches, i.e., a second switch 232, a third switch 233 and a fourth switch 234, the specific embodiments of the present invention will be described hereinafter.
When the display panel is in standby mode, the power supply VDD of the display panel is powered off, e.g., the voltage is changed from 3V to 0V. In this case, the output of a NOT gate coupled to the VDD is a high level so that the transistor T1 is turned on, and the VDD is delayed by the time-delay unit so that voltage Vx (i.e., the voltage at the drain electrode of the transistor T1) remains at a high level (3V) for a predetermined time period, e.g., the delay time is 50 μs. Since the transistor T1 is in an on-state at this time, the high level Vx at the drain electrode of the transistor T1 pulls up the voltage of the data line switch DS and the gate line switch GS coupled to the source electrode of the transistor T1 so that the data line switch DS and the gate line switch GS are turned on, and thus the gate voltage may be loaded onto the gate line and the RGB data signal may be loaded onto the data line.
Since the source electrode of the transistor T1 is at a high level, the transistors T2, T3, T4, T5 and T6 are turned on. Since the transistor T2 is turned on, the odd-row gate line GO and the even-row line GE are ground. For the display circuit, the odd-row gate line and even-row gate line are generally laid out on different layers separately to improve space utilization. It should be understood by those skilled in the art that there may be provided only one gate line in the case of sufficient space. Since the transistors T3, T4 and T5 are turned on, the RGB data signal lines DR, DG and DB are grounded respectively. Since the transistor T6 is turned on, the common electrode line Vcom is grounded. Thus, when the VDD is powered off, the discharge circuit according to the embodiment of the present invention enables the gate line, the data line and the common electrode line of the display panel to be grounded simultaneously to achieve the purpose of discharge, and thus charge accumulation for a long time may be avoided by performing one time discharge operation when the display panel is in standby mode.
After the time-delay operation of the time-delay unit ends, the voltage Vx is at a low level, thus the data line switch DS and the gate line switch GS are at all the low level so that the gate voltage GO/GE would not be loaded onto the gate line and the RGB data signal DR/DG/DB would not be loaded onto the data line, and at the same the transistors T2, T3, T4, T5 and T6 are turned off so that the RGB data signal lines DR, DG and DB, the odd-row gate line GO and the even-row gate line GE, and the common electrode line Vcom would not be grounded. Then the discharge process ends.
The transistors in the discharge circuit described above are all N-type MOS transistors, for example thin film transistors (TFTs). It should be understood that the transistors in the discharge circuit according to the present disclosure are not limited to N-type MOS transistors, and may be P-type MOS transistors.
Similar to the previous embodiment, the transistor T1 is turned on after the VDD is powered off, and the VDD is delayed by the time-delay unit so that the voltage Vx at the drain electrode of the transistor T1 remains at a high level, thus the data line switch DS and the gate line switch GS is pulled up, and the gate voltage may be loaded onto the gate line and the RGB data signal may be loaded onto the data line. The high level at the source electrode of the transistor T1 is changed into a low level by the NOT gate coupled to the transistor T1 so that the transistors T2 and T6 are turned on. Thus, the gate line is grounded by the transistor T2, the data line is grounded by the transistors T3, T4 and T5, and the common electrode line is grounded by the transistor T6. After the time-delay operation of the time-delay unit ends, the voltage Vx is at a low level so that the data line switch DS and the gate line switch GS are all at a low level and thus the gate voltage GO/GE would not be loaded onto the gate line and the RGB data signal DR/DG/DB would not be loaded onto the data line, and at the same the transistors T2 and T6 are turned off and thus the gate line, the data line and the common electrode line would not be grounded. Then the discharge process ends.
The above embodiments are only used to illustrate the present invention, and are not intended to be exhaustive or to limit the present invention. Upon reading the present invention, those skilled in the art can make various changes and modifications to the present invention. For example, changes and modifications, such as applying other electronic element as a switch element, applying other delay mode, or changing the type of MOS transistor and changing the circuit configuration accordingly, are within the scope of the present invention.
By applying the discharge circuit of the display panel according to the present invention, the gate line, the data line and the common electrode line of the display panel are grounded simultaneously to achieve the purpose of discharge, and thus charge accumulation for a long time may be avoided by performing one time discharge operation when the display panel is in standby mode.
The present invention further provides a display device including the discharge circuit of the display panel described above. The display device may be a LCD panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a display, a laptop, a digital photo frame, a navigation system and any other product or component with a display function.
While the embodiments of the present invention are described in conjunction with the drawings, various modifications and variations may be made to the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications and variations should be within the scope as defined by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201410090663.7 | Mar 2014 | CN | national |
