This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2016-187379, filed Sep. 26, 2016, the entire contents of which are incorporated herein by reference.
Embodiments described herein relate generally to a magnetic disk device and a method for controlling a magnetic disk device.
A magnetic disk device of one type has a refresh function.
An embodiment is directed to improving reliability of a magnetic disk device.
In general, according to an embodiment, a disk device includes a magnetic disk, a head configured to write data into the magnetic disk, a memory in which a write count and a offset amount of the head during a write operation are stored for each of a plurality of tracks of the magnetic disk, and a processor. The processor is configured to determine an inner offset and an outer offset of the head with respect to a target track of a write operation, and update the write count for an adjacent inner track of the target track based on the inner offset, and the write count for an adjacent outer track of the target track based on the outer offset.
In the present disclosure, a plurality of expressions is used for to some elements. These expressions are given as an example only and are not intended to deny use of other expressions. Furthermore, elements for which a plurality of expressions is not used may be expressed by other expressions.
Moreover, the drawings are schematic and the relations between thickness and plane dimensions, rates of thicknesses of multiple layers, and the like may differ from actual ones. Furthermore, the relations of dimensions and the rates may differ among the drawings.
The magnetic disk device 100 includes a magnetic disk 3 that is a recording medium rotated by a spindle motor 2. The magnetic disk device 100 also includes a head actuator 5 driven by a head drive unit 6. A magnetic head 4 for write and read operations is attached to a tip end of the head actuator 5.
The magnetic disk device 100 includes, as a control system, a host interface controller (host I/F controller) 10, a RAM 20, a processor 30, a device interface controller (device I/F controller) 40, and a nonvolatile memory 50.
The host I/F controller 10 carries out communication of commands, data, status reports, and the like with the host 1. When receiving a command from the host 1, the host I/F controller 10 notifies the processor 30 of the command. The host I/F controller 10 buffers data received from the host 1 in a buffer memory 25 and transmits the data buffered in the buffer memory 25 to the host 1 in accordance with a control of the processor 30.
The RAM (Random Access Memory) 20 includes a memory area that serves as the buffer memory 25 for temporarily storing data before data from the host 1 are written in the magnetic disk 3. Furthermore, the buffer memory 25 temporarily stores data before data read from the magnetic disk 3 are transferred to the host 1. The RAM 20 also includes a storing area for storing management information for data management. Furthermore, firmware stored in the nonvolatile memory 50 is loaded to the RAM 20. The management information managed by the RAM 20 is backed up in either the nonvolatile memory 50 or the magnetic disk 3. An SRAM (Static Random Access Memory) or a DRAM (Dynamic Random Access Memory), for example, can be used as the RAM 20.
The nonvolatile memory 50 includes a flash memory, an EEPROM (Electrically Erasable Programmable Read Only Memory) or the like, and stores therein the firmware executed by the processor 30. The firmware may be stored in the magnetic disk 3.
The device I/F controller 40 controls the spindle motor 2, the magnetic head 4, and the head drive unit 6 to be driven, thereby writing data in the magnetic disk 3 and reading data from the magnetic disk 3.
The device I/F controller 40 includes an off-track detection unit 41. The off-track detection unit 41 detects an off-track, which is an offset of the magnetic head 4 from a target position in a track width direction, while write processing is being performed on the magnetic disk 3. The off-track detection unit 41 notifies an ATI processing section 34 (see
The processor 30 implements various functions in accordance with execution of the firmware stored in the nonvolatile memory 50. When the magnetic disk device 100 is activated, the firmware stored in the nonvolatile memory 50 is loaded to the RAM 20. The processor 30 executes the firmware load to the RAM 20. The functions implemented by the processor 30 will be described below.
When the host I/F controller 10 receives a write command and write data from the host 1, the processor 30 analyzes the write command and stores the write data in the buffer memory 25. The write data are then read from the buffer memory 25 and input to the device I/F controller 40. The device I/F controller 40 encodes the input write data and drives a write element of the magnetic head 4, thereby writing the encoded write data to the magnetic disk 3. During this write operation, the device I/F controller 40 controls the head drive unit 6 and the spindle motor 2 to write the write data to a target track indicated by the command.
On the other hand, when the host I/F controller 10 receives a read command from the host 1, the processor 30 analyzes the read command. The processor 30 then issues an instruction to the device I/F controller 40 based on an analysis result. As a result, the device I/F controller 40 drives the magnetic head 4 to cause a read element of the magnetic head 4 to read a signal. The device I/F controller 40 demodulates the read signal into read data. Furthermore, the read data are decoded and then buffered in the buffer memory 25. The host I/F controller 10 then transfers the read data to the host 1.
In
Furthermore,
It is assumed herein, as shown in
The operations performed by the ATI processing section 34 will be described, assuming that out of the tracks adjacent to the track (N), the write offset amount of the outer-side adjacent track (N−1) (second track, outer track) is w3 and the write offset amount of the inner-side adjacent track (N+1) (third track, inner track) is w4. Furthermore, the operations performed by the ATI processing section 34 will be described, assuming that the write offset amount w3 of the outer-side adjacent track (N−1) as zero (w3=0), as shown in
The ATI processing section 34 writes data in the track (N) (S100). When completed the write processing in S100, the ATI processing section 34 acquires a write offset amount that has occurred during the write processing (S110). It is assumed herein, as shown in
Next, the ATI processing section 34 acquires the write offset amount w5 stored in the ATI management table 36a (S120) and compares w1 with w5 with respect to a magnitude relation. In other words, the ATI processing section 34 determines, for example, whether w1>w5 is satisfied (S130).
If w1>w5 is satisfied in S130 (S130: Yes), the ATI processing section 34 updates the ATI management table 36a (S140). More specifically, the ATI processing section 34 changes (overwrites) the write offset amount w5 stored in the ATI management table 36a to (with) the new write offset amount w1 acquired in S110.
On the other hand, if w1≦w5 is satisfied in S130 (S130: No), the ATI processing section 34 proceeds to processing in 5150. Namely, if w1≦w5 is established, the ATI processing section 34 does not change the write offset amount w5 stored in the ATI management table 36a.
Next, the ATI processing section 34 acquires the write offset amounts w3 and w4 of the tracks (N−1 and N+1) adjacent to the data-written track (N) (S150).
Furthermore, the ATI processing section 34 updates the count values of the adjacent tracks (N−1 and N+1) counted by the counter 42. In one example of the present embodiment, as shown in
Namely, according to the present embodiment, if an offset has occurred in the track (N) at the time of writing of data thereto, the ATI management table 36a is updated in such a manner that the offset amount of the track (N) is a maximum value, as described above. Moreover, the ATI management table 36a is updated in such a manner that write counts to which the weighting coefficient α is applied are added to the count values of the adjacent tracks (N−1 and N+1), respectively.
As described so far, according to the present embodiment, the magnetic disk device 100 is configured such that the ATI management table 36a stores the count values and the offset amounts of the respective tracks. As a result, it is possible to store the write counts which are weighed in accordance with the write offset amounts of the adjacent tracks as the count values.
The ATI processing section 34 compares the ATI count value of each track registered in the ATI management table 36a with a predetermined threshold Th (S200). In other words, the ATI processing section 34 determines, for example, whether the ATI count value is greater than the predetermined threshold Th.
If the count value >Th is satisfied in S200 (S200: Yes), the ATI processing section 34 executes the refresh operation (S210). Namely, the ATI processing section 34 executes the refresh operation only on the track that satisfies (count value)>Th out of the tracks. In the refresh operation, the ATI processing section 34 reads data from the track to be refreshed and rewrites the read data in the same track.
The Viterbi margin is a numerical expression of a rate of selecting a value other than a value selected as an optimum value by a Viterbi detection method and is a value directly linked to the error rate. Likewise, the ATI processing section 34 determines a relational formula fb of the write quality information on the adjacent track and the write count thereof when the write offset amount is a certain value wb (wb>wa) (S310).
Referring back to
In this way, according to the present embodiment, the ATI count value and the write offset amount are managed for every track, a weighting value that increases exponentially in response to the write offset amount is calculated, and this weighting value is added to a weighted value of any of the adjacent tracks. As a result, refresh processing based on the ATI count value is executed at appropriate timing, and thus it is possible to prevent a read error caused by a write offset.
In the above embodiment, the write count value for weighting is calculated based on the maximum value of the write offset amounts. Alternatively, the write count value may be calculated using an average value of the write offset amounts of the track (N).
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein maybe made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2016-187379 | Sep 2016 | JP | national |