Patent Application
20090034110
A disk drive is an information storage device. A disk drive includes one or more disks clamped to a rotating spindle, and at least one head for reading information representing data from and/or writing data to the surfaces of each disk. The head is supported by a suspension coupled to an actuator that may be driven by a voice coil motor. Control electronics in the disk drive provide electrical pulses to the voice coil motor to move the head to desired positions on the disks to read and write the data in circular tracks on the disks, and to park the head in a safe area when not in use or when otherwise desired for protection of the disk drive.
Programs stored within a disk drive for controlling drive functions are often stored as firmware. Selected firmware is configured to multi-task, or otherwise perform more than one operation concurrently. Frequently, firmware uses disk drive hardware to obtain data that is used in one or more of the firmware multi-task operations. However, disk drive hardware is only capable of single-tasking. If a request for data from the firmware to the disk drive hardware takes a long time, the firmware may need to wait for a result from the single-tasking disk drive hardware before completing a firmware operation. A more efficient use of both firmware and disk drive hardware is desirable.
Hereinafter, example embodiments of the present invention will be described with reference to the drawings.
The magnetic disk (discrete track media) 11 is mounted on and rotated by a spindle motor 12. Various digital data are recorded on the magnetic disk 11 in a perpendicular magnetic recording manner. In an example embodiment, the magnetic head incorporated in the head slider 16 is an integrated head including a write head of a single pole structure and a read head using a shielded magneto resistive (MR) read element (such as a GMR film or a TMR film). The suspension 15 is held at one end of the actuator arm 14 to support the head slider 16 to face the recording surface of the magnetic disk 11. The actuator arm 14 is attached to a pivot 13. The voice coil motor (VCM) 17, which drives the actuator, is provided at the other end of the actuator 14. The VCM 17 drives the head suspension assembly to position the magnetic head at an arbitrary radial position of the magnetic disk 11. The circuit board comprises a head IC to generate driving signals for the VCM and control signals for controlling read and write operations performed by the magnetic head.
As the substrate 21, a flat glass substrate may be used. The substrate 21 is not limited to the glass substrate but an aluminum substrate (or any other suitable substrate) may be used. A magnetic material is placed onto the substrate 21 and selectively magnetized to form recording tracks. A magnetic material such as recording track 23, CoCrPt may be used, although the invention is not so limited. Although not shown, a protective film of diamond-like carbon (DLC) may be formed on the surfaces of the media. In one example, lubricant may be applied to the surface of the protective film.
With reference to
As shown in
The preamble section 41 is provided to execute a phase lock loop (PLL) process for synthesizing a clock for a servo signal read relative to deviation caused by rotational deflection of the media, and an AGC process for maintaining appropriate signal amplitude.
The address section 42 may have servo signal recognition codes called servo marks, sector data, cylinder data, and the like formed at the same pitch as that of the preamble section 41 in the circumferential direction using encoding, for example Manchester, or other types of encoding. In particular, since the cylinder data has a pattern exhibiting a data varied for every servo track to provide the minimum difference between adjacent tracks so as to reduce the adverse effect of address reading errors during a seek operation.
The burst section 43 is an off-track detecting region used to detect the amount of off-track with respect to the on-track state for a cylinder address. The burst section 43 includes patterns to locate a read or write head with respect to a desired track center. A pattern in
The principle of detection of a position on the basis of the burst section 43 will not be described in detail. When using the pattern shown, the off-track amount is obtained by calculating the average amplitude value of read signals from the A, B, C, and D bursts. As discussed above, other patterns may be used that do not depend on average amplitude.
As shown in
The head slider 16 may be elastically supported by a gimbal provided on the suspension 15. The suspension 15 is attached to the actuator arm 14, which is rotatably attached to the pivot 13. The VCM 17 generates a torque around the pivot 13 for the actuator arm 14 to move the head in the radial direction of the magnetic disk 11. The HIC is fixed to the actuator arm 14 to amplify input signals to and output signals from the head. The HIC is connected to the PCB 200 via a flexible cable 120. Providing the HIC on the actuator arm 14 may effectively reduce noise in the head signals. However, the HIC may be fixed to the HDA main body.
As described above, the magnetic recording layer is formed on each side of the magnetic disk 11, and the servo zones 19, each shaped like a circular arc, are formed so as to correspond to the locus of the moving head. The specifications of the magnetic disk meet outer and inner diameters and read/write characteristics adapted to a particular drive. The radius of the circular arc formed by the servo zone 19 is given as the distance from the pivot to the magnet head element.
In the illustrated example embodiment, several major electronic components, so-called system LSIs, are mounted on the printed circuit board (PCB) 200. The system LSIs are a controller 210, a read/write channel IC 220, and a motor driver IC 240. The controller 210 includes a disk controller (HDC) and an MPU, and firmware. In one embodiment, the controller 210 includes a first data processing module 225 and a second data processing module 230. A shared data structure 250 is coupled between the first data processing module 225 and the second data processing module 230 as described in more detail below.
The MPU is a control unit of a driving system and includes ROM, RAM, CPU, and a logic processing unit that implements a head positioning control system according to the present example embodiment. The logic processing unit is an arithmetic processing unit comprised of a hardware circuit to execute high-speed calculations. Firmware for the logic processing circuit is saved to the ROM or elsewhere in the disk drive. The MPU controls the drive in accordance with firmware.
The disk controller (HDC) is an interface unit in the hard disk drive which manages the whole drive by exchanging information with interfaces between the disk drive and a host computer 500 (for example, a personal computer) and with the MPU, read/write channel IC 220, and motor driver IC 240.
The read/write channel IC 220 is a head signal processing unit relating to read/write operations. The read/write channel IC 220 is shown as including a read/write path 212 and a servo demodulator 204. The read/write path 212, which can be used to read and write user data and servo data, may include front end circuitry useful for servo demodulation. The read/write path 212 may also be used for writing servo information in self-servowriting. It should be noted that the disk drive also includes other components, which are not shown because they are not necessary to explain the example embodiments.
The servo demodulator 204 is shown as including a servo phase locked loop (PLL) 226, a servo automatic gain control (AGC) 228, a servo field detector 231 and register space 232. The servo PLL 226, in general, is a control loop that is used to provide frequency and phase control for the one or more timing or clock circuits (not shown in
One or more registers (e.g., in register space 232) can be used to store appropriate servo AGC values (e.g., gain values, filter coefficients, filter accumulation paths, etc.) for when the read/write path 212 is reading servo data. One or more registers can be used to store appropriate values (e.g., gain values, filter coefficients, filter accumulation paths, etc.) for when the read/write path 212 is reading user data. A control signal can be used to select the appropriate registers according to the current mode of the read/write path 212. The servo AGC value(s) that are stored can be dynamically updated. For example, the stored servo AGC value(s) for use when the read/write path 212 is reading servo data can be updated each time an additional servo zone 19 is read. In this manner, the servo AGC value(s) determined for a most recently read servo zone 19 can be the starting servo AGC value(s) when the next servo zone 19 is read.
The read/write path 212 includes the electronic circuits used in the process of writing and reading information to and from the magnetic disks 11. The MPU can perform servo control algorithms, and thus may be referred to as a servo controller. Alternatively, a separate microprocessor or digital signal processor (not shown) can perform servo control functions.
In one embodiment, the first data processing module 225 includes programming such as firmware to perform disk drive operations such as data calculations. In one embodiment, the second data processing module 230 includes programming to perform hardware operations.
In one example device operation, firmware in the first data processing module 225 requests data for a calculation that must be retrieved using hardware. The programming in the second data processing module 230 drives the hardware such as voice coil motor, read/write head, etc. as requested to obtain the requested data. The requested data is then delivered to the firmware in the first data processing module 225 through the shared data structure 250 using channels 231 and 221.
As discussed above, in a single-tasking hardware configuration, the firmware in the first data processing module 225 waits while the hardware and the second data processing module 230 obtains the data. Embodiments using the shared data structure 250 provide improved efficiency by allowing multi-tasking on various levels.
In an example method of operation, using the shared data structure 250, the firmware in the first data processing module 225 requests a plurality of disk drive hardware operations, without the need to wait for the results of the previous request before submitting the next request. Because a queue of hardware requests are stored, the firmware in the first data processing module 225 is able to multi task, or work on other operations while the second data processing module 230 obtains the data. In one embodiment, as the results from the hardware and the second data processing module 230 are obtained, the results are stored in memory such as RAM or other fast access memory for later use by the firmware in the first data processing module 225. Storage of the results for use when needed further allows the firmware in the first data processing module 225 to multi task independent of the second data processing module 230.
In one example, another field includes a data input field 262. Examples of data input include the instructions for what is to be retrieved using hardware and the second data processing module 230. In one example, another field includes a data output field 264. An example of data output includes a result of the instructions in the data input field.
Examples of functions that hardware can perform while the firmware is multitasking include address translation requests. In one example, a request from firmware includes translation request between formats such as a cylinder head sector (CHS), physical block address (PBA), logical block address (LBA), etc.
In one example, another field includes a task status field 266. An example of data in the task status field includes a flag or other indicator that the task is complete. In one example if a flag in the task status field is on, then the task is complete, and the firmware in the first data processing module 225 can retrieve results from the data output field 264. If the task status field 266 is not flagged, then the firmware in the first data processing module 225 can continue multi-tasking until the task is complete.
In one example, another field includes a pause flag 268. An example of a method using a pause flag includes pausing execution of a task if the pause flag is on. In one example, insertion of one or more tasks into the queue 251 is better accomplished if task execution is paused while additional tasks are inserted into the queue. Although a pause flag is shown as a field in each task, the invention is not so limited. Other configurations include a pause function in the shared data structure 250 or otherwise in the controller 210 that pause execution of requests while other tasks are being entered into the queue.
In one example, a device used to operate the shared data structure 250 includes multi-port RAM, although the invention is not so limited. Other memory types, and circuitry configurations to share data between multitasking modules are also within the scope of the invention.
In one example, efficiency of the controller 210 and the hard drive is enhanced by changing priority within the queue 251. In one example after a plurality of tasks are entered into the queue, a priority order is changed to reflect data that is more urgently needed by the firmware or first data processing module 225. In one example the existing queue is shuffled to reflect a changed priority of tasks in the queue 251. In one example an additional task is inserted into the queue 251 at a location other than the end of the line 254. In one example the additional task is inserted into a middle location in the queue to effectively change the order of tasks in the queue 251.
In one example additional tasks are limited to insertion at either a beginning of the line 252, or an end of the line 254. A priority of the queue 251 is therefore only changed as additional tasks are inserted. High priority tasks can be inserted at the very front of the line 252, while low priority tasks are inserted at the very end of the line. Configurations using a priority system as described above are simple to program, and require a less sophisticated configuration to operate.
In one example, efficiency of the controller 210 and the hard drive is enhanced by placing the hardware and the second data processing module 230 in a power saving mode when no tasks are within the queue 251. Multi-tasking of both the firmware and first data processing module 225 and independent operation and multitasking of the hardware and second data processing module 230 increase a benefit of a power saving mode in such a configuration. In one example, due to multi-tasking, hardware can work continuously for longer periods of useful time, and likewise move to a power saving state for longer periods of time.
Disk drives using a controller structure as described in embodiments above provides faster more efficient data access and calculation due to features such as multi-tasking of firmware and hardware separately. A shared data structure facilitates queuing of multiple task requests and storing of multiple task results for later use, thus decreasing wait time between modules. Further efficiencies are provided using features such as power saving modes when higher power drain devices such as voice coil motors, etc. are not needed.
A block diagram of a computer system including selected embodiments of disk drives and controllers as described above is shown in
Computer-readable instructions stored on a computer-readable medium are executable by the processing unit 602 of the computer 610. A hard drive, CD-ROM, and RAM are some examples of articles including a computer-readable medium. The computer program may also be termed firmware associated with the disk drive. In some embodiments, a copy of the computer program 625 can also be stored on the magnetic disk 11 of the disk drive.
Although a computer 610 is used as an example, other devices including hard drives such as portable music players, digital video recorders, etc. are within the scope of the invention. The foregoing description of the specific embodiments reveals the general nature of the invention sufficiently that others can, by applying current knowledge, readily modify and/or adapt it for various applications without departing from the generic concept, and therefore such adaptations and modifications are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments.
The Abstract is provided to comply with 37 C.F.R. §1.72(b) to allow the reader to quickly ascertain the nature and gist of the technical disclosure. The Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Accordingly, the invention is intended to embrace all such alternatives, modifications, equivalents and variations as fall within the spirit and broad scope of the appended claims.
