The preferred embodiments will be described with reference to the drawings, wherein like elements have been denoted throughout the figures with like reference numerals.
A detailed description will be made for embodiments of the present invention with reference to the drawings shown below.
First, a description will be made for a method for generating the Maximum Length pseudo random code with reference to
Where an initial value is given as a 16-digit number of 1110001000010100, a tap position is placed on the first digit, fifth digit, seventh digit, and fourteenth digit, pseudo random number P0 is defined by the following formula.
P0=D0 xor D1 xor D2 xor D3 (1)
In this formula, D0 is data of tap position 1, D1 is data of tap position 5, D2 is data of tap position 7 and D3 is data of tap position 14.
According to Data D0 to D3 respectively covering each of the tap positions 1, 5, 7, 14 and the formula (I), the 17th digit pseudo random number P0 is obtained.
Further, this calculation is repeated (in the case of
Then, a light emitting element 20 shown in
The signal processor 30 is constituted with a noise filter amplifying circuit 32 in which, for example, signals obtained by sweeping output signals of a light receiving element array 24 along a direction of measurement axis are cut for high frequency noise by using a low pass filter and also amplified by a predetermined gain, an A/D conversion circuit 34 for converting analog signals output from the noise filter amplifying circuit 32 to digital signals for signal processing, a binary circuit 36 for binarizing an output of the A/D conversion circuit 34 by a predetermined threshold value, a detection/correction circuit 38 for detecting and correcting an error by using the formula (1) for generating a pseudo random code according to the present invention, an ABS position detection circuit 40 for detecting an ABS position by a correlation calculation of scale pattern design values and detected signals, an incremental position detection circuit 42 for detecting an incremental position by generating a 2-phase sine wave of 90-degree phase difference from a 4-phase sine wave of 90-degree phase difference (not illustrated) and making an arc tangent calculation for the purpose of interpolating the ABS position to increase the resolution, and a position synthesizing circuit 44 for outputting a high-resolution absolute position by interpolating an ABS position signal input from the ABS position detection circuit 40 by an incremental position signal input from the incremental position detection circuit 42.
A correlation function used in making a correlation calculation of the ABS position detection circuit 40 is subjected to either a difference calculus method or a multiplication method.
There is a case where an error detection may occur due to attachment of dust and the like on detecting a pattern on the scale 10 as shown in
Therefore, in the present invention, a method for generating a pseudo random code is used to recalculate with respect to the detected pseudo random code. In other words, as shown in
Then, as shown in the upper part of
On the other hand, as shown in the lower part of
Alternatively, it is possible to make recalculation by the following method. In this method, an error detecting bit E is defined with reference to the formula (1) as follows.
E=DO xor D1 xor D2 xor D3 xor P0 (2)
Then, as shown in the upper part of
On the other hand, as shown in the lower part of
Further, although the presence of an error detecting bit can be found, the method shown in
More specifically, in order to correct a detection error, it is necessary to detect at which bit an error occurs. Therefore, the error detecting bits of E0 to E4 are defined with respect to the bits to be recalculated in
Then, where the error detecting bits of E0 to E4 are all to be given as 1, a bit to be recalculated Px is found to be erroneous. Therefore, the bit to be recalculated Px is corrected for the value. In this case, the bit to be recalculated Px in the drawing is corrected from 0 to 1.
In the embodiments described above, an error is detected and corrected on the basis of calculation results obtained by using the above calculation formula. Alternatively, a combination of detection bits at each position is calculated in advance by using the above formula, and the combination of detection bits and positional information are given as a set, which may be stored in a corresponding table. Then, the thus detected detection position bits are used to detect an error with reference to the corresponding table, by which the necessity for making a calculation processing can be eliminated to speed up error detection and correction.
Further, in the embodiments described above, the present invention is applied to a transmissive type scale. The present invention is not restricted thereto, and is similarly applicable to a reflective type scale as shown in
Where a high resolution is not required, it is also possible to omit the detection of an incremental position and carry out only the detection of the ABS position.
It should be apparent to those skilled in the art that the above-described embodiments are merely illustrative which represent the application of the principles of the present invention. Numerous and varied other arrangements can be readily devised by those skilled in the art without departing from the spirit and the scope of the invention.
Number | Date | Country | Kind |
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2006-183560 | Jul 2006 | JP | national |