Patent Application
20080042962
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
The driving circuit 205 includes a clock generator 207 and a plurality of driving devices 209. The clock generator 207 provides three phase-shifted clock signals C1˜C3. Each of driving devices 209 includes an input terminal IN, an output terminal OUT, a first clock-receiving terminal CR1 and a second clock-receiving terminal CR2. Each of the driving devices 209 is connected to each other in series. In other words, the input terminal IN of each driving devices 209 is coupled to the output terminal OUT of the previous driving device 209, and the output terminal OUT of each driving device 209 is coupled to the corresponding scan line SL. Furthermore, the first and the second clock-receiving terminals CR1, CR2 of each driving device 209 are independently used for receiving two of the three phase-shifted clock signals C1˜C3 provided by the clock generator 207.
In the present embodiment, the clock generator 207 provides two of the three phase-shifted signals C1˜C3 to the first and the second clock-receiving terminals CR1, CR2 of each driving device 209. Then, according to the two phase-shifted clock signals, each driving device 209 outputs an auxiliary scan signal VSCAN′ to the other terminal of the corresponding scan line SL. It should be noted that, in another embodiment of the present invention, the clock generator 207 may provide only two phase-shifted clock signals C1, C2 to the first and second clock-receiving terminals CR1 and CR2 of each driving device 209 to achieve the same function.
In the foregoing description of the present embodiment with reference to
In addition, when one particular driving device 209 is defective, just only the output terminal OUT of the defective driving device 209 (marked with an ‘X’ in
In the present embodiment, the clock generator 305 provides three phase-shifted clock signals C1˜C3, and each terminal of each of the scan lines SL is independently couple to a driving device 307. Furthermore, each of the driving devices 307 has an input terminal IN, an output terminal OUT, a first clock-receiving terminal CR1 and a second clock-receiving terminal CR2. Each of the driving devices 307 is connected to each other in serial. In other words, the input terminal IN of each driving device 307 is coupled to the output terminal OUT of the previous driving device 307, and the output terminal OUT of each driving device 307 is coupled to the corresponding scan line SL. Furthermore, the first and the second clock-receiving terminal CR1, CR2 of each driving device 307 are independently used for receiving two of the three phase-shifted clock signals C1˜C3 provided by the clock generator 305.
In addition, the clock generator 305 provides two of the three phase-shifted clock signals C1˜C3 to the first and the second clock-receiving terminals CR1, CR2 of each driving devices 307. Then, according to the two phase-shifted clock signals, each driving devices 307 outputs an auxiliary scan signal VSCAN′ to the two terminals of the corresponding scan line SL. It should be noted that, in another embodiment of the present invention, the clock generator 307 may provide only two phase-shifted clock signals C1, C2 to the first and second clock-receiving terminals CR1 and CR2 of each driving device 307 to achieve the same function.
In the foregoing description of the present embodiment with reference to
In addition, when one particular driving device 307 is defective, just only the output terminal OUT of the defective driving device 307 (marked with an ‘X’ in
Because the display 300 disclosed in
In summary, the display and the display panel thereof in the present invention has at least the following advantages:
1. Because a driving circuit is formed on one side of the display panel to output the auxiliary scan signal to one, terminal of the scan line in the display panel and the other terminal of the scan line in the other side of the display panel receives the scan signal from the gate driver of the existing structure, the two terminals of the scan lines inside the display panel can simultaneously receive the scan signal and the auxiliary scan signal. Hence, not only the display quality of the liquid crystal display is improved and the difficult of repairing the display panel is reduced, but also the production yield rate of the liquid crystal display can be effectively increased.
2. Even when the gate driver of the existing structure is not used, the driving circuit may still be simultaneously formed on both sides of the display panel, not only to acquire the aforementioned advantages, but also to reduce flicker phenomenon in the display and lower the production cost.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 95130614 | Aug 2006 | TW | national |
