Patent Application
20070040768
The present application claims priority from Japanese Application JP 2005-227372 filed on Aug. 5, 2005, the content of which is hereby incorporated by reference into this application.
1. Field of the Invention
The present invention relates to a display apparatus which forms an image of electrons emitted from a plurality of electron sources placed in a matrix form.
2. Description of the Related Art
A display apparatus which forms an image by using electrons emitted from a plurality of electron sources placed in a matrix form is known as, for instance, an FED or an SED (hereinafter they may be sometimes collectively referred to as “FED”). Pulse-shaped driving voltages and selective voltages or non-selective voltages based on image signals are applied to the electron sources. The selective voltage is intended for selecting, for instance, one line of electron sources, and the successive application of selective voltages in the row direction of electron sources (vertical direction) results in sequential scanning. Non-selective voltages are applied to electron sources on all other lines. The one line of electron sources to which the selective voltages emits electrons of a quantity matching the pulse height or the pulse width of the driving voltage. The electron sources to which the non-selective voltages have been applied are prevented from emitting electrons irrespective of the level of driving voltages. Such an FED configuration is disclosed in, for instance, the Japanese Patent Laid-Open No. H9-297556.
In an FED of the above-described configuration, during the period in which non-selective voltages are applied, namely the non-selective period, electron sources do not emit electrons and therefore it is basically desirable for no power loss accompanying scans to arise.
Incidentally, scanning lines for supplying selective voltages or non-selective voltages to the electron sources placed in a matrix form (hereinafter referred to as “line wires”) and data lines for supplying driving voltages (hereinafter referred to as “row wires”) cross each other via insulators. Therefore, where the scanning lines and the data lines are not fully insulated from each other, micro-currents arise at their intersections even during a non-selective period. Hereinafter, such currents will be referred to as leak currents,
Thus the FED, even during a non-selective period, is subject to the generation of leak currents at the intersections according to the potential difference between the driving voltage and the non-selective voltage, and consequently to the generation of a power loss. For instance, where the horizontal number of pixels (the number of electron sources) is 1280 (or 3840 where the electron sources of the three colors including R, G and B are horizontally arrayed) and the vertical number of pixels is 720, leak currents corresponding to 1280×3×(720−1)=2,760,960 electron sources will flow, with the exception of the selected one line. Supposing that the leak current per electron source is 1 μA, the total of the leak currents will be 2.76 A. Therefore, even during a non-selective period, if the non-selective voltage applied to the line wires is 4 V, there will arise a power loss of 2.76×4=11 W.
The present invention is intended to provide a technique that is suitably applicable to reducing power losses. The invention is characterized in that it achieves this purpose by, when non-selective voltages are to be applied to electron sources, applying the non-selective voltage to the electron sources via a current suppressing element such as a resistor. As the amperages of the leak currents arising when non-selective voltages are applied are lowered, power losses due to the leak currents are reduced.
Here, with the capacitance of the electron sources being represented by C, the resistance of the resistor by R and the number of electron sources in the line direction by N, it is preferable to so set the resistance R of the resistor as to satisfy the condition of Mathematical Expression 1 below. This makes it possible to prevent a time constant determined by the product of the resistance R of the resistor and the capacitance C of the electron sources from increasing substantially and thereby to restrain the drop in the responsiveness of the electron sources.
R·(C·N)≦0.2[μS] (Mathematical Expression 1)
Further, with the leak current flowing to one of the electron sources in the non-selective state due to a potential difference between the driving voltage and the non-selective voltage being represented by Ileak, the number of electron sources in the line direction by N, the number of electron sources in the row direction by M and the level of the non-selective voltage by V_REF, it is preferable to so control the leak current Ileak with the resistor as to satisfy the condition of Mathematical Expression 2 below. This makes it possible to restrain the power loss during the non-selective period to 1 W or less.
[Ileak·N·(M−1)·V_REF≦1[W] (Mathematical Expression 2)
Further, with the resistance R of the resistor being represented by R, the resistance of the line wire by Rs, the level of the voltage driving the row wires by E and the amperage to be restrained by I, the resistance R of the resistor may as well be so set as to satisfy the condition of Mathematical Expression 3 below.
R=E/I−Rs (Mathematical Expression 3)
As described above, the invention makes it possible to reduce power losses, especially power losses due to leak currents which arise when non-selective voltages are applied.
Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. The following description of the embodiments will refer to cases in which metal insulator-metal (MIM) type electron sources are used. These embodiments, however, may as well use elements configured or carbon nano-tubes (CNT), Spindt elements or surface-conduction electron-emitters (SCEs) as electron sources. Thus, the invention is applicable to electron sources of any type which may suffer the occurrence of leak currents in the non-selective period.
[Embodiment 1]
To begin with, a first preferred embodiment of the invention will be described with reference to
Scan drivers 2 are connected to the line wires, and data drivers 5, to the row wires.
Image signals, such as television signals or playback signals from a DVD, and their sync signals are supplied to a timing controller 10. The timing controller 10 sends to the scan drivers 2 and the data drivers 5 signals of the best timings for forming an image on the screen of the display panel 1 based on the supplied image signals (signals synchronized with horizontal and vertical sync signals) and image data. In the data drivers 5, image data equivalent to one line on the display panel 1 are held for one horizontal period, and the data are rewritten in every horizontal period. The data drivers 5 generate a driving voltage on the basis of the held one line of image data and apply it to row electrodes.
On the other hand, the scan drivers 2 generate a selective voltage, which is a first scan voltage, and anon-selective voltage, which is a second scan voltage. The selective voltage is generated in response to a horizontal sync signal supplied from the timing controller 10, and so applied to the line wires of the display panel 1 as to successively select (scan) a one line, for instance, of electron sources in the row direction. In this embodiment, the selective voltage is successively applied to M line wires so as to scan one at a time from above at a timing of every horizontal period. When the driving voltage from the data drivers 5 is applied to one line of electron sources to which the selective voltage has been applied (namely the selected electron sources), those electron sources emit a quantity of electrons matching the potential difference between the selective voltage and the driving voltage. The electrons emitted from the electron sources are accelerated by the high voltage of 10 kV applied to the anode terminal of the display panel 1, and collide against phosphors, each placed to match one or another of the electron sources. The phosphors emit light, excited by this collision of electrons.
This causes one horizontal line of an image to be displayed on the screen of the display panel 1. When the scan drivers 2 have successively applied the selective voltage to the line wires of all the lines over one frame period, one frame of image is displayed. In this embodiment, incidentally, the selective voltage and the driving voltage are supposed to be reverse in polarity to each other. For instance, if the selective voltage is positive, the driving voltage is negative.
To the line wires to which the selective voltage is not applied (namely which are in the non-selective period), out of the M line wires, and the electron sources connected thereto, a non-selective voltage is applied. The non-selective voltage is so set that the absolute value of its difference from the maximum level of the driving voltage is smaller than the electron emission start voltage of the electron sources. For instance, where the electron emission start voltage of the electron sources is 6 V and the maximum level of the driving voltage is −4 V, the non-selective voltage is set to 0 V, which is lower than 2 V.
Next, the method of scanning in the display panel 1 and the state of leak current occurrence in the non-selective period will be described with reference to
Now let us suppose that a driving voltage having a waveform represented by “Data driver waveform” in
The situation of the electron sources placed in the selective state will be described with reference to
The light intensity of the phosphor 73 is proportional to the current density of the electron beam 91. The current density is proportional to a current 87. Thus, when emitting light at high brightness, the current 87 is large, and the current 87 is small when emitting light at low brightness. That is to say, desired gradation can be obtained by appropriately controlling the current density of the electron beam. This characteristic of electron sources will be described with reference to
On the other hand, a voltage-amperage characteristic 32 of the electron source may be considered in which the leak current has increased on account of some problem in production. In this case, the leak current is approximately 1 μA in the MIM voltage is from 0 to near 6 V. This means that, even in some other period than when the line wire No. S2 is selected in
This current flows into the output end of the scan drivers 2 via the line wire 66 as shown in
The control logic unit 41 controls the switching elements 42 through 45 in accordance with horizontal sync and vertical sync signals from the timing controller 10. The control logic unit 41 so controls the switching element 42 as to select the selective voltage V_SEL from the first voltage source 46 when the line wire (scan line) No. S1 is to be selected for instance, and so controls the switching elements 43 through 45 as to select the non-selective voltage V_REF from the second voltage source 47 in all other cases. When the line wire (scan line) No. S2 is to be selected, it so controls the switching element 43 as to select the selective voltage V_SEL from the first voltage source 46, and so controls the switching elements 42, 44 and 45 as to select the non-selective voltage V_REF from the second voltage source 47 in all other cases. Thus, the switching elements 42 through 45 perform an action to switch to the selective voltage V_SEL or the non-selective voltage V_REF in every horizontal period. In the vertical blanking period of an image signal, it so controls the switching elements 42 through 45 as to select the reset voltage V_INV from the third voltage source 48.
As described above, even when the non-selective voltage V_REF is selected, a relatively large leak current may flow. In this embodiment, to reduce that leak current, the resistor 49 is provided as a current restraining element. One end of this resistor 49 is connected to the second voltage source 47, and the other end is connected to one of the input terminals of the switching elements 42 through 45. During the non-selective period, non-selective line wires and electron sources are connected to the resistor 49 by the switching elements 42 through 45. This causes the non-selective voltage V_REF generated by the second voltage source 47 to be applied to the switching elements and line wires via the resistor 49. As a flow of a leak current into this resistor 49 invites a voltage drop, the MIM voltage varies downward (in the left direction of the characteristic 32 in
Hereupon, the advantage of this embodiment in a case wherein the driving voltage is 4 Vpp, the selective voltage V_SEL is 12 V, the non-selective voltage V_REF is 6 V and the reset voltage V_INV is 2 V as the operating conditions of the embodiment will be described. In the absence of the resistor 49 under these operating conditions, the leak current per electron source was 1 μA and the power loss, 11 W. However, when the resistor 49 of 4.7 Ω in resistance was connected as shown in
Setting of the resistance of the resistor 49 will now be described. With the resistance of the resistor 49 being represented by R, the capacitance electron source by C and the number of electron sources in the line direction by N, it is preferable to so set the resistance R as to satisfy the condition of Mathematical Expression 1 below.
R·(C·N)≦0.2[μS] (Mathematical Expression 1)
If the resistance of the resistor 49 is too high, the time constant determined by the product CR of the resistance R of the resistor and the capacitance C of the electron sources is enlarged substantially, resulting in a drop in response speed. In a WXGA panel whose number of pixels is 1280×720, one horizontal period is about 20 μS. It is preferable for the delay in one horizontal period to be not more than 1/10of that. Therefore, as indicated by Mathematical Expression 1 above, it is preferable for the time constant on one line of electron sources due to the use of the resistor 49 to be not more than 0.2 μS, 1/10of 20 μS. This enables lo the drop in the responsiveness of electron sources due to the addition of the resistor 49 to be restrained.
Further, with the leak current caused by a potential difference between the driving voltage and the non-selective voltage V_REF to flow to one of the electron sources in the non-selective state being represented by Ileak, the number of electron sources in the line direction by N, the number of electron sources in the row direction by M and the non-selective voltage by V_REF, it is preferable to so restrain the leak current Ileak with the resistor 49 as to satisfy the condition of Mathematical Expression 2 below.
[Ileak·N·(M−1)]·V_REF≦1[W] (Mathematical Expression 2)
In this embodiment, the upper limit of the permissible power loss in the non-selective state is set to 1 W. Since power consumption in the standby state is usually set to around 1 W in a lower power consumption television set, the power loss of 1 W in this embodiment in the non-selective state is considered low enough. Therefore, by so restraining with the resistor 49 the leak current flowing to electron sources in the non-selective state as to satisfy the condition of Mathematical Expression 2 above, the power loss in the non-selective period can be restrained sufficiently (to 1 W or less).
Further, with the resistance of the resistor 49 being represented by R, the resistance of the line wires by Rs, the voltage driving the row wires by E and the current to be restrained, namely the leak current by Ileak, the relationship of Mathematical Expression 3 below holds.
R=E/Ileak−Rs (Mathematical Expression 3)
Thus the resistance R of the resistor 49 may as well be determined with the wiring resistance of the line wires being taken into account. Then, it is preferable for the synthesized resistance of the resistor 49 and of the wiring resistance to satisfy the condition regarding the time constant represented by Mathematical Expression 1 above.
[Embodiment 2]
Next, a second preferred embodiment of the present invention will be described with reference to
The scan driver 2 in this embodiment has the control logic unit 41 which generates control pulses for line sequential scanning and the switching elements 52 through 55, each matching one or another of the line wires. The control logic unit 41 supplies control pulses not only to the switching elements 42 through 45 but also to the additional switching element 50.
Each of the switching elements 52 through 55, in response to a control pulse from the control logic unit 41, so operates as to select either one of the selective voltage V_SEL and the output signal of the additional switching element 50 and supply it to the matching line wire. The output terminal of the additional switching element 50 is connected to the switching elements 42 through 45. Further,a first input terminal of the switching element 50 is connected to the resistor 49 of a second voltage generator, and a second input terminal is connected to the third voltage source 48, which is a third voltage generator. The additional switching element 50, in response to a control pulse from the control logic unit 41, switches over to either the non-selective voltage V_REF from the second voltage source 47 or the reset voltage V_INV from the third voltage source 48, and outputs the selected one. The reset voltage V_INV is selected by the additional switching element 50 in the vertical blanking period of the image signal. Thus, the switching elements 52 through 55 selects the second input terminal, namely the first voltage source 46, in the selective period, and selects the output of second input terminal, namely the additional switching element 50, in the non-selective period and the vertical blanking period of the image signal. Although the first, second and third voltage sources are connected in series to each other in this embodiment as in the first embodiment, they may as well be connected in parallel.
When the line wire (scan line) No. S1 is to be selected for instance, the control logic unit 41 so controls the switching element 42 as to select the selective voltage V_SEL from the first voltage source 46, and so controls the switching elements 53 through 55 as to select the output signal from the additional switching element 50 in all other cases. Then the additional switching element 50, as the resistor 49 is selected in accordance with the control pulse from the control logic unit 41, the non-selective voltage V_REF is supplied to the line wires No. S2 through No. S720 via the resistor 49. Or when the line wire (scan line) No. S2 is to be selected, it so controls the switching element 43 as to select the selective voltage V_SEL from the first voltage source 46, and so controls the switching elements 52, 54 and 55 as to select the output signal from the additional switching element 50 in all other cases. The operation of the additional switching element is the same as in the above-described way.
In this embodiment, as described above, the operations of the switching elements 42 through 45 and the additional switching element 50 cause the resistor 49 to be connected to the line wires placed in the non-selective state and the electron sources connected thereto. The non-selective voltage V_REF is supplied to line wires in the non-selective state via this resistor 49. As in the first embodiment described earlier, since the flowing of a leak current to this resistor 49 invites a voltage drop, the MIM voltage varies downward (in the left direction of the characteristic 32 in
In this way, in this embodiment of the present invention, leak currents in the non-selective period can be restrained to satisfactorily reduce the power loss in that non-selective period. This embodiment is especially effective where the leak currents from electron sources are raised beyond their usual level by various causes in the FED (electron sources) manufacturing process. Although the resistor 49 is used in this embodiment as the current restraining element to keep leak currents low, any other element than a resistor can be used for this purpose if only it has a function to restrain leak currents. It can be readily understood by persons skilled in the art that one of various elements or circuits having such a function can be applied. Further, though the non-selective voltage is supplied to every line wire via the resistor 49 in this embodiment, the configuration may as well be such that the non-selective voltage is supplied via the resistor 49 only to specific line wires whose leak currents are particularly large.
This embodiment also allows, even if leak currents between line wires and row wires result from fluctuations in manufacturing, the power loss accompanying scanning can be kept at or below a certain level. This enables the yield to be enhanced. It is also possible to set the non-selective voltage high to reduce the signal voltage to drive the row wires. Therefore, it is made possible to reduce power consumption by the data drivers, resulting in another advantage of making possible cost saving through large-scale integration of the data driving circuits.
The present invention can be applied to a display device having a mechanism in which leak currents occur where line wires and row wires cross each other. It can be particularly useful in reducing power consumption for scanning in an FED, organic EL or matrix placed LED display apparatus.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-227372 | Aug 2005 | JP | national |
