The present application claims priority to and the benefit of Korean Patent Application No. 10-2021-0014973, filed on Feb. 2, 2021, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference.
Aspects of one or more embodiments relate to a display apparatus.
Display apparatuses are apparatuses that visually or graphically display data. Display apparatuses generally include a substrate partitioned into a display area and a peripheral area. In the display area, a scan line and a data line are insulated from each other, and a plurality of sub-pixels are included. In addition, in the display area, a thin-film transistor and a sub-pixel electrode electrically connected to the thin-film transistor may be provided corresponding to each of the sub-pixels. In addition, in the display area, an opposite electrode provided in common to the sub-pixels may be provided. In the peripheral area, various wires configured to transmit electrical signals to the display area, a scan driver, a data driver, a controller, a pad portion, and the like may be provided.
Among the display apparatuses, a display apparatus such as an organic light-emitting display apparatus may have a structure in which a plurality of layers are stacked to allow each sub-pixel in the display area to emit light.
The above information disclosed in this Background section is only for enhancement of understanding of the background and therefore the information discussed in this Background section does not necessarily constitute prior art.
Aspects of one or more embodiments relate to a display apparatus, and for example, to a display apparatus for reducing a leakage current between sub-pixels.
Aspects of one or more embodiments include a display apparatus for reducing a leakage current between sub-pixels. However, such a technical problem is an example, and embodiments according to the present disclosure are not limited thereto.
Additional characteristics will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments of the disclosure.
According to one or more embodiments, a display apparatus includes a substrate, a 1-1 light-emitting device and a 1-2 light-emitting device arranged over the substrate and each including a first emission layer and a first charge generation layer, a second light-emitting device adjacent to the 1-1 light-emitting device and including a second emission layer including a material that emits light of a color different from that of the first emission layer and a second charge generation layer spaced apart from the first charge generation layer, and a pixel-defining layer including an opening exposing a center portion of a pixel electrode of each of the 1-1 light-emitting device, the 1-2 light-emitting device, and the second light-emitting device, wherein an upper surface of the pixel-defining layer between the 1-1 light-emitting device and the 1-2 light-emitting device includes a first groove concave toward the substrate, wherein the first charge generation layer is cut off around the first groove.
According to some embodiments, the first groove may have a closed shape in a plan view.
According to some embodiments, the first groove may have an inverted tapered shape in a cross-sectional view.
According to some embodiments, the display apparatus may further include a third light-emitting device adjacent to the 1-1 light-emitting device and the second light-emitting device and configured to emit light of a color different from those of the 1-1 light-emitting device and the second light-emitting device, wherein a distance between a center portion of the 1-1 light-emitting device and a center portion of the 1-2 light-emitting device may be greater than a distance between a center portion of the second light-emitting device and a center portion of the third light-emitting device.
According to some embodiments, an area of an emission area of each of the 1-1 light-emitting device and the 1-2 light-emitting device may be greater than an area of an emission area of the second light-emitting device.
According to some embodiments, the 1-1 light-emitting device and the 1-2 light-emitting device may each include a material that emits light of a wavelength between about 450 nm and about 500 nm.
According to some embodiments, the display apparatus may further include an opposite electrode arranged over the pixel-defining layer, wherein the opposite electrode may include a portion surrounding the first groove.
According to some embodiments, an upper surface of the pixel-defining layer between the second light-emitting device and the 1-1 light-emitting device may include a second groove concave toward the substrate.
According to some embodiments, the display apparatus may further include an opposite electrode arranged over the pixel-defining layer, wherein the opposite electrode may include a portion surrounding each of the first groove and the second groove.
According to some embodiments, an upper surface of the pixel-defining layer between the second light-emitting device and the 1-1 light-emitting device may be flat.
According to some embodiments, the first emission layer may include a first sub-emission layer and a second sub-emission layer stacked on each other.
According to some embodiments, the first sub-emission layer and the second sub-emission layer may include materials that emit light of the same color.
According to some embodiments, the display apparatus may further include an auxiliary layer surrounding at least a portion of the first groove, wherein at least a portion of the auxiliary layer may protrude toward a center portion of the first groove.
According to some embodiments, the auxiliary layer may include at least one of silicon oxynitride, silicon oxide, or silicon nitride.
According to some embodiments, the display apparatus may further include a first functional layer overlapping the first charge generation layer and cut off around the first groove and a second functional layer overlapping the second charge generation layer and spaced apart from the first functional layer.
According to one or more embodiments, a display apparatus includes a substrate, a 1-1 light-emitting device and a 1-2 light-emitting device arranged over the substrate and each including a first emission layer and a first functional layer, a second light-emitting device adjacent to the 1-1 light-emitting device and including a second emission layer including a material that emits light of a color different from that of the first emission layer and a second functional layer spaced apart from the first functional layer, and a pixel-defining layer including an opening exposing a center portion of a pixel electrode of each of the 1-1 light-emitting device, the 1-2 light-emitting device, and the second light-emitting device, wherein an upper surface of the pixel-defining layer between the 1-1 light-emitting device and the 1-2 light-emitting device includes a first groove concave toward the substrate, wherein the first functional layer is cut off around the first groove.
According to some embodiments, the first groove may have an inverted tapered shape.
According to some embodiments, an upper surface of the pixel-defining layer between the second light-emitting device and the 1-1 light-emitting device may include a second groove concave toward the substrate.
According to some embodiments, the display apparatus may further include a first charge generation layer overlapping the first functional layer and cut off around the first groove and a second charge generation layer overlapping the second functional layer and spaced apart from the first charge generation layer.
According to some embodiments, the display apparatus may further include an auxiliary layer surrounding at least a portion of the first groove, wherein at least a portion of the auxiliary layer may protrude toward a center portion of the first groove.
The above and other aspects, features, and characteristics of certain embodiments of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
Reference will now be made in more detail to aspects of some embodiments, which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the present embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the embodiments are merely described below, by referring to the figures, to explain aspects of the present description. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b or c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
As the present description allows for various changes and numerous embodiments, certain embodiments will be illustrated in the drawings and described in the written description. Effects and features of one or more embodiments and methods of accomplishing the same will become apparent from the following detailed description of the one or more embodiments, taken in conjunction with the accompanying drawings. However, the present embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.
One or more embodiments will be described below in more detail with reference to the accompanying drawings. Those elements that are the same or are in correspondence with each other are rendered the same reference numeral regardless of the figure number, and redundant descriptions thereof are omitted.
While such terms as “first” and “second” may be used to describe various elements, such elements must not be limited to the above terms. The above terms are used to distinguish one element from another.
The singular forms “a,” “an,” and “the” as used herein are intended to include the plural forms as well unless the context clearly indicates otherwise.
It will be understood that the terms “include,” “comprise,” and “have” as used herein specify the presence of stated features or elements but do not preclude the addition of one or more other features or elements.
It will be further understood that, when a layer, region, or element is referred to as being “on” another layer, region, or element, it can be directly or indirectly on the other layer, region, or element. That is, for example, intervening layers, regions, or elements may be present.
Sizes of elements in the drawings may be exaggerated or reduced for convenience of explanation. In other words, because sizes and thicknesses of elements in the drawings are arbitrarily illustrated for convenience of explanation, the following embodiments are not limited thereto.
When an embodiment may be implemented differently, a certain process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially at the same time or performed in an order opposite to the described order.
As used herein, the expression “A and/or B” refers to A, B, or A and B. In addition, the expression “at least one of A and B” refers to A, B, or A and B.
It will be further understood that, when layers, regions, or elements are referred to as being connected to each other, they may be directly connected to each other or indirectly connected to each other with intervening layers, regions, or elements therebetween. For example, when layers, regions, or elements are referred to as being electrically connected to each other, they may be directly electrically connected to each other or indirectly electrically connected to each other with intervening layers, regions, or elements therebetween.
The x-axis, the y-axis, and the z-axis are not limited to three axes of the rectangular coordinate system and may be interpreted in a broader sense. For example, the x-axis, the y-axis, and the z-axis may be perpendicular to one another or may represent different directions that are not perpendicular to one another.
As shown in
The substrate 100 may include various materials such as glass, metal, or plastic. According to some embodiments, the substrate 100 may include a flexible material. In this regard, the flexible material refers to a substrate that may be bent, curved, folded, and/or rolled (e.g., with relative ease, or without damaging the substrate and corresponding components of the display apparatus 1). The substrate 100 including a flexible material may include, for example, ultra-thin glass, metal, or plastic, or any other suitable flexible substrate material.
A plurality of sub-pixels PX including various light-emitting devices such as an organic light-emitting diode may be arranged in the display area DA of the substrate 100. The plurality of sub-pixels PX may display images by emitting light. The sub-pixels PX may each emit red, green, or blue light. One pixel P may be implemented by driving rendering of the sub-pixels PX. For example, a pixel P may include a red sub-pixel PX, a green sub-pixel PX, and a blue sub-pixel PX.
As shown in
When the display area DA is viewed in a planar shape, the display area DA may have a rectangular shape as shown in
The peripheral area PA of the substrate 100 is an area arranged around (e.g., outside a footprint of) the display area DA and may be an area where no images are displayed. The peripheral area PA may entirely or partially surround the display area DA. Various wires configured to transmit electrical signals to be applied to the display area DA and a pad portion PAD to which a printed circuit board or a driver integrated circuit (IC) chip is attached may be located in the peripheral area PA.
In the embodiments described with respect to
Hereinafter, an arrangement of each sub-pixel will be described with reference to
An n-th column of a plurality of pixels may include the second sub-pixels PX2 and third sub-pixels PX3 alternately arranged. A (n+1)th column adjacent to the n-th column may include 1-1 sub-pixels PX1-1 and 1-2 sub-pixels PX1-2 alternately arranged. A (n+2)th column adjacent to the (n+1)th column may include the second sub-pixels PX2 and the third sub-pixels PX3 alternately arranged. An arrangement of sub-pixels included in the (n+2)th column may be the same as that of sub-pixels included in the n-th column. A (n+3)th column adjacent to the (n+2)th column may include the 1-1 sub-pixels PX1-1 and the 1-2 sub-pixels PX1-2 alternately arranged. An arrangement of sub-pixels included in the (n+3)th column may be the same as that of sub-pixels included in the (n+1)th column. Thus, according to some embodiments, the columns may include alternating arrangements of the second sub-pixels PX2 and the third sub-pixels PX3 grouped together in a column, followed by the 1-1 sub-pixels PX1-1 and 1-2 sub-pixels PX1-2 grouped together in the next column, with the pattern repeating in groups of two columns, such that the second sub-pixels PX2 and the third sub-pixels PX3 may be located in every other column, and the 1-1 sub-pixels PX1-1 and 1-2 sub-pixels PX1-2 may be located in every other column between or adjacent to the columns of the second sub-pixels PX2 and the third sub-pixels PX3.
An m-th row of the plurality of pixels may include the second sub-pixels PX2 and the 1-1 sub-pixels PX1-1 alternately arranged. A (m+1)th row adjacent to the m-th row may include the third sub-pixels PX3 and the 1-1 sub-pixels PX1-1 alternately arranged. A (m+2)th row adjacent to the (m+1)th row may include the second sub-pixels PX2 and the 1-2 sub-pixels PX1-2 alternately arranged. A (m+3)th row adjacent to the (m+2)th row may include the third sub-pixels PX3 and the 1-2 sub-pixels PX1-2 alternately arranged.
That is, the 1-1 sub-pixels PX1-1 may be integrally arranged at a position where the (n+1)th column and the m-th row meet each other and a position where the (n+1)th column and the (m+1)th row meet each other. The 1-2 sub-pixels PX1-2 may be integrally arranged at a position where the (n+1)th column and the (m+2)th row meet each other and a position where the (n+1)th column and the (m+3)th row meet each other.
The second sub-pixels PX2 may be arranged at a position where the n-th column and the m-th row meet each other, and the third sub-pixels PX3 may be arranged at a position where the n-th column and the (m+1)th row meet each other. In this regard, n and m may be natural numbers, that is, integers greater than 0.
Thus, as described above, and illustrated in
Due to the above arrangements, an emission area of the 1-1 sub-pixel PX1-1 and an emission area of the 1-2 sub-pixel PX1-2 may be greater than an emission area of the second sub-pixel PX2 or an emission area of the third sub-pixel PX3. For example, an emission area of the 1-1 sub-pixel PX1-1 and an emission area of the 1-2 sub-pixel PX1-2 may be at least (or about) twice as much as an emission area of the second sub-pixel PX2 or an emission area of the third sub-pixel PX3. Accordingly, a distance D1 between a center portion of the 1-1 sub-pixel PX1-1 and a center portion of the 1-2 sub-pixel PX1-2 may be greater than a distance D2 between a center portion of the second sub-pixel PX2 and a center portion of the third sub-pixel PX3. Due to the above configurations, emission life of the 1-1 sub-pixel PX1-1 and the 1-2 sub-pixel PX1-2 may be improved.
The 1-1 sub-pixel PX1-1 and the 1-2 sub-pixel PX1-2 adjacent to each other may include a same first intermediate layer 120. The second sub-pixel PX2 adjacent to the 1-1 sub-pixel PX1-1 or the 1-2 sub-pixel PX1-2 may include a second intermediate layer 130 spaced apart from the first intermediate layer 120. The third sub-pixel PX3 may be adjacent to the 1-1 sub-pixel PX1-1 and the second sub-pixel PX2. Alternatively, the third sub-pixel PX3 may be adjacent to the 1-2 sub-pixel PX1-2 and the second sub-pixel PX2. The third sub-pixel PX3 may include a third intermediate layer 140 spaced apart from the first intermediate layer 120 and the second intermediate layer 130.
The second sub-pixel PX2 may emit light of a color different from that of the 1-1 sub-pixel PX1-1. For example, the 1-1 sub-pixel PX1-1 may emit blue light, and the second sub-pixel PX2 may emit red light. The third sub-pixel PX3 may emit light of a color different from those of the 1-1 sub-pixel PX1-1 and the second sub-pixel PX2. For example, the 1-1 sub-pixel PX1-1 may emit blue light, the second sub-pixel PX2 may emit red light, and the third sub-pixel PX3 may emit green light.
A first groove H1 concave toward the substrate 100 may be arranged between the 1-1 sub-pixel PX1-1 and the 1-2 sub-pixel PX1-2. The first intermediate layer 120 may be cut off around (or at) the first groove H1. The first groove H1 may have a closed shape in a plan view when viewed in a z-axis direction. For example, the first groove H1 may have a rectangular shape when viewed in the z-axis direction. In the embodiments described with respect to
The first groove H1 may be provided in an upper surface of a pixel-defining layer 119 (refer to
As shown in
The substrate 100 may include glass, metal, or polymer resin. When at least a portion of the display apparatus 1 is bent, or the display apparatus 1 is flexible, the substrate 100 needs to be flexible or bendable. In this case, the substrate 100 may include, for example, polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 may be variously modified, for example, to have a multilayer structure including two layers each including the polymer resin described above and a barrier layer including an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, etc.) between the two layers. Further, in a case where the substrate 100 is not bent, the substrate 100 may include glass, etc.
The buffer layer 111 may be arranged on the substrate 100 to reduce or prevent penetration of foreign materials, moisture, or external air from below the substrate 100 and provide a flat surface on the substrate 100. The buffer layer 111 may include an inorganic material such as oxide or nitride, an organic material, or an organic-inorganic complex material and may have a single-layer or multi-layer structure of an inorganic material and an organic material. A barrier layer for preventing penetration of external air may be further between the substrate 100 and the buffer layer 111. The buffer layer 111 may include silicon oxide (SiO2) or silicon nitride (SiNx).
A thin-film transistor TFT may be arranged on the buffer layer 111. The thin-film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. The thin-film transistor TFT may be connected to an organic light-emitting diode to drive the organic light-emitting diode OLED.
The semiconductor layer Act may be arranged on the buffer layer 111 and may include polysilicon. According to some embodiments, the semiconductor layer Act may include amorphous silicon. According to some embodiments, the semiconductor layer Act may include oxide of at least one material selected from the group including indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (TI), and zinc (Zn). The semiconductor layer Act may include a channel region and source and drain regions doped with impurities.
The first gate insulating layer 112 may cover the semiconductor layer Act. The first gate insulating layer 112 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). The first gate insulating layer 112 may have a single-layer or multi-layer structure including the inorganic insulating material described above.
The gate electrode GE may be arranged on the first gate insulating layer 112 to overlap the semiconductor layer Act. The gate electrode GE may include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. and may have a single-layer or multi-layer structure. For example, the gate electrode GE may have a multi-layer structure including a molybdenum (Mo) layer and an aluminum (Al) layer.
The second gate insulating layer 113 may cover the gate electrode GE. The second gate insulating layer 113 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). The second gate insulating layer 113 may have a single-layer or multi-layer structure including the inorganic insulating material described above.
An upper electrode CE2 of a storage capacitor Cst may be arranged on the second gate insulating layer 113. The upper electrode CE2 of the storage capacitor Cst may overlap the gate electrode GE. In this regard, the gate electrode GE may be a lower electrode CE1 of the storage capacitor Cst. The upper electrode CE2 and the lower electrode CE1 may constitute the storage capacitor Cst. The upper electrode CE2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and/or copper (Cu) and may have a single-layer or multi-layer structure of the material described above.
The interlayer insulating layer 115 may cover the upper electrode CE2. The interlayer insulating layer 115 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). The interlayer insulating layer 115 may have a single-layer or multi-layer structure including the inorganic insulating material described above.
The source electrode SE and the drain electrode DE of the thin-film transistor TFT may be arranged on the interlayer insulating layer 115. The source electrode SE and the drain electrode DE may include any suitable conductive material including, for example, molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. and may have a multi-layer or single-layer structure including the material described above. For example, the source electrode SE and the drain electrode DE may have a multi-layer structure of Ti/Al/Ti.
The planarization layer 117 may be arranged on the interlayer insulating layer 115 to cover the source electrode SE and the drain electrode DE. The planarization layer 117 may include an organic material or an inorganic material and may have a single-layer structure or a multi-layer structure. The planarization layer 117 may include a first planarization layer 117a and a second planarization layer 117b. Accordingly, a conductive pattern such as wiring may be formed between the first planarization layer 117a and the second planarization layer 117b, which may be advantageous for high integration. A connection electrode CM may be arranged on the first planarization layer 117a.
The planarization layer 117 may include a general commercial polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), poly(methyl methacrylate) (PMMA), or polystyrene (PS), a polymer derivative having a phenol-based group, an acryl-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or the like. The planarization layer 117 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). After the planarization layer 117 is formed, chemical mechanical polishing may be performed on an upper surface of the layer to provide a flat upper surface.
Organic light-emitting diodes, for example, the 1-1 and 1-2 organic light-emitting diodes OLED1-1 and OLED1-2, may be arranged on the second planarization layer 117b. The pixel electrode 121 of each of the organic light-emitting diodes, for example, the 1-1 and 1-2 organic light-emitting diodes OLED1-1 and OLED1-2, may be arranged on the second planarization layer 117b and may be electrically connected to the thin-film transistor TFT through the connection electrode CM.
The pixel electrode 121 may include conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). The pixel electrode 121 may include a reflective film including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. For example, the pixel electrode 121 may have a structure having films including ITO, IZO, ZnO, or In2O3 on/under the reflective film described above. For example, the pixel electrode 121 may have a structure in which ITO/Ag/ITO is stacked.
The pixel-defining layer 119 on the planarization layer 117 may cover the edge of the pixel electrode 121 and may include an opening OP exposing a center portion of the pixel electrode 121. A size and shape of an emission area of the organic light-emitting diode OLED, that is, a sub-pixel PX, may be defined by the opening OP. The pixel-defining layer 119 may prevent an arc, etc. from occurring at the edge of the pixel electrode 121 by increasing a distance between the edge of the pixel electrode 121 and the opposite electrode 123 arranged over the pixel electrode 121. The pixel-defining layer 119 may include an organic insulating material such as polyimide, polyamide, acrylic resin, HMDSO, and phenolic resin and may be formed by a method such as spin coating.
The first intermediate layer 120 may be arranged on the pixel-defining layer 119 and the pixel electrode 121. The first intermediate layer 120 may include a first emission layer 124 for emitting light, a first functional layer 126 for helping emission of the first emission layer 124, and a first charge generation layer 125.
As shown in
The first emission layer 124 may include a first sub-emission layer EML1 and a second sub-emission layer EML2 stacked to be spaced apart from each other. The first emission layer 124 may be a layer in which holes and electrons are combined to emit light. The first sub-emission layer EML1 and the second sub-emission layer EML2 may include materials that emit light of the same color. For example, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material that emits light of a wavelength between about 450 nm and about 500 nm. That is, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material that emits blue light. Accordingly, the 1-1 organic light-emitting diode OLED1-1 or the 1-2 organic light-emitting diode OLED1-2 may include a material that emits light of a wavelength between about 450 nm and about 500 nm.
The first charge generation layer 125 may lower the Fermi barrier to help movement of electrons and holes. The first charge generation layer 125 may include a plurality of layers including an N-type charge generation layer including an N-type dopant material and an N-type host material and a P-type charge generation layer including a P-type dopant material and a P-type host material.
The first functional layer 126 may overlap the first charge generation layer 125. The first functional layer 126 may include a first sub-functional layer 1261 and a second sub-functional layer 1262. The first sub-functional layer 1261 may include a hole injection layer HIL, a hole transport layer HTL, an electron transport layer ETL, and an electron injection layer EIL. The hole injection layer HIL may be a layer into which holes transferred from the pixel electrode 121 or a charge generation layer are injected. The hole transport layer HTL may transfer holes transferred from the hole injection layer HIL to the first emission layer 124. The electron injection layer EIL may be a layer into which electrons transferred from the opposite electrode 123 or the charge generation layer are injected. The electron transport layer ETL may transfer electrons transferred from the electron injection layer EIL to an emission layer. That is, the hole injection layer HIL, the hole transport layer HTL, the first sub-emission layer EML1, the electron transport layer ETL, and the electron injection layer EIL may be sequentially stacked to emit light.
The second sub-functional layer 1262 may also have the same stacked structure as the first sub-functional layer 1261. That is, the second sub-functional layer 1262 may also have a stacked structure of the hole injection layer HIL, the hole transport layer HTL, the electron transport layer ETL, and the electron injection layer EIL. Accordingly, the hole injection layer HIL, the hole transport layer HTL, the second sub-emission layer EML2, the electron transport layer ETL, and the electron injection layer EIL may be sequentially stacked to emit light.
Although
Hereinafter, a stacked structure of each layer will be described in more detail with reference to
Referring to
The first charge generation layer 125 may include a first sub-charge generation layer CGL1 and a second sub-charge generation layer CGL2. The first sub-charge generation layer CGL1 and the second sub-charge generation layer CGL2 may each include a plurality of layers including an N-type charge generation layer including an N-type dopant material and an N-type host material and a P-type charge generation layer including a P-type dopant material and a P-type host material.
The first functional layer 126 may include the first sub-functional layer 1261, the second sub-functional layer 1262, and a third sub-functional layer 1263. The third sub-functional layer 1263 may also have the same stacked structure as that of the first sub-functional layer 1261 described above. That is, the third sub-functional layer 1263 may also have a stacked structure of the hole injection layer HIL, the hole transport layer HTL, the electron transport layer ETL, and the electron injection layer EIL. Accordingly, the hole injection layer HIL, the hole transport layer HTL, the third sub-emission layer EML3, the electron transport layer ETL, and the electron injection layer EIL may be sequentially stacked to emit light. Although
Although
Referring to
Referring to
The opposite electrode 123 may be arranged on the first intermediate layer 120. The opposite electrode 123 may include a conductive material having a low work function. For example, the opposite electrode 123 may include a (semi)transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the opposite electrode 123 may further include a layer, such as ITO, IZO, ZnO, or In2O3, on a (semi)transparent layer including the material described above.
Layers from the pixel electrode 121 to the opposite electrode 123 may constitute an organic light-emitting diode. An upper layer for protecting the opposite electrode 123 and increasing light extraction efficiency may be formed on the opposite electrode 123.
The first groove H1 may be arranged between the 1-1 sub-pixel PX1-1 and the 1-2 sub-pixel PX1-2. The first groove H1 may be concave in a direction from an upper surface of the pixel-defining layer 119 toward the substrate 100. The first groove H1 may include an inverted tapered shape in a cross-sectional view. In other words, the first groove H1 may have an undercut shape. As the first groove H1 of such a shape is provided, the first intermediate layer 120 may be cut off in the first groove H1.
That is, the first charge generation layer 125 and the first functional layer 126 may be cut off around the first groove H1. As in the embodiments of
According to some embodiments, as illustrated with respect to
As shown in
As the first charge generation layer 125 does, the second charge generation layer 135 may include a plurality of layers including an N-type charge generation layer including an N-type dopant material and an N-type host material and a P-type charge generation layer including a P-type dopant material and a P-type host material.
As the first functional layer 126 does, the second functional layer 136 may also include a first sub-functional layer 1361 and a second sub-functional layer 1362.
A stacking order of an emission layer, a functional layer, and a charge generation layer included in the second intermediate layer 130 may be the same as a stacking order of an emission layer, a functional layer, and a charge generation layer included in the first intermediate layer 120. However, the emission layer included in the second intermediate layer 130 may be the second emission layer 134 including a material that emits light of a color different from that of the first emission layer 124 and spaced apart from the first emission layer 124. In addition, the charge generation layer included in the second intermediate layer 130 may be the second charge generation layer 135 spaced apart from the first charge generation layer 125. In addition, the functional layer included in the second intermediate layer 130 may be the second functional layer 136 overlapping the second charge generation layer 135 and spaced apart from the first functional layer 126. In
The second intermediate layer 130 including the second emission layer 134 and the second charge generation layer 135 may be spaced apart from the first intermediate layer 120. Accordingly, a problem in that an adjacent organic light-emitting diode emits light due to a leakage current may not occur between the second organic light-emitting diode OLED2 and the 1-1 organic light-emitting diode OLED1-1. Accordingly, no groove may be formed in the pixel-defining layer 119 between the second organic light-emitting diode OLED2 and the 1-1 organic light-emitting diode OLED1-1, and an upper surface of the pixel-defining layer 119 may be flat.
A third organic light-emitting diode according to some embodiments may be an organic light-emitting diode including an emission area of the third sub-pixel PX3. The third organic light-emitting diode may include the third intermediate layer 140. The third intermediate layer 140 includes an emission layer that emits different light from the first emission layer 124 and the second emission layer 134. For example, an emission layer included in the third intermediate layer 140 may include a material that emits light of a wavelength between about 500 nm and about 570 nm. That is, an emission layer included in the third intermediate layer 140 may include a material that emits green light. A stacking order of an emission layer, a functional layer, and a charge generation layer included in the third intermediate layer 140 may be the same as the stacking order of the emission layer, the functional layer, and the charge generation layer included in the first intermediate layer 120 or the second intermediate layer 130, and thus, a detailed description thereof is omitted below.
The third intermediate layer 140 may be spaced apart from the first intermediate layer 120 and the second intermediate layer 130. Accordingly, a problem in that an adjacent organic light-emitting diode emits light due to a leakage current may not occur between the third organic light-emitting diode and the second organic light-emitting diode OLED2 or between the third organic light-emitting diode and the 1-1 organic light-emitting diode OLED1-1. Accordingly, no groove may be formed in the pixel-defining layer 119 between the third organic light-emitting diode and the second organic light-emitting diode OLED2 or between the third organic light-emitting diode and the 1-1 organic light-emitting diode OLED1-1, and an upper surface of the pixel-defining layer 119 may be flat.
As shown in
For the same reason, a third groove H3 may be arranged between the 1-1 sub-pixel PX1-1 and the third sub-pixel PX3. In addition, a fourth groove H4 may be arranged between the third sub-pixel PX3 and the second sub-pixel PX2. In the same manner, the second groove H2 may also be arranged between the 1-2 sub-pixel PX1-2 and the second sub-pixel PX2, and the third groove H3 may also be arranged between the 1-2 sub-pixel PX1-2 and the third sub-pixel PX3.
As described above, the pixel-defining layer 119 may include an opening exposing a center portion of the pixel electrode 121 of each of the 1-1 sub-pixel PX1-1, the 1-2 sub-pixel PX1-2, the second sub-pixel PX2, and the third sub-pixel PX3. The opposite electrode 123 covering the 1-1 sub-pixel PX1-1, the 1-2 sub-pixel PX1-2, the second sub-pixel PX2, and the third sub-pixel PX3 may be arranged over the pixel-defining layer 119. A partial area of the opposite electrode 123 may be cut off by the first to fourth grooves H1 to H4. That is, the opposite electrode 123 may cover the entire display area DA and may include a portion surrounding each of the first to fourth grooves H1 to H4.
In the cross-sectional view of
As shown in
As described above, according to one or more embodiments, a display apparatus for reducing a leakage current between sub-pixels may be implemented. However, embodiments according to the present disclosure are not limited by such an effect.
It should be understood that embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments. While one or more embodiments have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the following claims, and their equivalents.
Number | Date | Country | Kind |
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10-2021-0014973 | Feb 2021 | KR | national |