Patent Grant
8803773
1. Field of the Invention
The present invention relates to an active-matrix-type display apparatus which uses light-emission elements, such as EL (electroluminescence) elements that emit light when driving current flows through an organic semiconductor film or LED (light-emitting diode) elements, and thin-film transistors (hereinafter referred to as “TFTs”) that control the light-emission operation of this light-emission element. More particularly, the present invention relates to layout optimization technology for improving the display characteristics thereof.
2. Description of Related Art
Active-matrix-type display apparatuses which use current-control-type light-emission elements, such as EL elements or LED elements, have been proposed. Since any of the light-emission elements used in this type of display apparatus may emit light by itself, unlike a liquid-crystal display device, a backlight is not required, and there are advantages in that viewing angle dependence is small.
Specifically, as shown in
In contrast, in the first TFT 20, a potential holding electrode “st” which is electrically connected to the source and drain regions is electrically connected to an extended portion 310 of a gate electrode 31. On the side of the lower layers thereof, a semiconductor film 400 opposes this extended portion 310 via a gate insulation film 50, and since this semiconductor film 400 is made to conduct by impurities introduced thereinto, this semiconductor film 400, together with the extended portion 310 and the gate insulation film 50, constitute the holding capacitor “cap”. Here, the common power-feed line “com” is electrically connected to the semiconductor film 400 via the contact hole of the first interlayer insulation film 51. Therefore, since the holding capacitor “cap” holds an image signal supplied from the data lines “sig” via the first TFT 20, even if the first TFT 20 is turned off, the gate electrode 31 of the second TFT 30 is held at a potential corresponding to the image signal. Therefore, since the driving current continues to flow to the light-emission element 40 from the common power-feed lines “com”, the light-emission element 40 continues to emit light.
However, in comparison with the liquid-crystal display apparatus, in the display apparatus 1A, there is a problem in that the display quality cannot be improved because the pixels 7 are narrower by an amount corresponding to the requirement of the second TFT 30 and the common power-feed lines “com”.
Accordingly, an object of the present invention is to provide a display apparatus capable of improving display quality by expanding the light-emission area of pixels by improving the layout of pixels and common power-feed lines formed on a substrate.
In order to solve the above-described problems, the present invention provides a display apparatus comprising on a substrate: a plurality of scanning lines; a plurality of data lines extending in a direction intersecting the extension direction of the scanning lines; a plurality of common power-feed lines parallel to the data lines; and pixels formed in a matrix by the data lines and the scanning lines, each of the pixels comprising: a first thin-film transistor in which a scanning signal is supplied to its first gate electrode via the scanning lines; a holding capacitor for holding an image signal supplied from the data lines via the first thin-film transistor; a second thin-film transistor in which the image signal held by the holding capacitor is supplied to its second gate electrode; and a light-emission element having an organic semiconductor film, which emits light by driving current that flows between a pixel electrode and a counter electrode when the pixel electrode is electrically connected to the common power-feed line via the second thin-film transistor in a section between the layers of the pixel electrodes formed for each of the pixels and the counter electrodes opposing the pixel electrodes, wherein pixels in which the driving current is passed in a section between the pixels and the common power-feed lines are arranged on both sides of the common power-feed lines, and the data lines pass on a side opposite to the common power-feed lines with respect to the pixels.
Specifically, in the present invention, since a data line, a group of pixels connected thereto, one common power-feed line, a group of pixels connected thereto, and a data line for supplying a pixel signal to the group of pixels are assumed to be one unit and this is repeated in the extension direction of scanning lines, pixels for two rows are driven by one common power-feed line. Therefore, the formation area of common power-feed lines can be made more narrow than in a case in which a common power-feed line is formed for each group of pixels for one row, the light-emission area of the pixels can be expanded correspondingly. Therefore, it is possible to improve display performance, such as luminance, contrast ratio, and so on.
When the construction is formed in this manner, it is preferable that, for example, in a section between two pixels arranged in such a manner as to sandwich the common power-feed line, the first thin-film transistor, the second thin-film transistor, and the light-emission elements be disposed in linear symmetry about the common power-feed line.
In the present invention, also, it is preferable that the pitch of the centers of the formation areas of the organic semiconductor films be equal at every interval between adjacent pixels along the extension direction of the scanning lines. When the construction is formed in this manner, it is convenient to cause a material for an organic semiconductor film to be discharged from an ink-jet head and to form an organic semiconductor film. That is, since the pitch of the centers of the formation areas of the organic semiconductor films is equal, the material for an organic semiconductor film may be discharged from the ink-jet head at even intervals. This simplifies the movement control mechanism of the ink-jet head, and the position accuracy is improved.
Further, it is preferable that the formation area of the organic semiconductor film be surrounded by a bank layer formed from an insulation film thicker than the organic semiconductor film, and that the bank layer be formed in such a manner as to cover the data lines and the common power-feed line at the same width dimension. When the construction is formed in this manner, since the bank layer prevents the extrusion of the organic semiconductor film into its periphery when the organic semiconductor film is formed by an ink-jet method, the organic semiconductor film can be formed within a predetermined area. Further, since the bank layer covers the data lines and the common power-feed line at the same width dimension, this is suitable for making the pitch of the centers of the formation areas of the organic semiconductor films equal at any interval of the adjacent pixels along the extension direction of the scanning lines. Here, the counter electrodes are formed at least on nearly the entire surface on the pixel area or over a wide area in a stripe form, and are in a state of opposing the data lines. Therefore, if kept in this state, a large capacitance parasitizes the data lines. However, in the present invention, since a bank layer is interposed between the data lines and the counter electrodes, it is possible to prevent parasitization of the capacitance formed in a section adjoining the counter electrodes into the data lines. As a result, since the load in the data-side driving circuit can be reduced, power consumption can be reduced or a higher-speed display operation can be achieved.
In the present invention, it is preferable that a wiring layer be formed at a position corresponding to a section between two data lines passing on a side opposite to the common power-feed line with respect to the pixels. When two data lines are parallel to each other, there is a risk that crosstalk may occur between these data lines. However, in the present invention, since another wiring layer different from those passes between two data lines, the crosstalk can be prevented by merely maintaining such a wiring layer at a fixed potential at least within one horizontal scanning period of the image.
In this case, between two adjacent data lines of the plurality of data lines, it is preferable that sampling of an image signal be performed at the same timing. When the construction is formed in this manner, since potential variations during sampling occur simultaneously in a section between two data lines, it is possible to more reliably prevent an occurrence of crosstalk between these data lines.
In the present invention, it is preferable that nearly the same number of pixels of two types, in which the light-emission elements are driven by a driving current whose polarity is inverted, be among the plurality of pixels in which the driving current is passed in a section between the pixels and the common power-feed lines.
When the construction is formed in this manner, the driving current which flows from the common power-feed line to the pixels cancels the driving current which flows from the pixels to the common power-feed line, thereby a smaller amount of driving current which flows through the common power-feed line is required. Therefore, since the common power-feed lines can be made narrow correspondingly, it is possible to expand the display area with respect to the panel exterior. It is also possible to eliminate luminance variations which occur due to a difference between driving currents.
For example, the construction is formed in such a way that the polarity of the driving current in each pixel is the same in the extension direction of the data lines and that, in the extension direction of the scanning lines, the polarity of the driving current in each pixel is inverted for each pixel or every two pixels. The construction may also be formed in such a way that the polarity of the driving current in each pixel is the same in the extension direction of the scanning lines and that, in the extension direction of the data lines, the polarity of the driving current in each pixel is inverted for each pixel or every two pixels. Of these constructions, in the case of the construction in which the polarity of the driving current is inverted every two pixels, for the pixels through which driving current of the same polarity flows, a counter electrode can be used in common between adjacent pixels, making it possible to reduce the number of slits of the counter electrode. That is, polarity inversion can be realized without increasing the resistance value of the counter electrodes through which a large current flows.
Furthermore, the construction may be formed in such a way that the polarity of the driving current in each pixel is inverted for each pixel in both the extension direction of the scanning lines and the extension direction of the data lines.
FIGS. 8(A)-(G) includes step sectional views showing a method of manufacturing a display apparatus of the present invention.
FIGS. 16(A)-(B) are sectional views showing the construction of light-emission elements formed in the two pixels shown in
The embodiments of the present invention will be described below with reference to the drawings.
(Overall Construction of Active-Matrix Substrate)
As shown in
(Arrangement of Common Power-Feed Lines and Pixels)
In the display apparatus 1, similarly to an active-matrix substrate of a liquid-crystal display apparatus, on the transparent substrate 10, a plurality of scanning lines “gate”, and a plurality of data lines “sig” which extend in a direction intersecting the extension direction of the scanning lines “gate” are formed. As shown in
Each of these pixels 7 is formed with a first TFT 20 in which a scanning signal is supplied to its gate electrode 21 (first gate electrode) via the scanning lines “gate”. One of the source and drain regions of the second TFT 20 is electrically connected to the data line “sig”, and the other is electrically connected to a potential holding electrode “st”. With respect to the scanning lines “gate”. Capacitance lines “cline” are disposed in parallel, with a holding capacitor “cap” being formed between the capacitance line “cline” and the potential holding electrode “st”. Therefore, when the first TFT 20 is selected by the scanning signal and is turned on, the image signal is written from the data line “sig” into the holding capacitor “cap” via the first TFT 20.
A gate electrode 31 (second gate electrode) of the second TFT 30 is electrically connected to the potential holding electrode “st”. One of the source and drain regions of the second TFT 30 is electrically connected to the common power-supply lines “com”, and the other is electrically connected to one of the electrodes (pixel electrode to be described later) of a light-emission element 40. The common power-supply lines “com” are maintained at a fixed potential. Therefore, when the second TFT 30 is turned on, the current in the common power-supply line “com” flows to the light-emission element 40 via this TFT, causing the light-emission element 40 to emit light.
In this embodiment, on both sides of the common power-feed lines “com”, a plurality of pixels 7 to which driving current is supplied by the common power-feed lines “com” are arranged, and two data lines “sig” pass on a side opposite to the common power-feed lines “com” with respect to these pixels 7. That is, a data line “sig”, a group of pixels connected thereto, one common power-feed line “com”, a group of pixels connected thereto, and a data line “sig” for supplying a pixel signal to the group of pixels are assumed to be one unit. This is repeated in the extension direction of scanning lines “gate”, and one common power-feed line “com” is used to supply driving current to the pixels 7 for two rows. Therefore, in this embodiment, in a section between two pixels 7 disposed in such a manner as to sandwich the common power-feed lines “com”, the first TFT 20, the second TFT 30, and the light-emission elements 40 are disposed in linear symmetry about the common power-feed line “com”, simplifying the electrical connection between these elements and each wiring layer. As described above, in this embodiment, since pixels for two rows are driven by one common power-feed line “com”, in comparison with a case in which the common power-feed lines “com” are formed for each group of pixels for one row, one-half of the number of common power-feed lines “com” is required, and the gap secured between the common power-feed lines “com” and the data lines “sig”, which is formed in the same section between the layers, is not required. Therefore, since an area for a wiring on the transparent substrate 10 can be made more narrow, the ratio of the light-emission area in each pixel area can be increased correspondingly, making it possible to improve display performance, such as luminance, contrast ratio, and so on.
Since the construction is formed in such a way that the pixels for two rows are connected to one common power-feed line “com” in this manner, the data lines “sig”, which are in a state of being parallel in groups of two, supply an image signal to the group of pixels for each row.
(Structure of Pixels)
The structure of each pixel 7 of the display apparatus 1 constructed as described above will be described in detail with reference to
First, at a position corresponding to the line A-A′ of
In each pixel. 7, capacitance lines “cline” are formed in the same section between the layers of the scanning lines “gate” and the gate electrodes 21 (between the gate insulation film 50 and the first interlayer insulation film 51) in such a manner as to be parallel to the scanning lines “gate”, and an extended portion “st1” of the potential holding electrode “st” overlaps this capacitance line “cline” via the first interlayer insulation film 51. For this reason, the capacitance line “cline” and the extended portion “st1” of the potential holding electrode “st” form a holding capacitor “cap” in which the first interlayer insulation film 51 is a dielectric film. A second interlayer insulation film 52 is formed on the surface of the potential holding electrodes “st” and the data lines “sig”.
At a position corresponding to the line B-B′ in
At a position corresponding to the line C-C′in
Here, the pixel electrode 41 forms one of the electrodes of the light-emission element 40. That is, a positive-hole injection layer 42 and an organic semiconductor film 43 are multilayered on the surface of the pixel electrode 41, and a counter electrode “op” formed from a lithium-containing metal film, such as aluminum or calcium, is formed on the surface of the organic semiconductor film 43. This counter electrode “op” is a common electrode formed at least on a pixel area or in a stripe form, and is maintained at a fixed potential.
In the light-emission element 40 constructed as described above, a voltage is applied by assigning the counter electrode “op” and the pixel electrode 41 as a positive pole and a negative pole, respectively. As shown in
Such driving current used for light emission flows through a current path formed of the counter electrode “op”, the organic semiconductor film 43, the positive-hole injection layer 42, the pixel electrode 41, the second TFT 30, and the common power-feed lines “com”. Therefore, when the second TFT 30 is turned off, the driving current does not flow. In the display apparatus 1 of this embodiment, when the first TFT 20 is turned on as a result of being selected by a scanning signal, the image signal is written from the data lines “sig” into the holding capacitors “cap” via the first. TFT 20. Therefore, even if the first TFT 20 is turned off, the gate electrode of the second TFT 30 is maintained at a potential corresponding to the image signal by the holding capacitor “cap”, and therefore, the second TFT 30 remains in an on state. Therefore, the driving current continues to flow through the light-emission element 40, and this pixel is maintained in a switched-on state. This state is maintained until new image data is written into the holding capacitor “cap” and the second TFT 30 is turned off.
(Method of Maufacturing Display Apparatus)
In a method of manufacturing the display apparatus 1 constructed as described above, the steps up to manufacturing the first TFT 20 and the second TFT 30 on the transparent substrate 10 are nearly the same as the steps for manufacturing an active-matrix substrate of the display apparatus 1, and accordingly, are described in general outline with reference to FIGS. 8(A)-(G).
FIGS. 8(A)-(G) includes step sectional views schematically showing the process of forming each component of the display apparatus 1. More specifically, as shown in
Next, as shown in
Next, as shown in
In this state, high-concentration phosphor ions or boron ions are implanted to form source and drain regions 22, 23, 32, and 33 in a self-aligned manner with respect to the gate electrodes 21 and 31 in the silicon thin-films 200 and 300. The portions where impurities are not introduced become channel areas 27 and 37.
Next, as shown in
Next, as shown in
Next, as shown in
Next, a liquid material (precursor) for forming the positive-hole injection layer 42 is discharged from an ink-jet head IJ with respect to the inside area of the bank layer “bank”, and the positive-hole injection layer 42 is formed in the inside area of the bank layer “bank”. In a similar manner, a liquid material (precursor) for forming the organic semiconductor film 43 is discharged from the ink-jet head IJ with respect to the inside area of the bank layer “bank”, and the organic semiconductor film 43 is formed in the inside area of the bank layer “bank”. Here, since the bank layer “bank” is formed from a resist, it is water repellent. In contrast, since the precursor of the organic semiconductor film 43 mainly uses a hydrophilic solvent, the coating area of the organic semiconductor film 43 is reliably defined by the bank layer “bank”, and extrusion into adjacent pixels does not occur.
When forming the organic semiconductor film 43 and the positive-hole injection layer 42 by an ink-jet method in this manner, in this embodiment, in order to improve the operation efficiency and the injection position accuracy, as shown in
Subsequently, as shown in
Since the bank layer “bank” is formed from a resist, it is left intact, and as will be described below, the layer is used as a black matrix BM and an insulation layer for reducing parasitic capacitance.
TFTs are formed also in the data-side driving circuit 3 and the scanning-side driving circuit 4 shown in
Further, both the first TFT 20 and the second TFT 30 may be of n-type, or p-type, or one of them may be of n-type and the other of p-type. In any combination of these cases, TFTs can be formed by a well known method, and accordingly, description thereof has been omitted.
(Formation Area of Bank Layer)
In this embodiment, with respect to the entirety of the peripheral area of the transparent substrate 10 shown in
Here, unlike the data lines “sig”, a large current for driving the light-emission elements 40 flows through the common power-feed lines “com”, and the driving current is supplied to the pixels for two rows. For this reason, for the common power-feed lines “com”, their line width is set to be wider than the line width of the data lines “sig”, and the resistance value per unit length of the common power-feed lines “com” is set to be smaller than the resistance value per unit length of the data lines “sig”. Even under such design conditions, in this embodiment, when the bank layer “bank” is formed so as to overlap the common power-feed lines “com” and the formation area of the organic semiconductor film 43 is defined, the width of the bank layer “bank” to be formed here is made at the same width dimension as that of the bank layer “bank” overlapping two data lines “sig”, forming a construction suitable for making the pitch P of the centers of the formation areas of the organic semiconductor films 43 equal at any interval between the adjacent pixels 7 along the extension direction of the scanning lines “gate”.
Furthermore, in this embodiment, as shown in
Also, if the bank layer “bank” which is formed by a black resist as described above remains, the bank layer “bank” functions as a black matrix, improving display quality, such as luminance, contrast ratio, etc. That is, in the display apparatus 1 according to this embodiment, since the counter electrodes “op” are formed on the entire surface of the transparent substrate 10 or in a stripe form over a wide area thereof, light reflected by the counter electrodes “op” causes the contrast ratio to decrease. However, in this embodiment, since the bank layer “bank” having the function of inhibiting the parasitic capacitance is formed by a black resist while defining the formation area of the organic semiconductor film 43, the bank layer “bank” functions also as a black matrix, and shuts off reflected light from the counter electrodes “op”, yielding an advantage in that the contrast ratio is high. Further, since the light-emission area can be defined in a self-aligned manner by using the bank layer “bank”, alignment allowance with the light-emission area, which is a problem when the bank layer “bank” is not used as a black matrix and another metal layer is used as a black matrix, is not required.
[Example of an Improvement of the Above-Described Embodiment]
In the above-described embodiment, pixels 7, to which driving current flows in a section between the pixels and the common power-feed lines “com”, are arranged on each of the two sides of the common power-feed lines “com”, and two data lines “sig” pass in parallel on a side opposite to the common power-feed lines “com” with respect to the pixels 7. Therefore, there is a risk that crosstalk might occur between the two data lines “sig”. Accordingly, in this embodiment, as shown in
When the construction is formed in this manner, since a wiring layer DA different from the above passes between two parallel data lines “sig”, the above-mentioned crosstalk can be prevented by merely maintaining such wiring layer DA (DA1, DA2) at a fixed potential within at least one horizontal scanning period of the image. That is, whereas the film thickness of the first interlayer insulation film 51 and the second interlayer insulation film 52 is approximately 1 μm, the interval between two data lines “sig” is approximately 2 μm or more. Therefore, in comparison with capacitance formed between each data line “sig” and the dummy wiring layer DA (DA1, DA2), the capacitance formed between the two data lines “sig” is small enough that it can be effectively ignored. Therefore, since a signal of a high frequency which leaks from the data lines “sig” is absorbed in the dummy wiring layers DA and DA2, crosstalk between the two data lines “sig” can be prevented.
Furthermore, between two adjacent data lines “sig” of a plurality of data lines “sig”, it is preferable that sampling of an image signal be performed at the same timing. When the construction is formed in this manner, since potential variations during sampling occur simultaneously between two data lines “sig”, it is possible to more reliably prevent crosstalk between these two data lines “sig”.
[Another Example of Construction of Holding Capacitor]
Although in the above-described embodiment, capacitance lines “cline” are formed to form a holding capacitor “cap”, as described in the description of the related art, the holding capacitor “cap” may be formed by using a polysilicon film for forming a TFT.
Also, as shown in
Although in the above-described first embodiment, the construction is formed in such a way that the light-emission elements 40 are driven by driving current of the same polarity in any pixel 7, as will be described below, the construction may be formed in such a way that the same number of two types of pixels 7, in which the light-emission elements 40 are driven by a driving current whose polarity is inverted, are among a plurality of pixels 7 to which driving current is passed in a section between the pixels and the same common power-feed line “com”.
Examples of such constructions are described with reference to
In this embodiment and the embodiments to be described later, as shown in
Furthermore, in each of the pixels 7A and 7B, since the light-emission element 40 is driven by the driving current i whose polarity is inverted, as described later, the construction must be formed in such a way that the potential of the counter electrode “op” also has an opposite polarity when the potential of the common power-feed line “com” is used as a reference. Therefore, the counter electrode “op” is formed in such a way that the pixels 7A and 7B, to which the driving current i having the same polarity flows, are connected together and a predetermined potential is applied to each of them.
Therefore, as shown in
Also, as shown in
When forming such two types of light-emission elements 40A and 40B, since each of both the organic semiconductor film 43 and the positive-hole injection layer 42 is formed in the inside of the bank layer “bank” by an ink-jet method, even if the top and bottom positions are reversed, the manufacturing steps are not complex. Further, in the light-emission element 40B, in comparison with the light-emission element 40A, the lithium-containing aluminum electrode 45, which is so thin as to have a light transmission property, and the ITO film layer 46 are added. Nevertheless, even if the lithium-containing aluminum electrode 45 is structured so as to be multilayered in the same area as that of the pixel electrode 41, no problem is posed for the display, and even if the ITO film layer 46 is also structured so as to be multilayered in the same area as that of the counter electrode “opB”, no problem is posed for the display. Therefore, the lithium-containing aluminum electrode 45 and the pixel electrode 41 may be patterned independently of each other, but may be patterned collectively by the same resist mask. In a similar manner, the ITO film layer 46 and the counter electrode “opB” may be patterned independently of each other, but may be patterned collectively by the same resist mask. It is a matter of course that the lithium-containing aluminum electrode 45 and the ITO film layer 46 may be formed only within the inside area of the bank layer “bank”.
After the light-emission elements 40A and 40B are made to be capable of being driven by a driving current whose polarity is inverted in each of the pixels 7A and 7B in this manner, the two types of pixels 7A and 7B are arranged as shown in
As shown in
Therefore, between each of the pixels 7A and 7B and the common power-feed line “com”, driving currents i in a direction indicated by arrows E and F in
From the viewpoint of the fact that pixels are arranged in such a way that driving current flows at an opposite polarity in a section between the pixels and the same common power-feed line “com”, each pixel may be arranged as shown in
As shown in
Also when the construction is formed in this manner, driving current i in a direction indicated by arrows E and F in
Furthermore, from the viewpoint of the fact that pixels are arranged in such a way that driving current flows at an opposite polarity in a section between the pixels and the same common power-feed line “com”, each pixel may be arranged as shown in
As shown in
Also in the case where the construction is formed in this manner, similarly to the second embodiment or the third embodiment, since the current flowing through the common power-feed lines “com” is cancelled by the driving current having a different polarity, a smaller amount of the driving current flowing through the common power-feed lines “com” is required. Therefore, since the common power-feed lines “com” can be made correspondingly narrower, it is possible to increase the ratio of the light-emission area of the pixel area in the pixels 7A and 7B and to improve display performance, such as luminance, contrast ratio, and so on.
Furthermore, from the viewpoint of the fact that pixels are arranged in such a way that driving current flows at an opposite polarity in a section between the pixels and the same common power-feed line “com”, each pixel may be arranged as shown in
As shown in
When the construction is formed in this manner, similarly to the third embodiment, since the current which flows through the common power-feed line “com” is cancelled by the driving current of a different polarity, a smaller amount of the driving current flowing through the common power-feed lines “com” is required. Therefore, since the common power-feed lines “com” can be made correspondingly narrower, it is possible to increase the ratio of the light-emission area of the pixel area in the pixels 7A and 7B and to improve display performance, such as luminance, contrast ratio, and so on. In addition, in this embodiment, since the polarity of the driving current is inverted every two pixels along the extension direction of the data lines “sigA” and “sigB”, for the pixels which are driven by the driving current having the same polarity, the counter electrodes “opA” and “opB” which are common to the adjacent pixels for two rows may be formed in a stripe form. Therefore, the number of stripes of the counter electrodes “opA” and “opB” can be reduced by half. Further, since the resistance of the counter electrodes “opA” and “opB” can be decreased in comparison with the stripe for each pixel, an influence of a voltage drop of the counter electrodes “opA” and “opB” can be reduced.
Furthermore, from the viewpoint of the fact that pixels are arranged in such a way that driving current flows at an opposite polarity in a section between the pixels and the same common power-feed line “com”, each pixel may be arranged as shown in
As shown in FIG. 21., in this embodiment, the construction is formed in such a way that the polarity of the driving current in each of the pixels 7A and 7B is inverted for each pixel along both the extension direction of the scanning lines “gateA” and “gateB” and the extension direction of the data lines “sigA” and “sigB”.
Also in the case where the construction is formed in this manner, similarly to the second to fourth embodiments, since the current flowing through the common power-feed lines “com” is cancelled by the driving current having a different polarity, a smaller amount of the driving current flowing through the common power-feed lines “com” is required. Therefore, since the common power-feed lines “com” can be made correspondingly narrower, it is possible to increase the ratio of the light-emission area in the pixels 7A and 7B and to improve display performance, such as luminance, contrast ratio, and so on.
When the pixels 7A and 7B are arranged in this manner, the counter electrodes “opA” and “opB” in a stripe form cannot cope. Nevertheless, the construction may be formed in such a way that the counter electrodes “opA” and “opB” are formed for each of the pixels 7A and 7B, respectively, and that the counter electrodes “opA” and “opB” are connected by a wiring layer.
As has been described up to this point, in the display apparatus according to the present invention, since pixels to which driving current is passed in a section between the pixels and the common power-feed line are arranged on both sides of the common power-feed line, only one common power-feed line is required for pixels for two rows. Therefore, since the formation area of the common power-feed lines “com” can be made narrower in comparison with a case where the common power-feed line is formed for each group of pixels for one row, it is possible to increase correspondingly the ratio of the light-emission area in the pixels and to improve display performance, such as luminance, contrast ratio, and so on.
When two types of pixels in which the light-emission element are driven by a driving current whose polarity is inverted are among a plurality of pixels to which the driving current is passed in a section between the pixels and the same common power-feed line, in one common power-feed line, since driving current flowing from the common power-feed line to the light-emission element cancels the driving current flowing in an opposite direction from the light-emission element to the common power-feed line, a smaller amount of the driving current which flows through the common power-feed line is required. Therefore, since the common power-feed lines “com” can be made correspondingly narrower, it is possible to increase the ratio of the light-emission area in the pixels and to improve display performance, such as luminance, contrast ratio, and so on.
| Number | Date | Country | Kind |
|---|---|---|---|
| 9-177455 | Jul 1997 | JP | national |
This is a Continuation of application Ser. No. 09/242,904 filed Feb. 25, 1999, which in turn is a National Stage of PCT/JP98/02982 filed Jul. 1, 1998. The entire disclosure of the prior application is hereby incorporated by reference herein in its entirety.
| Number | Name | Date | Kind |
|---|---|---|---|
| 4006383 | Luo et al. | Feb 1977 | A |
| 4087792 | Asars | May 1978 | A |
| 4135959 | Luo et al. | Jan 1979 | A |
| 4636038 | Kitahara et al. | Jan 1987 | A |
| 4738514 | Stewart | Apr 1988 | A |
| 4820222 | Holmberg et al. | Apr 1989 | A |
| 5014104 | Ema | May 1991 | A |
| 5071055 | Grauleau et al. | Dec 1991 | A |
| 5177406 | Troxell | Jan 1993 | A |
| 5264758 | Iijima et al. | Nov 1993 | A |
| 5299157 | Kimura et al. | Mar 1994 | A |
| 5302966 | Stewart | Apr 1994 | A |
| 5317432 | Ino | May 1994 | A |
| 5377031 | Vu et al. | Dec 1994 | A |
| 5414547 | Matsuo | May 1995 | A |
| 5479068 | Muto | Dec 1995 | A |
| 5500750 | Kanbe | Mar 1996 | A |
| 5506375 | Kikuchi | Apr 1996 | A |
| 5525867 | Williams | Jun 1996 | A |
| 5550066 | Tang et al. | Aug 1996 | A |
| 5587329 | Hseuh et al. | Dec 1996 | A |
| 5627557 | Yamaguchi et al. | May 1997 | A |
| 5631753 | Hamaguchi et al. | May 1997 | A |
| 5640067 | Yamauchi et al. | Jun 1997 | A |
| 5641974 | den Boer et al. | Jun 1997 | A |
| 5670792 | Utsugi et al. | Sep 1997 | A |
| 5670994 | Kawaguchi et al. | Sep 1997 | A |
| 5684365 | Tang et al. | Nov 1997 | A |
| 5689279 | Nelson et al. | Nov 1997 | A |
| 5701055 | Nagayama et al. | Dec 1997 | A |
| 5726678 | Dingwall | Mar 1998 | A |
| 5742129 | Nagayama et al. | Apr 1998 | A |
| 5748165 | Kubota et al. | May 1998 | A |
| 5801673 | Shimada et al. | Sep 1998 | A |
| 5804917 | Takahashi et al. | Sep 1998 | A |
| 5808595 | Kubota et al. | Sep 1998 | A |
| 5812188 | Adair | Sep 1998 | A |
| 5828428 | Kim et al. | Oct 1998 | A |
| 5828429 | Takemura | Oct 1998 | A |
| 5854616 | Ota et al. | Dec 1998 | A |
| 5877830 | Shimada et al. | Mar 1999 | A |
| 5903246 | Dingwall | May 1999 | A |
| 5907313 | Kubota et al. | May 1999 | A |
| 5909081 | Eida et al. | Jun 1999 | A |
| 5973449 | Nakamura et al. | Oct 1999 | A |
| 5977562 | Hirakata et al. | Nov 1999 | A |
| 5986723 | Nakamura et al. | Nov 1999 | A |
| 5989945 | Yudasaka et al. | Nov 1999 | A |
| 6002463 | Fujikawa | Dec 1999 | A |
| 6022766 | Chen et al. | Feb 2000 | A |
| 6038004 | Nannon et al. | Mar 2000 | A |
| 6055034 | Zhang et al. | Apr 2000 | A |
| 6057647 | Kurosawa et al. | May 2000 | A |
| 6060333 | Tanaka et al. | May 2000 | A |
| 6072450 | Yamada et al. | Jun 2000 | A |
| 6114715 | Hamada | Sep 2000 | A |
| 6115014 | Aoki et al. | Sep 2000 | A |
| 6123876 | Kobayashi et al. | Sep 2000 | A |
| 6133163 | Tanaka et al. | Oct 2000 | A |
| 6137552 | Yanai | Oct 2000 | A |
| 6147451 | Shibata et al. | Nov 2000 | A |
| 6150668 | Bao et al. | Nov 2000 | A |
| 6160272 | Arai et al. | Dec 2000 | A |
| 6175186 | Matsuura et al. | Jan 2001 | B1 |
| 6175395 | Yamazaki et al. | Jan 2001 | B1 |
| 6188112 | Bryant | Feb 2001 | B1 |
| 6194837 | Ozawa | Feb 2001 | B1 |
| 6229508 | Kane | May 2001 | B1 |
| 6284072 | Ryan et al. | Sep 2001 | B1 |
| 6295043 | Hashimoto et al. | Sep 2001 | B1 |
| 6359606 | Yudasaka | Mar 2002 | B1 |
| 6373453 | Yudasaka | Apr 2002 | B1 |
| 6380672 | Yudasaka | Apr 2002 | B1 |
| 6462722 | Kimura et al. | Oct 2002 | B1 |
| 6522315 | Ozawa et al. | Feb 2003 | B2 |
| 6542137 | Kimura | Apr 2003 | B2 |
| 6545424 | Ozawa | Apr 2003 | B2 |
| 6618023 | Park | Sep 2003 | B2 |
| 6618029 | Ozawa | Sep 2003 | B1 |
| 6630784 | Yoneda | Oct 2003 | B2 |
| 7012367 | Seki | Mar 2006 | B2 |
| 20020024493 | Ozawa et al. | Feb 2002 | A1 |
| 20030151568 | Ozawa | Aug 2003 | A1 |
| 20030193493 | Ozawa | Oct 2003 | A1 |
| 20080036699 | Yudasaka | Feb 2008 | A1 |
| 20080158209 | Ozawa | Jul 2008 | A1 |
| 20080165174 | Ozawa | Jul 2008 | A1 |
| 20080180421 | Yudasaka | Jul 2008 | A1 |
| 20080198152 | Ozawa | Aug 2008 | A1 |
| 20090303165 | Yudasaka | Dec 2009 | A1 |
| 20100045577 | Yudasaka | Feb 2010 | A1 |
| Number | Date | Country |
|---|---|---|
| 0448727 | Oct 1991 | EP |
| 0 717 446 | Jun 1996 | EP |
| 0 862 156 | Sep 1998 | EP |
| 0880303 | Nov 1998 | EP |
| 0 895 219 | Feb 1999 | EP |
| 1365276 | Nov 2003 | EP |
| 52064891 | May 1977 | JP |
| A 59-58468 | Apr 1984 | JP |
| 6017479 | Jan 1985 | JP |
| A 01-186655 | Jul 1989 | JP |
| 02066867 | Mar 1990 | JP |
| A-4-70820 | Mar 1992 | JP |
| 06325869 | Nov 1994 | JP |
| 07057871 | Mar 1995 | JP |
| A 07-153576 | Jun 1995 | JP |
| 07-181927 | Jul 1995 | JP |
| A 07-235378 | Sep 1995 | JP |
| A 07-283378 | Oct 1995 | JP |
| 08-202287 | Aug 1996 | JP |
| 08-227276 | Sep 1996 | JP |
| A 08-241048 | Sep 1996 | JP |
| 09081053 | Mar 1997 | JP |
| 09082476 | Mar 1997 | JP |
| 09161970 | Jun 1997 | JP |
| 09230311 | Sep 1997 | JP |
| A-10-222097 | Aug 1998 | JP |
| 11-024604 | Jan 1999 | JP |
| A 11-003048 | Jan 1999 | JP |
| 11-065487 | Mar 1999 | JP |
| A 2004-046210 | Feb 2004 | JP |
| 93004994 | May 1991 | KR |
| 9509381 | Apr 1995 | WO |
| WO 9803699 | Jan 1998 | WO |
| WO 9812689 | Mar 1998 | WO |
| Entry |
|---|
| Johannes Adam, New Correlations Between Electrical Current and Temperature Rise in PCB Traces, 20th IEEE Semi-Therm Symposium, 2004, available at http:www.flomerics.com/flotherm/technical—papers/t341.pds. |
| Web-based document PCB Trace, HardwareBook (HwB), at www.hardwarebook.info/PCB—trace (providing data tables for circuit board trace width). |
| “Development of a Thin Film Transistor Circuit for a Luminescent Type Flat Panel Display”, Makoto lchihara and Kiyoshi Matsuda, Mitsubishi Kasei R&D Review, 1993, vol. 7, No. 2, pp. 79-82. |
| Extended European Search Report dated Dec. 29, 2010, issued in European Patent Application No. 0 9166341.9. |
| European Search Report dated Jun. 23, 2005 issued in European Patent Application No. 04078120.5-1235. |
| European Search Report dated Jun. 23, 2005 issued in European Patent Application No. 04078130.4-1235. |
| Office Action dated Sep. 30, 2003 issued in Japanese Patent Application No. 1997-177455. |
| Office Action dated Aug. 16, 2011 issued in U.S. Appl. No. 12/073,341. |
| Office Action dated Mar. 15, 2011 issued in U.S. Appl. No. 12/073,258. |
| Office Action dated Apr. 12, 2011 issued in U.S. Appl. No. 12/073,440. |
| Office Action dated Apr. 13, 2011 issued in U.S. Appl. No. 12/073,341. |
| European Search Report dated Jan. 7, 2011 issued in EP Appl. No. 09166341.9. |
| Office Action dated Dec. 15, 2003 issued in U.S. Appl. No. 10/367,849. |
| Office Action dated Apr. 21, 2004 issued in U.S. Appl. No. 10/367,849. |
| Office Action dated May 17, 2004 issued in U.S. Appl. No. 10/367,849. |
| Office Action dated Jan. 22, 2008 in U.S. Appl. No. 10/367,849. |
| Office Action dated Jan. 23, 2009 issued in U.S. Appl. No. 10/367,849. |
| Office Action dated Nov. 10, 2009 issued in U.S. Appl. No. 10/367,849. |
| Office Action dated May 20, 2010 issued in U.S. Appl. No. 10/367,849. |
| Declaration under 37 CFR 1.132 by Ichio Yudasaka dated Jul. 28, 2006. |
| Office Action dated Jul. 27, 2011 issued in U.S. Appl. No. 12/073,258. |
| Office Action dated Mar. 25, 2011 issued in U.S. Appl. No. 11/905,591. |
| Office Action dated Oct. 26, 2010 issued in U.S. Appl. No. 11/905,591. |
| The American Heritage Dictionary of the English Language, Fourth Edition, Copyright 2000 by Houghton Mifflin Company, Published by the Houghton Mifflin Company, www.bartleby.com/65/56U0085600.html, Definition of “unitary”. |
| Number | Date | Country | |
|---|---|---|---|
| 20030151568 A1 | Aug 2003 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 09242904 | US | |
| Child | 10367849 | US |
