1. Field of the Invention
The present invention relates to a display, and more particularly, to a display and a method for controlling same.
2. Description of the Prior Art
Conventionally, a liquid crystal display (LCD) includes a plurality of source drivers, gate drivers, and a timing controller. The timing controller (TCON) is connected to the source drivers to transmit data and control timings. First the gate drivers output a gate signal to activate a gate line, and once the source drivers receive a transfer pulse signal TP from the timing controller, each of the source drivers drives its corresponding data lines, which means that corresponding display voltages are simultaneously supplied to a row of pixels corresponding to the activated gate line in the LCD.
However, there exists gate delays along the activated gate line, due to that each gate lines has parasitic resistors and parasitic capacitors. As can be seen from
To solve this problem, the pulse width of the gate signals needs to be shortened so that the last pixel in the gate line can be de-activated before the next transfer pulse signal. Shortening the pulse width of the gate signal, however, causes the problem that the charging time of the pixels is also shortened; the pixels may not have enough time to be charged to their target display voltage levels, especially when the panel is operated at high frequency.
One objective of the present invention is therefore to provide a display controlling system and a controlling method thereof that solve the above problems. The display controlling system utilizes a plurality of non-identical transfer pulse signals to control the display rather than utilizing one single transfer pulse signal. Each source driver is provided with a dedicated transfer pulse signal, and therefore the gate signal does not need to be shortened. Since the pulse width of the gate signal can be increased, the present invention is suitable for a high-frequency operation environment.
Moreover, the transfer pulse information required for generating the transfer pulse signals can be embedded in the source data. The source drivers generate the transfer pulse signals after receiving the source data. In this way, the transfer pulse signal lines between the timing controller and the source drivers can be removed to save production cost.
According to one exemplary embodiment of the present invention, a display controlling method utilized in a display is disclosed. The display comprises a plurality of source drivers and a plurality of data lines, and the display controlling method comprises receiving a plurality of transfer pulse signals, each of the transfer pulse signal corresponding to one of the source drivers, wherein the transfer pulse signals are not all identical, and driving the corresponding data lines by the corresponding source driver upon receiving the corresponding transfer pulse signal.
According to another exemplary embodiment of the present invention, a display controlling system utilized in a display is disclosed. The display controlling system comprises a plurality of data lines, and a plurality of source drivers. The source drivers receive a plurality of transfer pulse signals, each of which corresponds to one of the source drivers, and drive the corresponding data lines upon receiving the corresponding transfer pulse signal, wherein the transfer pulse signals are not all identical.
According to another exemplary embodiment of the present invention, a display controlling system utilized in a display is disclosed. The display controlling system comprises a plurality of data lines, a plurality of source drivers, and a timing controller, coupled to the source drivers, for generating a plurality of transfer pulse signals, each of which corresponds to one of the source drivers, wherein the transfer pulse signals are not all identical. The timing controller delivers the transfer pulse signals to the source drivers, which respectively drive corresponding data lines upon receiving the corresponding transfer pulse signal.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
Moreover, by applying the above concept of having non-identical transfer pulse signals, the pulse width of the gate signals can be increased, and therefore the charging time of the pixels is lengthened. This property makes the display 200 suitable for high-frequency operation when implemented with a high-frequency panel or a heavy-loading panel.
The generation of the transfer pulse signals can be performed by the timing controller 230 or the source drivers 220. In one embodiment, the timing controller 230 generates the non-identical transfer pulse signals, and then sends them to the corresponding source drivers 220 through the transfer pulse signal lines 202. The timing controller 230 may derive the transfer pulse signals according to one specific signal, such as the transfer pulse signal TP1. For example, the timing controller 230 first generates the transfer pulse signal TP1, and then delays it to generate the other transfer pulse signals.
In addition, widths and phase delays of the transfer pulse signal TP1-TPn can be determined in a system level. For example, assuming that there are six source drivers and the six source drivers sequentially output the display voltages to drive the display respectively based on the transfer pulse signals TP1-TP6, the widths of the transfer pulse signal TP1-TP6 can be determined as follows: TP1 width: A1*Wunit;
Furthermore, in other embodiment, phase delays of the transfer pulse signal TP1-TP6 can also be independently determined by the timing controller 230, that is:
For the displays 200 and 300, each transfer pulse signal can be represented by a sequence of transfer pulse information, and each source driver 220 (or 330) only receives the corresponding sequence to generate the corresponding transfer pulse signal. In another embodiment, the transfer pulse information of every transfer pulse signal is packed together and sent to every source driver 220 (or 330). The source drivers 220 (or 330), however, only extract the corresponding part of the transfer pulse information to generate the corresponding transfer pulse signal.
In another embodiment, the source drivers 220 derive the transfer pulse signals based on a specific signal, wherein the specific signal is received from the timing controller 230 or embedded in the source data. The source drivers 220 may extract the information required for producing the specific signal from the source data, generate the specific signal according to the information, and then delay or adjust the pulse width of the specific signal to generate the transfer pulse signals. Both the delay time information for delaying the specific signal and the pulse width information for adjusting the pulse width of the specific signal can also be embedded in source data by the timing controller 230. The delay time and the pulse width of each transfer pulse signal are not limited; they depend on the system requirements.
When the display controlling system is implemented in a bi-directional driving display device, the source drivers and the transfer pulse signals can be arranged as shown in
Please refer to
As the display controlling systems 200 and 400 utilize non-identical transfer pulse signals to control the display rather than utilizing one single transfer pulse signal, the gate signal does not need to be shortened in order to maintain the accuracy of voltage loading, and therefore the problems met by the prior arts are solved. Since the pulse width of the gate signal can be increased, the present invention is suitable for a high-frequency operation environment.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
Number | Name | Date | Kind |
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6407729 | Moon | Jun 2002 | B1 |
6947022 | McCartney | Sep 2005 | B2 |
7079105 | Katagawa | Jul 2006 | B2 |
20040189579 | Shimizu | Sep 2004 | A1 |
Number | Date | Country | |
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20100253654 A1 | Oct 2010 | US |