This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2004-289405, filed on Sep. 30, 2004; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a display device such as a field emission display, and a display method.
2. Description of the Related Invention
A matrix drive type display device, called a field emission display (FED) in which an electron emission element and a phosphor are disposed between two substrates and the phosphor is light emitted by electrons emitted from the electron emission element to perform a display, has been developed. In this display device, a method combining a pulse width modulation system modulating a pulse width of a voltage supplied to a display portion and an amplitude modulation drive system modulating an amplitude of the voltage in accordance with a strength of an image signal and so on, is adopted to increase gradation of the image signal.
When the above stated systems are adopted, a light-emitting brightness proportionally increases in accordance with an increase of a drive current, and a relation between an input and the light-emitting brightness has approximately a linear characteristic. However, the image signal has a γ characteristic because it is generally assumed to be displayed on a cathode-ray tube. Consequently, it is required to perform what is called an inverse γ correction to the inputted image signal when the image signal having the γ characteristic is applied to the display device having the linear characteristic (for example, refer to Japanese Laid-open Application No. 2004-61862).
However, there is a case when an image cannot be truly reproduced because the above-stated linear brightness characteristic cannot be obtained even though such inverse γ correction is performed. Namely, at a rising time of a drive pulse outputted from a signal line driver, some time is required until a waveform rises completely due to an influence of an inductance component, and so on, of wiring of a display panel. In particular, in a display panel of a large screen, the wiring becomes long, and therefore, the influence becomes large. Herewith, when an output value is small, there is a case when the drive pulse does not rise completely, and a brightness thereof may be lower than a logical value. Besides, the phosphor becomes saturated as the pulse width becomes large, and the deterioration of the brightness may also be provoked in this case.
Further, such characteristic has some dispersion by every display panel. Besides, a low brightness region of a display device (a region with a small output value) is an important element for a display performance thereof. Namely, the brightness is low, and therefore, a rate of an error component relative to the brightness becomes large, and the error becomes remarkable. Herewith, it is necessary to perform a correction by every display panel so that the output value and the brightness are to have a linear characteristic. Here, when this correction is performed, it is conceivable to add a new correction circuit, to use different look up tables for inverse γ correction by every panel, and so on. However, in the former case, an increase of a cost may be provoked by an addition of the new correction circuit. Besides, the latter look up tables for inverse γ correction are required to be switched such as 2.2 power, 2.4 power, and so on, by various image modes, and according to this, the look up tables for various inverse γ correction are required by every display panel, and a problem remains in terms of the cost as same as the above-stated case.
The present invention is made to solve these problems, and the object thereof is to provide a display device and a display method capable of obtaining a good gradation characteristic by realizing an effective gradation correction while suppressing the increase of a manufacturing cost.
To achieve the above stated object, a display device according to one aspect of the present invention, including: a display unit in which pixels driven by a drive signal having plural levels of amplitudes and pulse widths are disposed; an input unit inputting an image signal containing information representing gradations corresponding to a brightness of the pixel; an output data converter for a signal line driver converting an input signal inputted to the input unit into a signal having an amplitude component corresponding to the amplitude and a pulse width component corresponding to the pulse width based on the gradations; and a drive signal generator generating the drive signal from the output signal of the output data converter for the signal line driver. In the display device of the present invention, a gradation correction to realize a linear characteristic may be performed at the output data converter for the signal line driver (X driver).
Hereinafter, a best mode for practicing the present invention is described based on the drawings.
An image signal and a synchronous signal are inputted to an input circuit 50, and separately outputted to the image signal processing circuit 40 and the timing generation circuit 60 respectively. The image signal processing circuit 40 performs a correction and so on of the image signal inputted from the input circuit 50, and outputs the image signal to the signal line driver 20. The timing generation circuit 60 outputs an operation timing based on the synchronous signal inputted from the input circuit 50 to the scanning line driver 30, the image signal processing circuit 40, and the signal line driver 20.
The signal line driver 20 converts the image signal inputted from the image signal processing circuit 40 into a drive signal, and outputs the drive signal to the display panel 10. The scanning line driver 30 converts the operation timing inputted from the timing generation circuit 60 into a scanning line signal, and outputs the scanning line signal to the display panel 10. The display panel 10 displays an image based on the drive signal and the scanning line signal inputted from the signal line driver 20 and the scanning line driver 30.
On the display panel 10, scanning lines Y and signal lines X are disposed. The scanning lines Y (Y1 to Ym) of m (=720) pieces extend in a lateral (horizontal) direction. The signal lines X (X1 to Xn) of n (=1280×3) pieces extend in a longitudinal (vertical) direction while crossing these scanning lines Y1 to Ym. Display pixels Px of m×n (=approximately 2,760,000) pieces are disposed in vicinities of intersection positions of these scanning lines Y1 to Ym and the signal lines X1 to Xn.
The display pixel Px has an electron emission element 11 and a phosphor 12. The electron emission element 11 is driven by the corresponding scanning line Y and the signal line X to emit electrons. The phosphor 12 emits light by an electron beam emitted from the electron emitting element 11. This phosphor 12 emits a light with a display color of red (R), green (G), or blue (B). Namely, the display pixel Px corresponds to a display color of red (R), green (G), or blue (B).
The display pixels Px of red (R), green (G), and blue (B) are respectively disposed in the longitudinal direction. Here, the three display pixels Px of red (R), green (G), and blue (B) disposed adjacent in the horizontal direction can be considered as one color pixel on the block. A full color display becomes possible by controlling these display pixels Px of red (R), green (G), and blue (B).
The signal line driver 20, the scanning line driver 30, the image signal processing circuit 40, the input circuit 50, and the timing generation circuit 60 are used as drive circuits of the display panel 10, and they are disposed around the display panel 10. The signal line driver 20 is connected to the signal lines X1 to Xn, and the scanning line driver 30 is connected to the scanning lines Y1 to Ym.
The input circuit 50 inputs an analog RGB image signal and the synchronous signal supplied from an external signal source, supplies the image signal processing circuit 40 with the image signal, and supplies the timing generation circuit 60 with the synchronous signal.
The image signal processing circuit 40 performs a signal processing for the image signal from the input circuit 50.
The timing generation circuit 60 controls the operation timings of the signal line driver 20, the scanning line driver 30, and the image signal processing circuit 40 based on the synchronous signal. By this control, the scanning line driver 30 sequentially drives the scanning lines Y1 to Ym by using the scanning signal, and the signal line driver 20 drives the signal lines X1 to Xn by the signal line drive signal in a voltage pulse method while the respective scanning lines Y1 to Ym are driven by the scanning line driver 30.
Here, the image signal processing circuit 40 has an AD conversion circuit 41, an inverse γ correction circuit 42, and an output data conversion circuit for an X driver 46.
The AD conversion circuit 41 converts the analog RGB image signal supplied from the input circuit 50 in synchronize with a horizontal synchronous signal into a digital format. In the AD conversion circuit 41, the analog RGB image signal is converted into a 10 bits gradation data capable of displaying, for example, 1024 gradations, for the respective display pixels Px.
The inverse γ correction circuit 42 performs an inverse γ correction while referring to a look up table for the inverse γ correction as a data conversion memory having a 2.2 power characteristic which is the same as the γ characteristic of a cathode-ray tube.
The later-described output data conversion circuit for the X driver 46 converts a signal containing information representing a gradation outputted from the inverse γ correction circuit 42 into a value being adapted for a voltage pulse method of the signal line drive signal. The output data conversion circuit for the X driver 46 stores the 10 bits conversion data of 1024 pieces allocated to every gradation value of the gradation data outputted from the inverse γ correction circuit 42. As shown in
The signal line driver 20 includes line memories 21 and 22, and a drive signal generation portion 23.
The line memory 21 makes a sampling of the image signals within one horizontal line while synchronizing with a clock CK1 supplied from the timing generation circuit 60 during respective horizontal scanning period, and outputs these image signals, namely the gradation data of n pieces in parallel.
The line memory 22 latches the gradation data in response to a latch pulse DL supplied from the timing generation circuit 60 in a state in which every gradation data is outputted from the line memory 21, and holds the gradation data during the following one horizontal scanning period when the line memory 21 makes the sampling operation again.
The drive signal generation portion 23 generates the voltage pulses of n pieces having the pulse amplitudes and the pulse widths respectively corresponding to the gradation data outputted in parallel from the line memory 22 as the signal line drive signals, to supply to the signal lines X1 to Xn. The drive signal generation portion 23 includes a counter 24, pulse width modulation circuits 25 of n pieces, and output buffers 26 of n pieces.
The counter 24 has a 10-bit configuration, and it is initialized in response to a reset signal RST supplied from the timing generation circuit 60 in accordance with a start of the respective horizontal scanning periods. The counter 24 is then counted up by a clock CK2, supplied from the timing generation circuit 60 subsequently to the reset signal RST. After that, the counter 24 outputs a 10 bits count data representing an effective image period within the respective horizontal scanning periods by a time length of 1024 steps.
The respective pulse width modulation circuits 25 are composed of, for example, comparators, and compares a corresponding gradation data supplied from the line memory 22 with the count data supplied from the counter 24, to output the voltage pulse having the same pulse width in a period until the count data reaches the gradation data.
The respective output buffers 26 select and output positive element voltages V1, V2, V3, and V4 that are externally supplied, based on the upper two bits of the gradation data supplied to the corresponding pulse width modulation circuits 25. Consequently, the voltage pulse from the pulse width modulation circuit 25 is amplified to the same pulse amplitude as any one of these element voltages V1, V2, V3, and V4. At this time, a selected element voltage is outputted from the output buffer 26 during the same period as the pulse width of the pulse voltage from the pulse width modulation circuit 25. Namely, the output buffer 26 outputs the signal line drive signal having the pulse amplitude and the pulse width depending on the gradation value of the gradation data.
As shown in
As shown in the region (A) of
As shown in the region (B) of
As shown in the region (C) of
As shown in the region (D) of
The scanning line driver 30 includes a shift register 31 and an output buffer 32.
The shift register 31 shifts a vertical synchronization signal by every one horizontal scanning period to output from one of output terminals of m pieces. The output buffer 32 responds to pulses from the output terminals of m pieces of the shift register 31 respectively, to output scanning signals to the scanning lines Y1 to Ym.
The scanning signals outputted from the output buffer 32 are negative voltage Vyon supplied from a scanning voltage terminal, and they are outputted only for one horizontal scanning period.
At the respective electron emission elements 11, a discharge may occur when the element voltage Vf between electrodes composed of the signal line X and the scanning line Y exceeds a threshold, and the electron beam emitted by this excites the phosphor 12. Brightness of the respective display pixels Px is controlled by a drive current Ie flowing in the electron emission element 11 depending on the pulse width and the pulse amplitude of the signal line drive signal.
Next, a function realized by the output data conversion circuit for the X driver 46 included in the display device D of the present embodiment is described based on
As shown in
Consequently, the display device D of the present embodiment includes the output data conversion circuit for the X driver 46 having the look up table shown in
Namely, the output data conversion circuit for the X driver 46 converts (corrects) an image signal containing information representing a gradation inputted from the inverse γ correction circuit 42 into a signal which corresponds to the amplitude component and the pulse width corresponding to the amplitude of the signal line drive signal and which has a corrected pulse width component (so as to correct a nonlinearity of the corresponding waveform s shown in
Further, in the look up table referred to by the output data conversion circuit for the X driver 46, a characteristic is added to an output of the pulse width component of a portion corresponding to the rising period t shown in
Namely, the output data conversion circuit for the X driver 46 included in the display device D precisely increases a light-emission brightness of the display pixel Px of the display panel 10 in accordance with the increase of the signal line drive signal, and thereby enabling to obtain a linear brightness characteristic. Consequently, according to the display device D of the present embodiment, it is possible to realize an effective gradation correction to obtain a good brightness characteristic without adding a new correction circuit and so on to obtain the linear brightness characteristic (without increasing a manufacturing cost and so on).
Besides, in the display device D according to the present embodiment, the LUT for the output conversion of the X driver is applied to the gradation correction to obtain the above-stated linear brightness characteristic, and therefore, a common look up table for an inverse γ correction can be used for plural display panels respectively having different brightness characteristics. Further, when a γ characteristic is changed by various image modes, the common look up table for the inverse γ correction can be used for the plural display panels having the different brightness characteristics.
Hereinabove, the present invention is concretely described with the embodiment, but the present invention is not limited to the above-described embodiment, and it may be modified in other specific forms without departing from the spirit or essential characteristics thereof.
Number | Date | Country | Kind |
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P2004-289405 | Sep 2004 | JP | national |