The present application relates to the technical field of display, particular to a display device and a display panel thereof.
The statements herein merely provide background information related to the present application and do not necessarily constitute the conventional art.
TFT-LCD (Thin Film Transistor Liquid Crystal Display) is one of the major forms of panel display at present. The TFT-LCD has become an important display platform in modern IT and video products. At present, the driving method of the scanning drive circuit used in the TFT-LCD is progressive scanning. In order to avoid insufficient charging time caused by the scanning lines not being switched on or not being fully switched on, an operational amplifier is usually configured to each output port in the scanning drive circuit to increase driving capability. For example, 768 scanning lines (corresponding to a 1024*768 display panel) require 768 operational amplifiers. Thus, the manufacturing cost is greatly increased.
According to embodiments of the present application, a display device and a display panel thereof are provided.
A display panel includes a display area, a driver transistor array substrate, a plurality of scanning lines and a control electrode driver chip. The driver transistor array substrate and the plurality of scanning lines are located on the display area, each scanning line is connected to at least one driver transistor to control pixels respectively driven by the driver transistors, and the display area is divided into a first display area and a second display area according to one diagonal line of the driver transistor array substrate. The control electrode driver chip includes a plurality of amplifying circuits, and is connected to the scanning lines through output ports, each output port is for controlling at least one scanning line, and each output port with the number of controlled pixel greater than a first preset value is connected to the scanning line through one amplifying circuit, while each output port with the number of controlled pixel less than or equal to the first preset value is not connected to the scanning line through the amplifying circuit.
In one or more embodiments, the plurality of scanning lines include a first scanning line located on the diagonal line, the first scanning line is for driving the pixels on the diagonal line of the driver transistor array substrate; both ends of the diagonal line intersect with the edge of the driver transistor array substrate, the pixels at the intersections are pixels driven by the starting point of the first scanning line and pixels driven by the end point of the first scanning line, and the first scanning line is connected to the control electrode of one driver transistor among each row of driver transistors.
In one or more embodiments, the pixels driven by each scanning line are arranged into line segments, and the line segments are parallel to one another; the pixels at both ends of each line segment are respectively located at the edge of one side of the first display area or the edge of one side of the second display area; the intervals of the pixels in the identical row driven by two adjacent scanning lines among the scanning lines on both sides of the diagonal line are equal; and each output port of the control electrode driver chip controls two scanning lines.
In one or more embodiments, each output port is for controlling a pair of scanning lines; and each pair of scanning lines includes a second scanning line for driving the pixels located in the first display area, and a third scanning line for driving the pixels located in the second display area.
In one or more embodiments, the two scanning lines in each pair drive the identical number of pixels.
In one or more embodiments, the amplifying circuit includes an operational amplifier.
In one or more embodiments, the display panel further includes a plurality of control electrode control chips; each control electrode control chip is respectively connected to one scanning line and one output port of the control electrode driver chip; and the control electrode control chip receives the driving signal of the control electrode driver chip so as to control the corresponding pixels.
In one or more embodiments, the number of the scanning lines in the first display area is equal to that of the scanning lines in the second display area.
In one or more embodiments, the control electrode driver chip is a gate driver chip.
A display panel includes a display area, a driver transistor array substrate, a plurality of scanning lines and a gate driver chip. The driver transistor array substrate and the plurality of scanning lines are located on the display area, and each scanning line is connected to at least one driver transistor to control the pixels respectively driven by the driver transistors; the display area is divided into a first display area and a second display area according to one diagonal line of the driver transistor array substrate; the pixels driven by each scanning line are arranged into line segments, and the line segments are all parallel to one another, and the pixels at both ends of each line segment are respectively located on the edge of one side of the first display area or the edge of one side of the second display area. The gate driver chip includes a plurality of amplifying circuits for enhancing the driving capability of signals output to the scanning lines by the output ports; each output port of the gate driver chip is for controlling two scanning lines; and each output port with the number of controlled pixel greater than a first preset value is connected to the scanning line through one amplifying circuit, while each output port with the number of controlled pixel less than or equal to the first preset value is not connected to the scanning line through the amplifying circuit.
A display device includes a display control circuit, a display panel and a control electrode driver chip. The display control circuit is connected to the display panel to control the display panel. The display panel includes a display area, a driver transistor array substrate, a plurality of scanning lines and a control electrode driver chip. The driver transistor array substrate and the plurality of scanning lines are located on the display area, each scanning line is connected to at least one driver transistor, and the display area is divided into a first display area and a second display area according to one diagonal line of the driver transistor array substrate. The control electrode driver chip includes a plurality of amplifying circuits, and is connected to the scanning lines through output ports, each output port is for controlling at least one scanning line, and each output port with the number of controlled pixel greater than a first preset value is connected to the scanning line through one amplifying circuit, while each output port with the number of controlled pixel less than or equal to the first preset value is not connected to the scanning line through the amplifying circuit.
In the aforementioned display device and display panel thereof, each output port of the control electrode driver chip (e.g., a gate driver chip) is for controlling at least one scanning line, and when the number of the pixels controlled by the scanning line is greater than a first preset value, the output port of the control electrode driver chip is connected to the scanning line through one amplifying circuit. Compared with the display panel in which the scanning lines are transversely arranged and the output port of the control electrode driver chip connected to each scanning line is connected to the scanning line through an amplifying circuit in the exemplary technology, the display panel has less amplifying circuits in the control electrode driver chip, reducing the manufacturing cost of the display panel.
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
As shown in
The display panel 10 further includes a control electrode driver chip. In one or more embodiments, the control electrode driver chip is a gate driver chip (not shown). The gate driver chip is connected to each scanning line in the display area 100 through an output port to output a driving control signal to control the scanning line and control the pixels driven by the driver transistor through the scanning line. The gate driver chip includes amplifying circuits for enhancing the driving capability of signals output to the scanning lines by the output ports. Each output port of the gate driver chip is at least for controlling one scanning line, and each output port with the number of controlled pixel greater than a first preset value is connected to the scanning line through one amplifying circuit, while each output port with the number of controlled pixel less than or equal to the first preset value is not connected to the scanning line through the amplifying circuit. In the present embodiment, each output port of the gate driver chip is for controlling two scanning lines. The first preset value is a value set according to actual conditions. For example, when the number of the pixels driven by one scanning line is greater than the first preset value, if no amplifying circuit exists in the circuit connecting the gate driver chip and the scanning line, the control electrode driver chip will have insufficient driving capability to switch on or fully switch on the scanning line. When the number of the pixels driven by one scanning line is less than or equal to the first preset value, the scanning line can be fully switched on without connecting an amplifying circuit into the circuit connecting the gate driver chip and the scanning line to enhance the driving capability of signals of the scanning line. The amplifying circuit includes an operational amplifier. When the number of the pixels driven by one scanning line is greater than the first preset value, the output port of the gate driver chip is connected to the scanning line through one operational amplifier so as to enhance the driving capability of signals output to the scanning line by the output port.
In the aforementioned display panel 10, each output port of the gate driver chip is for controlling two scanning lines, and when the number of the pixels controlled by one scanning line is greater than the first preset value, the output port of the gate driver chip is connected to the scanning line through one amplifying circuit. When the number of the pixels controlled by one scanning line is less than or equal to the first preset value, the output port of the gate driver chip does not need to be connected to the scanning line through one amplifying circuit. Therefore, compared with the display panel in which the scanning lines are transversely arranged and the output port of the gate driver chip connected to each scanning line is connected to the scanning line through an amplifying circuit in the exemplary technology, the display panel has less amplifying circuits in the gate driver chip, thus reducing the manufacturing cost of the display panel. Moreover, in the display panel 10, the number of the pixels which are driven to be switched on by the scanning lines connected to the output ports in the gate driver chips without amplifying circuits is small. therefore, the pixel charging time is sufficient, and the picture display effect is good.
In one or more embodiments, each output port of the gate driver chip is for controlling a pair of scanning lines. Each pair of scanning lines include a scanning line located in the first display area 101 and a scanning line located in the second display area 103. The two scanning lines in each pair drive the identical number of pixels. Therefore, compared with the display panel in which the scanning lines are transversely arranged and the output port of the gate driver chip connected to each scanning line is connected to the scanning line through an amplifying circuit in the exemplary technology, the display panel has less amplifying circuits in the gate driver chip, thus reducing the manufacturing cost of the display panel 10.
In the present embodiment, the number of the scanning lines in the first display area 101 and the number of the scanning lines in the second display area 103 are equal. The number of the pixels driven by each scanning line in the display area 101 and the display area 103 is gradually reduced in a direction away from the diagonal line 105.
In one or more embodiments, as shown in
In the present embodiment, as shown in
The present application further provides a display device. As shown in
In other embodiments, the display device may be any type of display device, such as an LCD (Liquid Crystal Display), an OLED (Organic Electroluminesence Display), a QLED (Quantum Dot Light Emitting diode) Display, a curved display, or the like.
The technical features of the embodiments described above can be combined arbitrarily. For the sake of brevity, all possible combinations of the technical features of the above embodiments are not described, and such combinations of the technical features shall be deemed to fall within the scope of the present disclosure as long as there is no contradiction.
The embodiments described above only describe several implementations of the present application, and the description thereof is specific and detailed. However, those cannot be therefore construed as limiting the scope of the present application. It should be noted that, for those of ordinary skill in the art, several variations and modifications can be made without departing from the concept of the present disclosure, which also fall within the scope of the present disclosure. Therefore, the protection scope of the present application shall be defined by the appended claims.
Number | Date | Country | Kind |
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201810816838.6 | Jul 2018 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/CN2018/119019 | 12/3/2018 | WO | 00 |