Patent Grant
9837016
The present disclosure relates to display devices and drive methods therefor, and more specifically to a display device provided with pixel circuits each including an electro-optical element such as an organic EL (Electro Luminescence) element, and to a drive method for the display device.
In the related art, examples of a display element provided in a display device include an electro-optical element whose brightness is controlled with applied voltage, and an electro-optical element whose brightness is controlled with current. Typical examples of the electro-optical element whose brightness is controlled with applied voltage include a liquid crystal display element. On the other hand, typical examples of the electro-optical element whose brightness is controlled with current include an organic EL element. The organic EL element is also called an OLED (Organic Light-Emitting Diode). An organic EL display device including an organic EL element, which is a self-illumination electro-optical element, can facilitate a reduction in profile, a reduction in power consumption, an increase in brightness, and so forth compared with a liquid crystal display device that requires a backlight, a color filter, and so forth. Accordingly, the development of organic EL display devices has actively promoted in recent years.
Known drive systems for organic EL display devices include a passive matrix system (also referred to as a simple matrix system) and an active matrix system. An organic EL display device that adopts the passive matrix system has a simple structure but is difficult to increase in size and definition. In contrast, an organic EL display device that adopts the active matrix system (hereinafter referred to as an “active-matrix organic EL display device”) can easily achieve an increase in size and definition compared with an organic EL display device that adopts the passive matrix system.
An active-matrix organic EL display device has a plurality of pixel circuits formed thereon in a matrix. Each of the pixel circuits of the active-matrix organic EL display device typically includes an input transistor that selects a pixel, and a drive transistor that controls supply of current to the organic EL element. In the following, the current flowing from the drive transistor to the organic EL element may be referred to as the “drive current”.
The transistor T1 is disposed between the corresponding data line S and a gate terminal of the transistor T2. The transistor T1 has a gate terminal connected to the corresponding scanning line G, and a source terminal connected to the corresponding data line S. The transistor T2 is disposed in series with the organic EL element OLED. The transistor T2 has a drain terminal connected to a power supply line for supplying a high-level power supply voltage ELVDD, and a source terminal connected to an anode terminal of the organic EL element OLED. The power supply line for supplying the high-level power supply voltage ELVDD is hereinafter referred to as the “high-level power supply line”, and the high-level power supply line is denoted by the same symbol as that of the high-level power supply voltage, namely, ELVDD. The capacitor Cst has an end connected to the gate terminal of the transistor T2, and another end connected to the source terminal of the transistor T2. A cathode terminal of the organic EL element OLED is connected to a power supply line for supplying a low-level power supply voltage ELVSS. The power supply line for supplying the low-level power supply voltage ELVSS is hereinafter referred to as the “low-level power supply line”, and the low-level power supply line is denoted by the same symbol as that of the low-level power supply voltage, namely, ELVSS. Here, the node of the gate terminal of the transistor T2, the one end of the capacitor Cst, and a drain terminal of the transistor T1 is conveniently referred to as a “gate node VG”. In general, one of the drain and the source having a higher potential is referred to as a drain. In the description of this specification, however, one of the drain and the source is defined as a drain and the other as a source. Thus, the source potential may be higher than the drain potential.
Incidentally, an organic EL display device typically employs a thin-film transistor (TFT) as a drive transistor. In a thin-film transistor, however, variations in threshold voltage are likely to occur. Variations in threshold voltage occurring in a drive transistor provided in a display unit cause variations in brightness, resulting in a reduction in display quality. Accordingly, techniques for suppressing a reduction in the display quality of an organic EL display device have been proposed in the related art. For example, Japanese Unexamined Patent Application Publication No. 2005-31630 discloses a technique for compensating for variations in the threshold voltage of a drive transistor. Further, Japanese Unexamined Patent Application Publication No. 2003-195810 and Japanese Unexamined Patent Application Publication No. 2007-128103 disclose a technique for maintaining the current flow from a pixel circuit to an organic EL element OLED constant. In addition, Japanese Unexamined Patent Application Publication No. 2007-233326 discloses a technique for displaying an image with a uniform brightness regardless of the threshold voltage of a drive transistor or the mobility of electrons.
The techniques of the related art described above make it possible to supply a constant current to an organic EL element (light-emitting element) in accordance with the desired brightness (target brightness) even if variations in threshold voltage occur in a drive transistor provided in a display unit. However, the current efficiency of the organic EL element decreases with time. That is, even if a constant current is successfully supplied to the organic EL element, brightness gradually decreases with time. This leads to burn-in.
Therefore, if the degradation of the drive transistor and the degradation of the organic EL element are not compensated for, as illustrated in
However, the technique disclosed in Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2008-523448 allows detection of the characteristics of only one of the drive transistor or the organic EL element during a selection period. Thus, it is not possible to simultaneously compensate for both the degradation of the drive transistor and the degradation of the organic EL element. In addition, a long selection period is needed for the detection of the characteristics of both the drive transistor and the organic EL element. In the technique disclosed in Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2008-523448, an increase in the selection period during which characteristics are detected makes the length of the time period for light emission differ between a row for which characteristics are detected and the other rows. As a result, display with the desired brightness is not achievable. In other words, shortening the selection period to achieve display with the desired brightness does not ensure a sufficient amount of time for detecting characteristics. As a result, the accuracy of detection of characteristics is reduced, and the degradation of the drive transistor and the degradation of the organic EL element are not sufficiently compensated for.
Accordingly, it is an object of the present invention to provide a drive method for a display device which enables sufficient compensation for the degradation of a circuit element while ensuring a sufficient amount of time for the detection of the characteristics of the circuit element. It is a further object of the present invention to provide a drive method for a display device which enables simultaneous compensation for both the degradation of a drive transistor and the degradation of a light-emitting element.
A first aspect of the embodiment provides a drive method for a display device having a pixel matrix of n rows and m columns constituted by n×m (where n and m are integers greater than or equal to 2) pixel circuits, each including an electro-optical element whose brightness is controlled with current and a drive transistor for controlling a current to be supplied to the electro-optical element, the drive method including
a drive transistor characteristics detecting step of detecting characteristics of the drive transistor,
a correction data storing step of causing a correction data storage unit prepared in advance to store, as correction data for correcting a video signal, characteristics data obtained on the basis of a detection result in the drive transistor characteristics detecting step, and
a video signal correcting step of correcting the video signal on the basis of the correction data stored in the correction data storage unit, and generating a data signal to be supplied to the n×m pixel circuits,
wherein the display device has, for each column in the pixel matrix, a monitor line electrically connectable with sources of the drive transistors and positive electrodes of the electro-optical elements,
wherein processing of the drive transistor characteristics detecting step is performed for only one row in the pixel matrix per period of one frame,
wherein, when a row for which the processing of the drive transistor characteristics detecting step is performed within each frame period is defined as a monitored row and a row other than the monitored row is defined as an unmonitored row, a period of one frame for the monitored row includes a drive transistor characteristics detection period during which the processing of the drive transistor characteristics detecting step is performed, and a light emission period during which the electro-optical elements are enabled to emit light,
wherein, for the monitored row, the monitor line is electrically connected to the source of the drive transistor and the positive electrode of the electro-optical element throughout the drive transistor characteristics detection period and the light emission period, and
wherein a potential given to the monitor line during the drive transistor characteristics detection period and a potential given to the monitor line during the light emission period are made different so that a current flows through only the drive transistor out of the drive transistor and the electro-optical element during the drive transistor characteristics detection period and so that a current flows through only the electro-optical element out of the drive transistor and the electro-optical element during the light emission period.
In a second aspect of the embodiment, in the first aspect of the embodiment,
the drive method further includes an electro-optical element characteristics detecting step of detecting characteristics of the electro-optical element,
processing of the electro-optical element characteristics detecting step is performed during the light emission period, and
in the correction data storing step, characteristics data obtained on the basis of a detection result in the electro-optical element characteristics detecting step is further stored in the correction data storage unit as the correction data.
In a third aspect of the embodiment, in the second aspect of the embodiment,
in the electro-optical element characteristics detecting step, a current flowing through the electro-optical element with a constant voltage being given to the electro-optical element is measured, so that the characteristics of the electro-optical element are detected.
In a fourth aspect of the embodiment, in the third aspect of the embodiment,
in the electro-optical element characteristics detecting step, a length of a time period during which the constant voltage is given to the electro-optical element is adjusted in accordance with target brightness.
In a fifth aspect of the embodiment, in the fourth aspect of the embodiment,
in the electro-optical element characteristics detecting step, the constant voltage, which has a plurality of levels within a range in which an integral value of light emission current for a period of one frame is equal to a value corresponding to target gradation, is given to the electro-optical element, so that a plurality of properties are detected as the characteristics of the electro-optical element.
In a sixth aspect of the embodiment, in the third aspect of the embodiment,
the display device includes a current measurement circuit that measures a current of the monitor line,
in the drive transistor characteristics detecting step, the current measurement circuit measures a current of the monitor line, so that characteristics of the drive transistor are detected, and
in the electro-optical element characteristics detecting step, the current measurement circuit measures a current of the monitor line, so that characteristics of the electro-optical element are detected.
In a seventh aspect of the embodiment, in the second aspect of the embodiment,
in the electro-optical element characteristics detecting step, a voltage across the positive electrode of the electro-optical element is measured with a constant current being given to the electro-optical element, so that the characteristics of the electro-optical element are detected.
In an eighth aspect of the embodiment, in the seventh aspect of the embodiment,
in the electro-optical element characteristics detecting step, a length of a time period during which the constant current is given to the electro-optical element is adjusted in accordance with target brightness.
In a ninth aspect of the embodiment, in the eighth aspect of the embodiment,
in the electro-optical element characteristics detecting step, the constant current, which has a plurality of levels within a range in which an integral value of light emission current for a period of one frame is equal to a value corresponding to target gradation, is given to the electro-optical element, so that a plurality of properties are detected as the characteristics of the electro-optical element.
In a tenth aspect of the embodiment, in the seventh aspect of the embodiment,
the display device includes
in the drive transistor characteristics detecting step, the current measurement circuit measures a current of the monitor line, so that characteristics of the drive transistor are detected, and
in the electro-optical element characteristics detecting step, the voltage measurement circuit measures a voltage across the monitor line, so that characteristics of the electro-optical element are detected.
In an eleventh aspect of the embodiment, in the second aspect of the embodiment,
the processing of the electro-optical element characteristics detecting step is not performed on a pixel displayed in black or substantially in black within the pixel matrix of n rows and m columns.
In a twelfth aspect of the embodiment, in the second aspect of the embodiment,
the drive method further includes
a temperature detecting step of detecting a temperature, and
a temperature change compensating step of subjecting the characteristics data to correction based on the temperature detected in the temperature detecting step, and
in the correction data storing step, data obtained in processing of the temperature change compensating step is stored in the correction data storage unit as the correction data.
In a thirteenth aspect of the embodiment, in the first aspect of the embodiment,
in the drive transistor characteristics detecting step, a current flowing between a drain and source of the drive transistor is measured with a voltage between a gate and source of the drive transistor being set to a predetermined magnitude, so that the characteristics of the drive transistor are detected.
In a fourteenth aspect of the embodiment, in the thirteenth aspect of the embodiment,
in the drive transistor characteristics detecting step, a potential having a plurality of levels is given to the gate of the drive transistor, so that a plurality of properties are detected as the characteristics of the drive transistor.
In a fifteenth aspect of the embodiment, in the thirteenth aspect of the embodiment,
the display device includes a current measurement circuit that measures a current of the monitor line, and
in the drive transistor characteristics detecting step, the current measurement circuit measures a current of the monitor line, so that characteristics of the drive transistor are detected.
In a sixteenth aspect of the embodiment, in the fifteenth aspect of the embodiment,
one current measurement circuit, which is the current measurement circuit, is disposed for every K monitor lines (K is an integer greater than or equal to 2 and less than or equal to m), and
in each frame period,
In a seventeenth aspect of the embodiment, in the first aspect of the embodiment,
each frame period includes a selection period, the selection period being a period during which a predetermined potential is given to gates of the drive transistors for the monitored row at the beginning of a period of one frame, and being a period during which a potential corresponding to target brightness is given to gates of the drive transistors for the unmonitored row at the beginning of the period of one frame, and
when the potential given to the gates of the drive transistors for the monitored row during the selection period is represented by Vmg, the potential given to the monitor line during the drive transistor characteristics detection period is represented by Vm_TFT, and the potential given to the monitor line during the light emission period is represented by Vm_oled, a value of Vmg is defined so as to satisfy the following expressions:
Vmg>Vm_TFT+Vth(T2), and
Vmg<Vm_oled+Vth(T2),
where Vth(T2) is a threshold voltage of a leading drive transistor.
In an eighteenth aspect of the embodiment, in the first aspect of the embodiment,
each frame period includes a selection period, the selection period being a period during which a predetermined potential is given to gates of the drive transistors for the monitored row at the beginning of a period of one frame, and being a period during which a potential corresponding to target brightness is given to gates of the drive transistors for the unmonitored row at the beginning of the period of one frame, and
when the potential given to the gates of the drive transistors for the monitored row during the selection period is represented by Vmg and the potential given to the monitor line during the drive transistor characteristics detection period is represented by Vm_TFT, a value of Vm_TFT is defined so as to satisfy the following expressions:
Vm_TFT<Vmg−Vth(T2), and
Vm_TFT<ELVSS+Vth(oled),
where Vth(T2) is a threshold voltage of the drive transistors, Vth(oled) is a light emission threshold voltage of the electro-optical element, and ELVSS is a potential at a negative electrode of the electro-optical element.
In a nineteenth aspect of the embodiment, in the first aspect of the embodiment,
each frame period includes a selection period, the selection period being a period during which a predetermined potential is given to gates of the drive transistors for the monitored row at the beginning of a period of one frame, and being a period during which a potential corresponding to target brightness is given to gates of the drive transistors for the unmonitored row at the beginning of the period of one frame, and
In a twentieth aspect of the embodiment, in the first aspect of the embodiment,
each frame period includes a selection period, the selection period being a period during which a predetermined potential is given to gates of the drive transistors for the monitored row at the beginning of a period of one frame, and being a period during which a potential corresponding to target brightness is given to gates of the drive transistors for the unmonitored row at the beginning of the period of one frame, and
when the potential given to the gates of the drive transistors for the monitored row during the selection period is represented by Vmg, the potential given to the monitor line during the drive transistor characteristics detection period is represented by Vm_TFT, and the potential given to the monitor line during the light emission period is represented by Vm_oled, values of Vmg, Vm_TFT, and Vm_oled are defined so as to satisfy the following relationships:
Vm_TFT<Vmg−Vth(T2),
Vm_TFT<ELVSS+Vth(oled),
Vm_oled>Vmg−Vth(T2), and
Vm_oled>ELVSS+Vth(oled),
where Vth(T2) is a threshold voltage of the drive transistors, Vth(oled) is a light emission threshold voltage of the electro-optical element, and ELVSS is a potential at a negative electrode of the electro-optical element.
In a twenty-first aspect of the embodiment, in the first aspect of the embodiment,
a length of the drive transistor characteristics detection period and a length of the light emission period are adjusted in accordance with target brightness.
In a twenty-second aspect of the embodiment, in the first aspect of the embodiment,
in each frame period, the drive transistor characteristics detection period precedes the light emission period.
In a twenty-third aspect of the embodiment, in the first aspect of the embodiment,
each frame period includes a selection period, the selection period being a period during which a predetermined potential is given to gates of the drive transistors for the monitored row at the beginning of a period of one frame, and being a period during which a potential corresponding to target brightness is given to gates of the drive transistors for the unmonitored row at the beginning of the period of one frame, and
a length of the selection period is equal for the monitored row and the unmonitored row.
In a twenty-fourth aspect of the embodiment, in the first aspect of the embodiment,
the drive method further includes a monitored region storing step of storing, in a monitored region storage unit prepared in advance, information that identifies a region in which the processing of the drive transistor characteristics detecting step was performed last when power to the display device was turned off, and
the processing of the drive transistor characteristics detecting step is performed, starting with a region at or near the region obtained on the basis of the information stored in the monitored region storage unit, after power to the display device is turned on.
A twenty-fifth aspect of the embodiment provides a display device having pixel matrix of n rows and m columns constituted by n×m (where n and m are integers greater than or equal to 2) pixel circuits, each including an electro-optical element whose brightness is controlled with current and a drive transistor for controlling a current to be supplied to the electro-optical element, the display device including
a pixel circuit driving unit that drives the n×m pixel circuits while performing a drive transistor characteristics detection process of detecting characteristics of the drive transistor,
a correction data storage unit that stores characteristics data obtained on the basis of a detection result in the drive transistor characteristics detection process, as correction data for correcting a video signal,
a video signal correction unit that corrects the video signal on the basis of the correction data stored in the correction data storage unit, and that generates a data signal to be supplied to the n×m pixel circuits, and
a monitor line provided for each column in the pixel matrix, the monitor line being configured to be electrically connectable with sources of the drive transistors and positive electrodes of the electro-optical elements,
wherein, when a row for which the drive transistor characteristics detection process is performed within each frame period is defined as a monitored row and a row other than the monitored row is defined as an unmonitored row, a period of one frame for the monitored row includes a drive transistor characteristics detection period during which the drive transistor characteristics detection process is performed, and a light emission period during which the electro-optical elements are enabled to emit light, and
wherein the pixel circuit driving unit
According to the first aspect of the embodiment, in a display device having pixel circuits each including an electro-optical element whose brightness is controlled with current (for example, an organic EL element) and a drive transistor for controlling a current to be supplied to the electro-optical element, the characteristics of the drive transistor are detected for one row per period of one frame. Then, a video signal is corrected by using correction data obtained by taking into account the detection result. A data signal based on the video signal corrected in the way described above is supplied to each of the pixel circuits. Thus, a drive current having a magnitude that allows the degradation of the drive transistor to be compensated for is supplied to the electro-optical element. In addition, the on/off state of the drive transistor is switched by changing the potential of a monitor line. For this reason, there is no need to provide a period for changing the gate potential of the drive transistor between a drive transistor characteristics detection period and a light emission period in order to switch the on/off state of the drive transistor. Accordingly, it is possible to ensure a sufficient length of a monitoring period. Therefore, it is possible to sufficiently compensate for the degradation of the drive transistor while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor.
According to the second aspect of the embodiment, the characteristics of an electro-optical element are detected, and a video signal is corrected by taking into account the detection result. Thus, a drive current having a magnitude that allows the degradation of the electro-optical element to be compensated for is supplied to the electro-optical element. Therefore, it is possible to sufficiently compensate for both the degradation of a drive transistor and the degradation of an electro-optical element while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor and the characteristics of the electro-optical element.
According to the third aspect of the embodiment, it is possible to reduce the amount of measurement time for detecting the characteristics of an electro-optical element.
According to the fourth aspect of the embodiment, it is possible to cause an electro-optical element to emit light at the desired brightness while detecting the characteristics of the electro-optical element.
According to the fifth aspect of the embodiment, a plurality of properties are detectable as the characteristics of an electro-optical element. Accordingly, it is possible to more effectively compensate for the degradation of the electro-optical element.
According to the sixth aspect of the embodiment, it is possible to detect the characteristics of both drive transistors and electro-optical elements included in each column, by using a single monitor line.
According to the seventh aspect of the embodiment, a constant current is supplied to an electro-optical element whose characteristics are to be detected. Accordingly, the amount of time during which a constant current is supplied to an electro-optical element is adjusted, making it possible to cause the electro-optical element to emit light at the desired brightness.
According to the eighth aspect of the embodiment, it is possible to cause an electro-optical element to emit light at the desired brightness while detecting the characteristics of the electro-optical element.
According to the ninth aspect of the embodiment, a plurality of properties are detectable as the characteristics of an electro-optical element. Accordingly, it is possible to more effectively compensate for the degradation of the electro-optical element.
According to the tenth aspect of the embodiment, it is possible to detect the characteristics of both drive transistors and electro-optical elements included in each column, by using a single monitor line.
According to the eleventh aspect of the embodiment, unwanted light emission of an electro-optical element is prevented.
According to the twelfth aspect of the embodiment, a video signal is corrected by using correction data that takes into account a temperature change. Accordingly, it is possible to sufficiently compensate for both the degradation of a drive transistor and the degradation of an electro-optical element regardless of a change in temperature.
According to the thirteenth aspect of the embodiment, it is possible to comparatively easily detect the characteristics of a drive transistor.
According to the fourteenth aspect of the embodiment, a plurality of properties are detectable as the characteristics of a drive transistor. Accordingly, it is possible to more effectively compensate for the degradation of the drive transistor.
According to the fifteenth aspect of the embodiment, it is possible to detect the characteristics of drive transistors included in each column, by using a single monitor line.
According to the sixteenth aspect of the embodiment, a single current measurement circuit is sharable by a plurality of monitor lines. Accordingly, it is possible to compensate for the degradation of drive transistors while suppressing an increase in circuit area.
According to the seventeenth aspect of the embodiment, it is ensured that a drive transistor is in an on state during the drive transistor characteristics detection period, and it is ensured that an electro-optical element is in an on state during the light emission period.
According to the eighteenth aspect of the embodiment, it is ensured that a drive transistor is in an on state and an electro-optical element is in an off state during the drive transistor characteristics detection period.
According to the nineteenth aspect of the embodiment, it is ensured that a drive transistor is in an off state and an electro-optical element is in an on state during the light emission period.
According to the twentieth aspect of the embodiment, it is ensured that a drive transistor is in an on state and an electro-optical element is in an off state during the drive transistor characteristics detection period. It is also ensured that a drive transistor is in an off state and an electro-optical element is in an on state during the light emission period.
According to the twenty-first aspect of the embodiment, it is possible to lengthen the drive transistor characteristics detection period in accordance with the target brightness. This makes it possible to measure current more times in order to detect the characteristics of a drive transistor. Accordingly, the S/N ratio of the detected current is increased, resulting in an improvement in the accuracy of detection of the characteristics of the drive transistor.
According to the twenty-second aspect of the embodiment, a drive transistor is prevented from being in an off state during the drive transistor characteristics detection period.
According to the twenty-third aspect of the embodiment, it is possible to ensure a sufficient length of the monitoring period without increasing the complexity of the configuration of a driving circuit of the display device.
According to the twenty-fourth aspect of the embodiment, a difference is prevented from occurring in the number of times the characteristics of a drive transistor are detected between, for example, an upper row and a lower row. This enables uniform compensation for the degradation of drive transistors across the entire screen surface, and effectively prevents the occurrence of variations in brightness.
According to the twenty-fifth aspect of the embodiment, a display device can achieve advantages similar to those of the first aspect of the present invention.
Embodiments of the present invention will be described hereinafter with reference to the accompanying drawings. In the following, it is assumed that m and n are integers greater than or equal to 2, i is an integer greater than or equal to 1 and less than or equal to n, and j is an integer greater than or equal to 1 and less than or equal to m. In the following, furthermore, the characteristics of a drive transistor provided in a pixel circuit are referred to as “TFT characteristics”, and the characteristics of an organic EL element provided in a pixel circuit are referred to as “OLED characteristics”.
1.1 Overall Configuration
The display unit 10 has disposed thereon m data lines S(1) to S(m) and n scanning lines G1(1) to G1(n) intersecting the m data lines S(1) to S(m). In the following, a direction in which data lines extend is referred to as a Y direction, and a direction in which scanning lines extend is referred to as an X direction. Constituent elements arranged in the Y direction may be referred to as “columns”, and constituent elements arranged in the X direction may be referred to as “rows”. The display unit 10 also has disposed thereon m monitor lines M(1) to M(m) so as to correspond to the m data lines S(1) to S(m) in a one-to-one fashion. The monitor lines M(1) to M(m) are parallel to the data lines S(1) to S(m). The display unit 10 also has disposed thereon n monitor control lines G2(1) to G2(n) so as to correspond to the n scanning lines G1(1) to G1(n) in a one-to-one fashion. The monitor control lines G2(1) to G2(n) are parallel to the scanning lines G1(1) to G1(n). The display unit 10 further includes n×m pixel circuits 11 so as to correspond to the intersections of the n scanning lines G1(1) to G1(n) and the m data lines S(1) to S(m). The n×m pixel circuits 11 are provided in the manner described above, resulting in a pixel matrix of n rows and m columns being formed on the display unit 10. The display unit 10 also has disposed thereon a high-level power supply line for supplying a high-level power supply voltage and a low-level power supply line for supplying a low-level power supply voltage.
In the following, a data line or data lines are denoted simply by symbol S if the m data lines S(1) to S(m) do not need to be identified from one another. Also, a monitor line or monitor lines are denoted simply by symbol M if the m monitor lines M(1) to M(m) do not need to be identified from one another, a scanning line or scanning lines are denoted simply by symbol G1 if the n scanning lines G1(1) to G1(n) do not need to be identified from one another, and a monitor control line or monitor control lines are denoted simply by symbol G2 if the n monitor control lines G2(1) to G2(n) do not need to be identified from one another.
The control circuit 20 gives a data signal DA and a source control signal SCTL to the source driver 30 to control the operation of the source driver 30, and transmits a gate control signal GCTL to the gate driver 40 to control the operation of the gate driver 40. The source control signal SCTL includes, for example, a source start pulse, a source clock, and a latch strobe signal. The gate control signal GCTL includes, for example, a gate start pulse and a gate clock. The control circuit 20 receives monitor data MO given from the source driver 30, and updates correction data stored in the correction data storage unit 50. The monitor data MO is data measured to determine TFT characteristics and OLED characteristics.
The gate driver 40 is connected to the n scanning lines G1(1) to G1(n) and the n monitor control lines G2(1) to G2(n). The gate driver 40 is constituted by shift registers, a logic circuit, and so forth. In the organic EL display device 1 according to this embodiment, a video signal sent from outside (data on which the data signal DA is based) is subjected to correction in accordance with the TFT characteristics and the OLED characteristics. In this regard, TFT characteristics and OLED characteristics for one row within each frame are detected. That is, when the TFT characteristics and the OLED characteristics for the first row within a certain frame are detected, the TFT characteristics and the OLED characteristics for the second row within a subsequent frame are detected and subsequently the TFT characteristics and the OLED characteristics for the third row within a further subsequent frame are detected. In the way described above, the TFT characteristics and the OLED characteristics for n rows are detected over a period of n frames. Here, if a frame in which the TFT characteristics and the OLED characteristics for the first row are detected is defined as the (k+1)-th frame, the n scanning lines G1(1) to G1(n) and the n monitor control lines G2(1) to G2(n) are driven in a manner illustrated in
The source driver 30 is connected to the m data lines S(1) to S(m) and the m monitor lines M(1) to M(m). The source driver 30 is constituted by a drive signal generation circuit 31, a signal conversion circuit 32, and an output unit 33 having m output circuits 330. Each of the m output circuits 330 in the output unit 33 is connected to the corresponding data line S among the m data lines S(1) to S(m) and to the corresponding monitor line M among the m monitor lines M(1) to M(m). Since the output circuits 330 are connected to the data lines S and the monitor lines M in the manner described above, the source driver 30 can be functionally separated into a data line driving unit 30a and a monitor line driving unit 30b (see
The drive signal generation circuit 31 includes shift registers, a sampling circuit, and latch circuits. In the drive signal generation circuit 31, the shift registers sequentially transfer source start pulses from the input ends to the output ends in synchronization with source clocks. In accordance with the transfer of the source start pulses, sampling pulses corresponding to the respective data lines S are output from the shift registers. The sampling circuit sequentially stores data signals DA for one row in accordance with the timing of sampling pulses. The latch circuits capture and hold the data signals DA for one row, which are stored in the sampling circuit, in accordance with latch strobe signals.
The signal conversion circuit 32 includes a D/A converter and an A/D converter. The data signals DA for one row held in the latch circuits in the drive signal generation circuit 31 in the way described above are converted into analog voltages by the D/A converter in the signal conversion circuit 32. The analog voltages obtained as a result of the conversion are given to the output circuits 330 in the output unit 33. Further, monitor data MO is given to the signal conversion circuit 32 from the output circuits 330. The monitor data MO is converted from analog voltages to digital signals by the A/D converter in the signal conversion circuit 32. The monitor data MO converted into digital signals is given to the control circuit 20 via the drive signal generation circuit 31. Further, the D/A converter in the signal conversion circuit 32 converts a signal that is one of source control signals SCTL and that is used to control the potentials of the monitor lines M into analog voltages, and the analog voltages are given to the output circuits 330 in the output unit 33 as monitor line control voltages Vm.
The correction data storage unit 50 includes a TFT offset memory 51a, an OLED offset memory 51b, a TFT gain memory 52a, and an OLED gain memory 52b. These four memories may physically form a single memory, or may be physically different memories. The correction data storage unit 50 stores correction data used for the correction of a video signal sent from outside. More specifically, the TFT offset memory 51a stores offset values based on the result of detection of TFT characteristics as correction data. The OLED offset memory 51b stores offset values based on the result of detection of OLED characteristics as correction data. The TFT gain memory 52a stores gain values based on the result of detection of TFT characteristics as correction data. The OLED gain memory 52b stores degradation correction coefficients based on the result of detection of OLED characteristics as correction data. Typically, a number of offset values equal to the number of pixels in the display unit 10 and a number of gain values equal to the number of pixels in the display unit 10 are respectively stored in the TFT offset memory 51a and the TFT gain memory 52a as correction data based on the result of detection of TFT characteristics. In addition, typically, a number of offset values equal to the number of pixels in the display unit 10 and a number of degradation correction coefficients equal to the number of pixels in the display unit 10 are respectively stored in the OLED offset memory 51b and the OLED gain memory 52b as correction data based on the result of detection of OLED characteristics. A single value may be stored in each memory for every plurality of pixels.
The control circuit 20 updates the offset values in the TFT offset memory 51a, the offset values in the OLED offset memory 51b, the gain values in the TFT gain memory 52a, and the degradation correction coefficients in the OLED gain memory 52b on the basis of the monitor data MO given from the source driver 30. Further, the control circuit 20 reads the offset values in the TFT offset memory 51a, the offset values in the OLED offset memory 51b, the gain values in the TFT gain memory 52a, and the degradation correction coefficients in the OLED gain memory 52b, and corrects a video signal. Data obtained as a result of the correction is sent to the source driver 30 as a data signal DA.
1.2 Configuration of Pixel Circuit and Current Measurement Circuit
<1.2.1 Pixel Circuit>
The transistor T1 is disposed between the data line S(j) and a gate terminal of the transistor T2. The transistor T1 has a gate terminal connected to the scanning line G1(i), and a source terminal connected to the data line S(j). The transistor T2 is disposed in series with the organic EL element OLED. The gate terminal of the transistor T2 is connected to a drain terminal of the transistor T1. Further, the transistor T2 has a drain terminal connected to a high-level power supply line ELVDD, and a source terminal connected to an anode terminal of the organic EL element OLED. The transistor T3 has a gate terminal connected to the monitor control line G2(i), a drain terminal connected to the anode terminal of the organic EL element OLED, and a source terminal connected to the monitor line M(j). The capacitor Cst has an end connected to the gate terminal of the transistor T2, and another end connected to the drain terminal of the transistor T2. A cathode terminal of the organic EL element OLED is connected to a low-level power supply line ELVSS.
In the configuration illustrated in
<1.2.2 Regarding Transistors in Pixel Circuits>
In this embodiment, all the transistors T1 to T3 in the pixel circuits 11 are of an n-channel type. In this embodiment, furthermore, the transistors T1 to T3 are each implemented as an oxide TFT (a thin-film transistor that employs an oxide semiconductor as a channel layer).
An oxide semiconductor layer included in an oxide TFT will be described hereinafter. The oxide semiconductor layer is, for example, an In—Ga—Zn—O-based semiconductor layer. The oxide semiconductor layer includes, for example, an In—Ga—Zn—O-based semiconductor. The In—Ga—Zn—O-based semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc). The ratio (composition ratio) of In to Ga to Zn is not particularly limited. For example, In:Ga:Zn=2:2:1, In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:2, or the like may be employed.
A TFT having an In—Ga—Zn—O-based semiconductor layer has high mobility (mobility that is more than 20 times as high as an amorphous silicon TFT) and low leakage current (leakage current less than one-hundredth of that of an amorphous silicon TFT), and is thus suitable for use as a drive TFT (the transistor T2) and a switching TFT (the transistor T1) in a pixel circuit. The use of a TFT having an In—Ga—Zn—O-based semiconductor layer can significantly reduce the power consumption of a display device.
The In—Ga—Zn—O-based semiconductor may be amorphous, or may include a crystalline portion and have crystallinity. Preferred examples of a crystalline In—Ga—Zn—O-based semiconductor include a crystalline In—Ga—Zn—O-based semiconductor with a c-axis aligned substantially perpendicularly to a surface of the layer. The crystal structure of such an In—Ga—Zn—O-based semiconductor is disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2012-134475.
The oxide semiconductor layer may include any other oxide semiconductor instead of an In—Ga—Zn—O-based semiconductor. The oxide semiconductor layer may include, for example, a Zn—O-based semiconductor (ZnO), an In—Zn—O-based semiconductor (IZO (registered trademark)), a Zn—Ti—O-based semiconductor (ZTO), a Cd—Ge—O-based semiconductor, a Cd—Pb—O-based semiconductor, a CdO (cadnium oxide), a Mg—Zn—O-based semiconductor, an In—Sn—Zn—O-based semiconductor (for example, In2O3—SnO2—ZnO), an In—Ga—Sn—O-based semiconductor, or the like.
<1.2.3 Current Measurement Circuit>
The detailed configuration of the current measurement circuit 332 will be described with reference to
<1.3 Drive Method>
Next, a drive method according to this embodiment will be described. As described above, in this embodiment, TFT characteristics and OLED characteristics for one row within each frame are detected. In each frame, an operation for detecting TFT characteristics and OLED characteristics (hereinafter referred to as the “characteristics detection operation”) is performed for the monitored row, whereas a normal operation is performed for the unmonitored rows. That is, if a frame in which the TFT characteristics and the OLED characteristics for the first row are detected is defined as the (k+1)-th frame, the operation for the respective rows transitions in a manner illustrated in
<1.3.1 Operation of Pixel Circuit>
<1.3.1.1 Normal Operation>
In each frame, the normal operation is performed for the unmonitored rows. In each of the pixel circuits 11 included in the unmonitored rows, the transistor T1 is maintained in the off state after the writing based on the data voltage corresponding to the target brightness has been performed within the selection period. Through the writing based on the data voltage, the transistor T2 is brought into the on state. The transistor T3 is maintained in the off state. Therefore, the drive current is supplied to the organic EL element OLED via the transistor T2, as indicated by an arrow denoted by symbol 71 in
<1.3.1.2 Characteristics Detection Operation>
In each frame, the characteristics detection operation is performed for the monitored row.
In the first half (the selection period Tb) of the TFT characteristics detection period Ta, the scanning line G1(i) and the monitor control line G2(i) are set to the active state. Accordingly, the transistor T1 and the transistor T3 are brought into the on state. During this period, furthermore, a potential Vmg is given to the data line S(j), and a potential Vm_TFT is given to the monitor line M(j). A potential Vm_oled is given to the monitor line M(j) during the light emission period Tc described below.
Here, if a threshold voltage of the transistor T2 determined based on the offset values stored in the TFT offset memory 51a is represented by Vth(T2), the value of the potential Vmg, the value of the potential Vm_TFT, and the value of the potential Vm_oled are set so that Expressions (1) and (2) below hold.
Vm_TFT+Vth(T2)<Vmg (1)
Vmg<Vm_oled+Vth(T2) (2)
In addition, if a light emission threshold voltage of the organic EL element OLED determined based on the offset values stored in the OLED offset memory 51b is represented by Vth(oled), the value of the potential Vm_TFT is set so that Expression (3) below holds.
Vm_TFT<ELVSS+Vth(oled) (3)
Furthermore, if a breakdown voltage of the organic EL element OLED is represented by Vbr(oled), the value of the potential Vm_TFT is set so that Expression (4) below holds.
Vm_TFT>ELVSS−Vbr(oled) (4)
As described above, in the first half (the selection period Tb) of the TFT characteristics detection period Ta, the potential Vmg satisfying Expressions (1) and (2) above is given to the data line S(j), and the potential Vm_TFT satisfying Expressions (1), (3), and (4) above is given to the monitor line M(j). From Expression (1) above, the transistor T2 is set to the on state during this period. Further, from Expressions (3) and (4) above, no current flows through the organic EL element OLED during this period.
In the second half of the TFT characteristics detection period Ta, the scanning line G1(i) is set to the inactive state. Accordingly, the transistor T1 is brought into the off state. On the other hand, the transistor T2 is maintained in the on state since the capacitor Cst is charged during the selection period Tb. The transistor T3 is also maintained in the on state since the monitor control line G2(i) is maintained in the active state. The potential Vm_TFT satisfying Expressions (1), (3), and (4) above is given to the monitor line M(j).
Therefore, during the TFT characteristics detection period Ta, the current flowing through the transistor T2 is output to the monitor line M(j) through the transistor T3, as indicated by an arrow denoted by symbol 72 in
Incidentally, in this embodiment, as illustrated in
During the light emission period Tc, the scanning line G1(i) is maintained in the inactive state and the monitor control line G2(i) is maintained in the active state. During this period, accordingly, the transistor T1 is maintained in the off state and the transistor T3 is maintained in the on state. In addition, as described above, the potential Vm_oled is given to the monitor line M(j) during this period.
Here, the value of the potential Vm_oled is set so that Expression (2) above and Expression (5) below hold.
ELVSS+Vth(oled)<Vm_oled (5)
In addition, if a breakdown voltage of the transistor T2 is represented by Vbr(T2), the value of the potential Vm_oled is set so that Expression (6) below holds.
Vm_oled<Vmg+Vbr(T2) (6)
As described above, the potential Vm_oled satisfying Expressions (2), (5), and (6) above is given to the monitor line M(j) during the light emission period Tc. From Expressions (2) and (6) above, the transistor T2 is brought into the off state during this period. Further, from Expression (5) above, a current flows through the organic EL element OLED during this period.
Therefore, during the light emission period Tc, the current flows from the monitor line M(j) to the organic EL element OLED as indicated by an arrow denoted by symbol 73 in
The value of the potential Vmg, the value of the potential Vm_TFT, and the value of the potential Vm_oled are determined in accordance with Expressions (1) to (6) above and also by taking into account, for example, the measurable range of the current measurement circuit 332 which is adopted.
A change in the on/off state of the switch 3323 in the current measurement circuit 332 will now be described with reference to
Incidentally, during the light emission period Tc, a current is supplied to the organic EL elements OLED for the monitored row on the basis of a constant voltage. In this embodiment, accordingly, the length of the time period during which an organic EL element OLED emits light is adjusted to achieve the desired gradation display. Specifically, the higher the gradation, the longer the time period for light emission is set to be, and the lower the gradation, the shorter the time period for light emission is set to be. That is, as illustrated in FIG. 15, a period Tc1 during which the illumination state is actually maintained is set to be longer for higher gradation, and a period Tc2 during which the non-illumination state is maintained is set to be shorter for lower gradation. In this case, the lengths of the periods Tc1 and Tc2 are adjusted on the basis of the degradation correction coefficients stored in the OLED gain memory 52b. As described above, for the detection of the OLED characteristics in the monitored row, the states (illumination state/non-illumination state) of the organic EL elements OLED are switched in a time-controlled manner. In order to bring the organic EL element OLED into the non-illumination state, it may be sufficient that the potential (the monitor line control voltage Vm) of the monitor line M(j) be set so that the voltage to be applied to the organic EL element OLED is smaller than the light emission threshold voltage Vth(oled). For example, it may be sufficient that the potential of the monitor line M(j) be equal to the potential of the low-level power supply voltage ELVSS. As described above, the length of the time period during which the organic EL element OLED emits light is adjusted so that the integral value of light emission current within a period of one frame becomes equal to the value corresponding to the desired gradation. In other words, the length of the time period during which the constant voltage is given to the organic EL element OLED is adjusted in accordance with the target brightness. Note that the value of the voltage may be changed during the light emission period Tc so that properties at a plurality of operating points (current-voltage characteristics) are measured so long as the integral value of light emission current within a period of one frame becomes equal to the value corresponding to the desired gradation.
It is preferable that OLED characteristics not be detected when the target gradation is equal to or close to gradation corresponding to black display or similar gradation. That is, it is preferable that OLED characteristics not be detected for a pixel displayed in black or substantially in black within a pixel matrix of n rows and m columns. This can prevent unwanted light emission. Since the organic EL element OLED does not degrade while not emitting light, there is no need to detect characteristics.
In addition, the same row over a plurality of frames may be used as the monitored row. In the way described above, a characteristics detection process is performed repeatedly for a single row, thereby achieving the advantage of improvements in S/N ratio.
<1.3.2 Update of Correction Data in Correction Data Storage Unit>
Next, how the correction data stored in the correction data storage unit 50 (the offset values stored in TFT offset memory 51a, the offset values stored in the OLED offset memory 51b, the gain values stored in the TFT gain memory 52a, and the degradation correction coefficients stored in the OLED gain memory 52b) is updated will be described.
When the TFT characteristics detection period Ta is reached, the TFT characteristics are detected with the first reference potential Vm_TFT_1 being given to the monitor line M (step S110). Through step S110, an offset value for correcting a video signal is determined. Then, the offset value determined in step S110 is stored in the TFT offset memory 51a as a new offset value (step S120). Thereafter, the TFT characteristics are detected with the second reference potential Vm_TFT_2 being given to the monitor line M (step S130). Through step S130, a gain value for correcting the video signal is determined. Then, the gain value determined in step S130 is stored in the TFT gain memory 52a as a new gain value (step S140). Thereafter, the OLED characteristics are detected during the light emission period Tc (step S150). Through step S150, an offset value and a degradation correction coefficient for correcting the video signal are determined. Then, the offset value determined in step S150 is stored in the OLED offset memory 51b as a new offset value (step S160). Further, the degradation correction coefficient determined in step S150 is stored in the OLED gain memory 52b as a new degradation correction coefficient (step S170). In the way described above, correction data corresponding to one pixel is updated. In this embodiment, TFT characteristics and OLED characteristics for one row within each frame are detected. Thus, m offset values in the TFT offset memory 51a, m gain values in the TFT gain memory 52a, m offset values in the OLED offset memory 51b, and m degradation correction coefficients in the OLED gain memory 52b are updated per period of one frame.
In this embodiment, characteristics data is implemented using the data (the offset value, the gain value, and the degradation correction coefficient) obtained on the basis of the detection results in step S110, step S130, and step S150.
Incidentally, as described above, the magnitude of the current flowing through the organic EL element OLED is measured on the basis of the constant voltage during the light emission period Tc. The smaller the detected current obtained as a result of the measurement, the greater the level of degradation of the organic EL element OLED. Accordingly, the data in the OLED offset memory 51b and the data in the OLED gain memory 52b are updated so that the smaller the detected current is, the larger the offset value becomes and the larger the degradation correction coefficient becomes.
<1.3.3 Correction of Video Signal>
In this embodiment, a video signal sent from outside is corrected by using the correction data stored in the correction data storage unit 50 in order to compensate for the degradation of the drive transistor and the degradation of the organic EL element OLED. The correction of a video signal will be described hereinafter with reference to
As illustrated in
In the configuration described above, a video signal sent from outside is corrected as follows. The video signal sent from outside is first subjected to gamma correction by using the LUT 211. That is, gradation P indicated by the video signal is converted into a control voltage Vc through gamma correction. The multiplier unit 212 receives the control voltage Vc and a gain value B1 read from the TFT gain memory 52a, and outputs a value “Vc·B1” obtained by multiplying them. The multiplier unit 213 receives the value “Vc·B1” output from the multiplier unit 212 and a degradation correction coefficient B2 read from the OLED gain memory 52b, and outputs a value “Vc·B1·B2” obtained by multiplying them. The adder unit 214 receives the value “Vc·B1·B2” output from the multiplier unit 213 and an offset value Vt1 read from the TFT offset memory 51a, and outputs a value “Vc·B1·B2+Vt1” obtained by adding them together. The adder unit 215 receives the value “Vc·B1·B2+Vt1” output from the adder unit 214 and an offset value Vt2 read from the OLED offset memory 51b, and outputs a value “Vc·B1·B2+Vt1+Vt2” obtained by adding them together. The multiplier unit 216 receives the value “Vc·B1·B2+Vt1+Vt2” output from the adder unit 215 and a coefficient Z for compensating for the attenuation of a data voltage caused by the parasitic capacitance of the pixel circuit 11, and outputs a value “Z(Vc·B1·B2+Vt1+Vt2)” obtained by multiplying them. The value “Z(Vc·B1·B2+Vt1+Vt2)” obtained in the way described above is sent from the control circuit 20 to the data line driving unit 30a in the source driver 30 as a data signal DA. The multiplier unit 216 that performs a process for multiplying the value output from the adder unit 215 by the coefficient Z for compensating for the attenuation of the data voltage may not necessarily be included.
Further, the potential Vm_oled to be given to the monitor line M during the light emission period Tc is corrected as follows. The multiplier unit 221 receives pre_Vm_oled (Vm_oled before correction) and the degradation correction coefficient B2 read from the OLED gain memory 52b, and outputs a value “pre_Vm_oled·B2” obtained by multiplying them. The adder unit 222 receives the value “pre_Vm_oled·B2” output from the multiplier unit 221 and the offset value Vt2 read from the OLED offset memory 51b, and outputs a value “pre_Vm_oled·B2+Vt2” obtained by adding them together. The value “pre_Vm_oled·B2+Vt2” obtained in the way described above is sent from the control circuit 20 to the monitor line driving unit 30b in the source driver 30 as data for specifying the potential Vm_oled of the monitor line M within the light emission period Tc.
<1.3.4 Summary of Drive Method>
In this embodiment, step S10 implements a drive transistor characteristics detecting step, step S30 implements an electro-optical element characteristics detecting step, step S20 and step S40 implement a correction data storing step, and step S50 implements a video signal correcting step. Further, the process of step S10 implements a drive transistor characteristics detection process, and the process of step S30 implements an electro-optical element characteristics detection process.
1.4 Advantages
According to this embodiment, TFT characteristics and OLED characteristics for one row within each frame are detected. When the focus is on the monitored row, in a period of one frame, the TFT characteristics are detected during the TFT characteristics detection period Ta including the selection period Tb, and the OLED characteristics are detected during the light emission period Tc. Then, a video signal sent from outside is corrected by using correction data determined by taking into account both the result of detection of the TFT characteristics and the result of detection of the OLED characteristics. A data voltage based on the video signal (the data signal DA) corrected in the way described above is applied to the data line S. Accordingly, when the organic EL element OLED in each of the pixel circuits 11 is to be caused to emit light, a drive current having a magnitude that allows the degradation of the drive transistor (the transistor T2) and the degradation of the organic EL element OLED to be compensated for is supplied to the organic EL element OLED (see
According to this embodiment, furthermore, the on/off states of the transistors T2 are switched by changing the potential of the monitor line M. For this reason, there is no need to provide a period for changing the gate potential of a transistor T2 between the TFT characteristics detection period Ta and the light emission period Tc in order to switch the on/off state of the transistor T2. Furthermore, the length of the selection period Tb is equal for the monitored row and the unmonitored rows. Therefore, it is possible to ensure a sufficient length of a period for the detection of TFT characteristics and OLED characteristics without increasing the complexity of the configuration of the gate driver 40. This can increase the accuracy of detection of characteristics. As described above, an organic EL display device is provided which enables sufficient compensation for both the degradation of a drive transistor (a transistor T2) and the degradation of an organic EL element OLED while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor (the transistor T2) and the organic EL element OLED.
In this embodiment, furthermore, since the transistors T1 to T3 in the pixel circuits 11 each adopt an oxide TFT (specifically, a TFT having an In—Ga—Zn—O-based semiconductor layer), the advantage of ensuring a sufficient S/N ratio is achievable. This will be described hereinafter. A TFT having an In—Ga—Zn—O-based semiconductor layer is here referred to as an “In—Ga—Zn—O-TFT”. Regarding comparison between an In—Ga—Zn—O-TFT and an LTPS (Low Temperature Poly silicon)-TFT, the In—Ga—Zn—O-TFT has a significantly lower off-current than the LTPS-TFT. For instance, when the transistors T3 in the pixel circuits 11 each employ an LIPS-TFT, the off-current has a maximum of approximately 1 pA. In contrast, when the transistors T3 in the pixel circuits 11 each employ an In—Ga—Zn—O-TFT, the off-current has a maximum of approximately 10 fA. Accordingly, for example, the off-current for 1000 rows has a maximum of approximately 1 nA when LIPS-TFTs are employed, and has a maximum of approximately 10 pA when In—Ga—Zn—O-TFTs are employed. The detected current is approximately 10 to 100 nA regardless of which type is employed. Incidentally, the monitor lines M are connected to the pixel circuits 11 in the monitored row and are also connected to the pixel circuits 11 in the unmonitored rows. Accordingly, the S/N ratio for the monitor lines M depends on the total leakage current in the transistors T3 in the unmonitored rows. Specifically, the S/N ratio for the monitor lines M is expressed by “detected current/(leakage current X the number of unmonitored rows)”. Hence, for example, an organic EL display device having a “Landscape FHD” display unit 10 has an S/N ratio of approximately 10 when LIPS-TFTs are employed, and has an S/N ratio of approximately 1000 when In—Ga—Zn—O-TFTs are employed. Accordingly, this embodiment can ensure a sufficient S/N ratio for the detection of the current.
1.5 Modifications
Modifications of the first embodiment will be described hereinafter. In the following, only portions different from those of the first embodiment are described in detail while portions similar to those of the first embodiment are not described.
<1.5.1 First Modification>
In the first embodiment, the detection of the OLED characteristics for the monitored row involves the switching of the states (illumination state/non-illumination state) of the organic EL elements OLED in a time-controlled manner. For this reason, for example, like a period indicated by symbol 81 in
As described above, according to this modification, it is possible to use a period during which an organic EL element OLED is in the non-illumination state as a period for detecting TFT characteristics. This makes it possible to measure current more times within the TFT characteristics detection period. Accordingly, the S/N ratio of the detected current is increased, resulting in an improvement in the accuracy of detection of TFT characteristics.
<1.5.2 Second Modification>
In the first embodiment, as illustrated in
Incidentally, in the first embodiment, as illustrated in
<1.5.3 Third Modification>
In the first embodiment, the description is based on the assumption that one current measurement circuit 332 is provided for each column. However, the present invention is not limited thereto, and a configuration (the configuration of this modification) can also be employed in which a single current measurement circuit 332 is shared by a plurality of columns.
In this modification, as in the second modification (see
In the configuration described above, only one of K columns corresponding to K monitor lines M is used as a column (hereinafter referred to as the “characteristics detection target column”) for which TFT characteristics and OLED characteristics are detected within each frame. In the characteristics detection operation for the monitored row, the monitor lines M other than the characteristics detection target column are maintained in the high-impedance state. In the characteristics detection operation for the monitored row, furthermore, a normal data voltage (the voltage corresponding to the target brightness), rather than the potential Vmg described above, is applied to the data lines D for the columns other than the characteristics detection target column. During the light emission period Tc, the transistors T3 in the monitored row are in the on state, while the monitor lines M for the columns other than the characteristics detection target column are in the high-impedance state. This prevents the current from flowing through the monitor lines M for the columns other than the characteristics detection target column while allowing the current to flow through the organic EL elements OLED, and the organic EL elements OLED emit light in a manner similar to that in the normal operation. The characteristics detection operation described above is performed for the characteristics detection target column in the monitored row.
For example, in an organic EL display device including a “Landscape FHD” display unit 10 and having a driving frequency of 60 Hz, the time period required for the monitoring of one column (the detection of the TFT characteristics and the OLED characteristics) is 18 seconds (=1080/60). Here, in order for an offset value and a gain value corresponding to each pixel to be updated every 30 minutes (1800 seconds), it may be sufficient to adopt a configuration in which a single current measurement circuit 332 is provided for every 100 monitor lines M.
Therefore, according to this modification, there is provided an organic EL display device with a suppressed increase in circuit area which enables sufficient compensation for both the degradation of a drive transistor (a transistor T2) and the degradation of an organic EL element OLED while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor (the transistor T2) and the organic EL element OLED.
<1.5.4 Fourth Modification>
According to the first embodiment, if a short-term operation of the organic EL display device 1 is repeated, large differences in the number of times TFT characteristics and OLED characteristics are detected occur between an upper row on the display unit 10 and a lower row on the display unit 10. Accordingly, in an organic EL display device 2 according to this modification, as illustrated in
Therefore, according to this modification, a difference is prevented from occurring in the number of times TFT characteristics and OLED characteristics are detected between an upper row on the display unit 10 and a lower row on the display unit 10. This enables uniform compensation for the degradation of the drive transistors and the degradation of the organic EL elements OLED across the entire screen surface, and effectively prevents the occurrence of variations in brightness.
The row for which TFT characteristics and OLED characteristics are detected for the first time after power is turned on is not limited to a row subsequent to the row identified on the basis of the information stored in the monitored row storage unit 201, and may be a row at or near the row identified on the basis of the information stored in the monitored row storage unit 201. For example, there may be a row for which the characteristics detection operation is redundantly performed immediately before power is turned off and immediately after power is turned on.
Alternatively, information that identifies a row for which TFT characteristics and OLED characteristics were detected last may be stored, or information that identifies both a row and column for which TFT characteristics and OLED characteristics were detected last may be stored.
<1.5.5 Fifth Modification>
The process of the temperature sensor 60 implements a temperature detecting step, and the process of the temperature change compensation unit 202 implements a temperature change compensating step.
Therefore, according to this modification, a video signal sent from outside is corrected by using correction data that takes into account a temperature change. Accordingly, an organic EL display device is provided which enables simultaneous compensation for both the degradation of a drive transistor and the degradation of an organic EL element OLED regardless of a change in temperature.
<1.5.6 Sixth Modification>
<1.5.6.1 Overview>
In the first embodiment, for each frame, OLED characteristics are detected after TFT characteristics have been detected. However, the present invention is not limited thereto, and a configuration (the configuration of this modification) can also be employed in which TFT characteristics are detected after OLED characteristics have been detected.
<1.5.6.2 Characteristics Detection Operation for Monitored Row>
Next, a characteristics detection operation according to this modification will be described with reference to
During the first one horizontal scanning period (the selection period Tb) within the light emission period Tc, the scanning line G1(i) and the monitor control line G2(i) are set to the active state. Accordingly, the transistor T1 and the transistor T3 are brought into the on state. During this period, furthermore, a potential Vmg is given to the data line S(j), and a potential Vm_oled is given to the monitor line M(j). A potential Vm_TFT is given to the monitor line M(j) during the TFT characteristics detection period Ta described below.
Here, if a threshold voltage of the transistor T2 determined based on the offset values stored in the TFT offset memory 51a is represented by Vth(T2), the value of the potential Vmg, the value of the potential Vm_TFT, and the value of the potential Vm_oled are set so that Expressions (1) and (2) above hold. In addition, if a light emission threshold voltage of the organic EL element OLED determined based on the offset values stored in the OLED offset memory 51b is represented by Vth(oled), the value of the potential Vm_oled is set so that Expression (5) above holds. Furthermore, if a breakdown voltage of the transistor T2 is represented by Vbr(T2), the value of the potential Vm_oled is set so that Expression (6) above holds.
As described above, in the first one horizontal scanning period (the selection period Tb) within the light emission period Tc, the potential Vmg satisfying Expressions (1) and (2) above is given to the data line S(j), and the potential Vm_oled satisfying Expressions (2), (5), and (6) above is given to the monitor line M(j). From Expressions (2) and (6) above, the transistor T2 is set to the off state during this period. Further, from Expression (5) above, a current flows through the organic EL element OLED during this period.
In a period other than the selection period Tb within the light emission period Tc, the scanning line G1(i) is set to the inactive state. Accordingly, the transistor T1 is brought into the off state. On the other hand, the transistor T2 is maintained in the on state since the capacitor Cst is charged during the selection period Tb. The transistor T3 is also maintained in the on state since the monitor control line G2(i) is maintained in the active state. The potential Vm_oled satisfying Expressions (2), (5), and (6) above is given to the monitor line M(j).
Therefore, during the light emission period Tc, the current flows from the monitor line M(j) to the organic EL element OLED as indicated by the arrow denoted by symbol 73 in
During the TFT characteristics detection period Ta, the scanning line G1(i) is maintained in the inactive state and the monitor control line G2(i) is maintained in the active state. During this period, accordingly, the transistor T1 is maintained in the off state and the transistor T3 is maintained in the on state. In addition, as described above, the potential Vm_TFT is given to the monitor line M(j) during this period.
Here, the value of the potential Vm_TFT is set so that Expressions (1) and (3) above hold. Further, if a breakdown voltage of the organic EL element OLED is represented by Vbr(oled), the value of the potential Vm_TFT is set so that Expression (4) above holds.
As described above, during the TFT characteristics detection period Ta, the potential Vm_TFT satisfying Expressions (1), (3), and (4) above is given to the monitor line M(j). From Expression (1) above, the transistor T2 is set to the on state during this period. Further, from Expressions (3) and (4) above, no current flows through the organic EL element OLED during this period.
Therefore, during the TFT characteristics detection period Ta, the current flowing through the transistor T2 is output to the monitor line M(j) through the transistor T3 as indicated by the arrow denoted by symbol 72 in
In this modification, as in the first embodiment, two types of potentials (the first reference potential Vm_TFT_1 and the second reference potential Vm_TFT_2) are applied to the monitor line M(j) during the TFT characteristics detection period Ta. Accordingly, the TFT characteristics based on the first reference potential Vm_TFT_1 and the TFT characteristics based on the second reference potential Vm_TFT_2 are detected.
Incidentally, in this modification, the potential of the monitor line M changes from Vm_oled to Vm_TFT at the time of transition from the light emission period Tc to the TFT characteristics detection period Ta. In the first embodiment, the potential of the monitor line M changes from Vm_oled to Vm_TFT at the time of transition from the TFT characteristics detection period Ta to the light emission period Tc. In this regard, if the presence of the parasitic capacitance between the gate and source of the transistor T2 and so forth are taken into account, the gate potential of the transistor T2 also changes when the potential of the monitor line M changes. The influence of such a change in the gate potential of the transistor T2 is larger when the light emission period Tc precedes (this modification) than when the TFT characteristics detection period Ta precedes (the first embodiment). The reason for this is as follows. During the selection period Tb, the gate potential of the transistor T2 is equal to the potential Vmg satisfying Expression (1) above. However, when the light emission period Tc precedes, the gate potential of the transistor T2 decreases in accordance with a reduction in the potential of the monitor line M at the time of transition from the light emission period Tc to the TFT characteristics detection period Ta. Thus, depending on the level of reduction in the gate potential of the transistor T2, the transistor T2 may be brought into the off state during the TFT characteristics detection period Ta. Therefore, it is more preferable that, as in the first embodiment, the TFT characteristics detection period Ta precedes than that, as in this modification, the light emission period Tc precedes.
<1.5.6.3 Update of Correction Data in Correction Data Storage Unit>
Next, the update of correction data according to this modification will be described.
When the light emission period Tc is reached, OLED characteristics are detected (step S310). Through step S310, an offset value and a degradation correction coefficient for correcting a video signal are determined. Then, the offset value determined in step S310 is stored in the OLED offset memory 51b as a new offset value (step S320). Further, the degradation correction coefficient determined in step S310 is stored in the OLED gain memory 52b as a new degradation correction coefficient (step S330). Thereafter, when the TFT characteristics detection period Ta is reached, the TFT characteristics are detected with the first reference potential Vm_TFT 1 being given to the monitor line M (step S340). Through step S340, an offset value for correcting the video signal is determined. Then, the offset value determined in step S340 is stored in the TFT offset memory 51a as a new offset value (step S350). Thereafter, the TFT characteristics are detected with the second reference potential Vm_TFT 2 being given to the monitor line M (step S360). Through step S360, a gain value for correcting the video signal is determined. Then, the gain value determined in step S360 is stored in the TFT gain memory 52a as a new gain value (step S370). In the way described above, correction data corresponding to one pixel is updated.
In this modification, data (offset value, gain value, degradation correction coefficient) obtained on the basis of the detection results in step S310, step S340, and step S360 implements characteristics data.
<1.5.7 Seventh Modification>
In the first embodiment described above, the detection of TFT characteristics and the detection of OLED characteristics are performed for each frame. However, the present invention is not limited thereto. A configuration (the configuration of this modification) can also be employed in which the detection of only TFT characteristics is performed for each frame.
In this modification, the pixel circuits 11 are driven in a manner similar to that in the first embodiment. Accordingly, a current is supplied to the organic EL elements OLED for the monitored row on the basis of a constant voltage during the light emission period Tc. Further, the states (illumination state/non-illumination state) of the organic EL elements OLED are switched in a time-controlled manner so that the desired gradation display is achieved. Note that, in this modification, the current measurement circuit 332 does not measure the current flowing through the monitor line M(j) during the light emission period Tc.
Next, the update of correction data according to this modification will be described.
According to this modification, the organic EL display device 4 enables sufficient compensation for the degradation of a drive transistor (the transistor T2) while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor (the transistor T2).
<2. Second Embodiment>
<2.1 Configuration Etc.>
A second embodiment of the present invention will be described. In the first embodiment, the current flowing through the monitor line M is measured with a certain constant voltage being supplied to the monitor line M, so that TFT characteristics and OLED characteristics are detected. In this embodiment, in contrast, while the current flowing through the monitor line M is measured with a certain constant voltage being supplied to the monitor line M for the detection of TFT characteristics, the voltages across the positive electrodes of the organic EL elements OLED are measured with a certain constant current being supplied to the monitor line M for the detection of OLED characteristics.
The overall configuration is similar to that in the first embodiment, and is not described herein (see
2.2 Characteristics Detection Operation for Monitored Row
Next, a characteristics detection operation according to this embodiment will be described with reference to
In the first half (the selection period Tb) of the TFT characteristics detection period Ta, the scanning line G1(i) and the monitor control line G2(i) are set to the active state. Accordingly, the transistor T1 and the transistor T3 are brought into the on state. During this period, furthermore, a potential Vmg is given to the data line S(j), and a potential Vm_TFT is given to the monitor line M(j). A constant current Ioled is given to the monitor line M(j) during the light emission period Tc described below.
Here, if a threshold voltage of the transistor T2 determined based on the offset values stored in the TFT offset memory 51a is represented by Vth(T2) and the potential of the monitor line M(j) when the constant current Ioled is given to the monitor line M(j) is represented by Vm_oled(Ioled), the value of the potential Vmg, the value of the potential Vm_TFT, and the value of the current Ioled are set so that Expression (1) above and Expression (7) below hold.
Vmg<Vm_oled(Ioled)+Vth(T2) (7)
In addition, if a light emission threshold voltage of the organic EL element OLED determined based on the offset values stored in the OLED offset memory 51b is represented by Vth(oled), the value of the potential Vm_TFT is set so that Expression (3) above holds. Furthermore, if a breakdown voltage of the organic EL element OLED is represented by Vbr(oled), the value of the potential Vm_TFT is set so that Expression (4) above holds.
As described above, in the first half (the selection period Tb) of the TFT characteristics detection period Ta, the potential Vmg satisfying Expressions (1) and (7) above is given to the data line S(j), and the potential Vm_TFT satisfying Expressions (1), (3), and (4) above is given to the monitor line M(j). From Expression (1) above, the transistor T2 is set to the on state during this period. Further, from Expressions (3) and (4) above, no current flows through the organic EL element OLED during this period.
In the second half of the TFT characteristics detection period Ta, the scanning line G1(i) is set to the inactive state. Accordingly, the transistor T1 is brought into the off state. On the other hand, the transistor T2 is maintained in the on state since the capacitor Cst is charged during the selection period Tb. The transistor T3 is also maintained in the on state since the monitor control line G2(i) is maintained in the active state. The potential Vm_TFT satisfying Expressions (1), (3), and (4) above is given to the monitor line M(j).
Therefore, during the TFT characteristics detection period Ta, the current flowing through the transistor T2 is output to the monitor line M(j) through the transistor T3. Here, the monitor line M(j) is in connection with the current measurement circuit 332 during the TFT characteristics detection period Ta. Accordingly, the current (sink current) output to the monitor line M(j) is measured by the current measurement circuit 332. In the way described above, the TFT characteristics are detected.
In this embodiment, as in the first embodiment, two types of potentials (the first reference potential Vm_TFT_1 and the second reference potential Vm_TFT_2) are applied to the monitor line M(j) during the TFT characteristics detection period Ta. Accordingly, the TFT characteristics based on the first reference potential Vm_TFT_1 and the TFT characteristics based on the second reference potential Vm_TFT_2 are detected.
During the light emission period Tc, the scanning line G1(i) is maintained in the inactive state and the monitor control line G2(i) is maintained in the active state. During this period, accordingly, the transistor T1 is maintained in the off state and the transistor T3 is maintained in the on state. In addition, as described above, the constant current Ioled is given to the monitor line M(j) during this period.
Here, the value of the constant current Ioled is set so that Expression (7) above and Expression (8) below hold.
ELVSS+Vth(oled)<Vm_oled(Ioled) (8)
In addition, if a breakdown voltage of the transistor T2 is represented by Vbr(T2), the value of the constant current Ioled is set so that Expression (9) below holds.
Vm_oled(Ioled)<Vmg+Vbr(T2) (9)
As described above, during the light emission period Tc, the constant current Ioled that satisfies Expressions (7), (8), and (9) above is given to the monitor line M(j). From Expressions (7) and (9) above, the transistor T2 is set to the off state during this period. Further, from Expression (8) above, a current flows through the organic EL element OLED during this period.
Therefore, during the light emission period Tc, the constant current flows from the monitor line M(j) to the organic EL element OLED, and the organic EL element OLED emits light. Here, the monitor line M(j) is in connection with the voltage measurement circuit 334 during the light emission period Tc. In this state, the voltage across the positive electrode of the organic EL element OLED is measured by the voltage measurement circuit 334. In the way described above, the OLED characteristics are detected.
Incidentally, also in this embodiment, the length of the time period during which the organic EL element OLED emits light is adjusted so that the integral value of light emission current within a period of one frame becomes equal to the value corresponding to the desired gradation. In other words, the length of the time period during which the constant current Ioled is given to the organic EL element OLED is adjusted in accordance with the target brightness. Note that the value of the current may be changed during the light emission period Tc so that properties at a plurality of operating points (current-voltage characteristics) are measured so long as the integral value of light emission current within a period of one frame becomes equal to the value corresponding to the desired gradation.
The update of the correction data in the correction data storage unit 50 and the correction of a video signal are similar to those in the first embodiment described above, and are not described herein.
<2.3 Advantages>
As in the first embodiment, according to this embodiment, an organic EL display device is also provided which enables sufficient compensation for both the degradation of a drive transistor (a transistor T2) and the degradation of an organic EL element OLED while ensuring a sufficient amount of time for the detection of the characteristics of the drive transistor (the transistor T2) and the organic EL element OLED.
<2.4 Modifications>
As in the second modification of the first embodiment described above, a configuration can also be employed in which the monitor line M can be set to a high-impedance state. That is, a configuration may be employed in which, as illustrated in
In addition, portions at or near either ends of the monitor lines M may have a configuration illustrated in
<3. Others>
An organic EL display device to which the present invention is applicable is not limited to that including the pixel circuits 11 described by way of illustrative example in the respective embodiments and the respective modifications. Each of the pixel circuits may have any configuration other than the configurations described by way of illustrative example in the respective embodiments and the respective modifications so long as the pixel circuit at least includes an electro-optical element that is controlled with current (the organic EL element OLED), the transistors T1 to T3, and the capacitor Cst.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2013-134637 | Jun 2013 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2014/066402 | 6/20/2014 | WO | 00 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2014/208458 | 12/31/2014 | WO | A |
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| 20160155377 A1 | Jun 2016 | US |
