Patent Application
20240395204
The following disclosure relates to a display device employing a configuration in which variations in characteristics of transistors in a pixel circuit are compensated for by an internal compensation method, and a driving method for the display device.
In recent years, an organic EL display device including a pixel circuit including an organic EL element has been put into practical use. The organic EL element is also called an organic light-emitting diode (OLED), and is a self-luminous display element that emits light with luminance corresponding to a current flowing therethrough. Since the organic EL element is a self-luminous display element as described above, the organic EL display device can easily be made thinner, have lower power consumption, and have higher luminance as compared with a liquid crystal display device that requires a backlight, a color filter, and the like. Therefore, in recent years, organic EL display devices have been actively developed.
Regarding a pixel circuit of an organic EL display device, a thin film transistor (TFT) is typically employed as a drive transistor for controlling supply of a current to an organic EL element. However, characteristics of thin film transistors are likely to vary. Specifically, the threshold voltage tends to vary. When a variation in threshold voltage occurs in the drive transistor provided in a display unit, a variation in luminance occurs, and thus display quality is deteriorated. Therefore, various types of processing for compensating for variations in threshold voltage (compensation processing) have been proposed.
As methods of the compensation processing, an internal compensation method of performing the compensation processing by providing, in a pixel circuit, a capacitor for holding information of a threshold voltage of a drive transistor, and an external compensation method of performing the compensation processing by, for example, measuring a magnitude of a current flowing through the drive transistor under a predetermined condition by a circuit provided outside the pixel circuit and correcting a video signal on the basis of a measurement result are known.
As a pixel circuit of an organic EL display device adopting the internal compensation method for compensation processing, for example, as illustrated in
The operation of the pixel circuit 90 illustrated in
In a period P92, the light emission control signal EM(n) changes from the low level to the high level. As a result, the power supply control transistor T95 and the light emission control transistor T96 are turned off. As a result, the supply of the current to the organic EL element 99 is cut off, and the organic EL element 99 is turned off. Furthermore, in the period P92, the scanning signal GL(n−1) changes from the high level to the low level, so that the first initialization transistor T91 goes into an on state. As a result, as indicated by an arrow denoted by reference character 92 in
In a period P93, the scanning signal GL(n−1) changes from the low level to the high level. As a result, the first initialization transistor T91 is turned off. Furthermore, in the period P93, the scanning signal GL(n) changes from the high level to the low level. As a result, the threshold voltage compensation transistor T92, the write control transistor T93, and the second initialization transistor T97 are turned on. When the threshold voltage compensation transistor T92 and the write control transistor T93 are turned on, the data signal DL(m) is provided to the drive current control node NG via the write control transistor T93, the drive transistor T94, and the threshold voltage compensation transistor T92 as indicated by an arrow denoted by reference character 93 in
In a period P94, the scanning signal GL(n) changes from the low level to the high level. As a result, the threshold voltage compensation transistor T92, the write control transistor T93, and the second initialization transistor T97 are turned off. Furthermore, in the period P94, the light emission control signal EM(n) changes from the high level to the low level. As a result, the power supply control transistor T95 and the light emission control transistor T96 are turned on, and a drive current flows as indicated by an arrow denoted by reference character 91 in
An image is displayed on the display unit by the operation of each pixel circuit 90 as described above, but when the organic EL display device is used in an environment where external light is strong such as outdoors, the degree of brightness is relatively lower in a display screen than in the surroundings, and visibility is deteriorated.
Japanese Laid-Open Patent Publication No. 2008-176115 discloses an organic EL display device that calculates an adjustment value of a light emission period for each pixel on the basis of light emission luminance information and external light illuminance information, and controls operation of a scan circuit on the basis of the adjustment value to adjust display luminance. Furthermore, Japanese Laid-Open Patent Publication No. 2005-92006 discloses an organic EL display device including a pixel circuit having a configuration in which a light detection diode is provided in parallel with a drive transistor so that the light emission intensity of an organic EL element is autonomously adjusted depending on the intensity of external light.
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2008-176115
[Patent Document 2] Japanese Laid-Open Patent Publication No. 2005-92006
However, according to the method disclosed in Japanese Laid-Open Patent Publication No. 2008-176115, it is necessary to detect the intensity of external light and adjust the light emission period of the organic EL element depending on the detected intensity. Therefore, it is necessary to provide a control system or a control chip outside a panel, and the cost increases. Furthermore, according to the method disclosed in Japanese Laid-Open Patent Publication No. 2005-92006, since the light detection diode is connected in parallel with the drive transistor and in series with the organic EL element, there is a concern that a desired current does not flow through the organic EL element. That is, there is a concern about degradation of display quality.
Therefore, the following disclosure relates to a display device (for example, an organic EL display device) using a display element driven by a current, and an object thereof is to improve visibility in an environment where external light is strong while suppressing deterioration in display quality and an increase in cost.
A display device according to some embodiments of the present disclosure is a display device including a plurality of pixel circuits, each of the pixel circuits including a display element configured to emit light with luminance depending on an amount of a drive current to be supplied, the display device including:
A driving method (for a display device) according to some embodiments of the present disclosure is a driving method for a display device including a plurality of pixel circuits, each of the plurality of pixel circuits including a display element configured to emit light with luminance depending on an amount of a drive current to be supplied, the display device including:
According to some embodiments of the present disclosure, a display device is provided with an adjustment circuit that adjusts an amount of a drive current supplied to a display element in a pixel circuit. The adjustment circuit includes a light receiving circuit that is connected to a light emission intensity adjustment node and generates a photocurrent depending on the intensity of light, and a light emission intensity adjustment node initialization circuit that initializes the light emission intensity adjustment node. Furthermore, the display device is provided with an adjustment capacitor including one end connected to a drive current control node (a node connected to a control terminal of a drive transistor) and the other end connected to the light emission intensity adjustment node. With the above configuration, when the light emission intensity adjustment node is initialized after a potential of the light emission intensity adjustment node is changed depending on the intensity of external light, a potential of the drive current control node changes depending on a change in the potential of the light emission intensity adjustment node due to the initialization. That is, the potential of the drive current control node changes depending on the intensity of the external light. As a result, a larger amount of drive current than the original amount is supplied to the display element depending on the intensity of the external light. Here, since a light receiving element in the adjustment circuit is not directly connected to the drive transistor or the display element, an unintended current does not flow through the display element during a light emission period of the display element. Furthermore, since the potential of the drive current control node is controlled depending on the intensity of the external light, it is not necessary to provide a control system or a control chip outside a panel, for example. From the above, with respect to the display device (display device including a pixel circuit including a display element that emits light with luminance depending on an amount of drive current to be supplied), visibility in an environment where external light is strong is improved while degradation in display quality and an increase in cost are suppressed.
illustrating
Hereinafter, embodiments will be described with reference to the accompanying drawings. Regarding second to fourth embodiments, points different from a first embodiment will be mainly described, and description of points similar to the first embodiment will be omitted as appropriate. Note that, in the following description, it is assumed that i and j are integers of 2 or more, n is an integer of 1 or more and i or less, and m is an integer of 1 or more and j or less.
In the display unit 200, (i+2) scanning signal lines GL(0) to GL(i+1), i light emission control lines EM(1) to EM(i), and j data signal lines DL(1) to DL(j) are disposed. Note that illustration thereof is omitted regarding the inside of the display unit 200 in
Moreover, in the display unit 200, power supply lines (not illustrated) common to the pixel circuits 20 are disposed. More specifically, a power supply line that supplies a high-level power supply potential ELVDD for driving the organic EL element (hereinafter, it is referred to as a “high-level power supply line”), a power supply line that supplies a low-level power supply potential ELVSS for driving the organic EL element (hereinafter, it is referred to as a “low-level power supply line”), and a power supply line that supplies an initialization potential Vini (hereinafter, it is referred to as an “initialization power supply line”) are disposed. The initialization potential Vini is a potential lower than the high-level power supply potential ELVDD. The high-level power supply potential ELVDD, the low-level power supply potential ELVSS, and the initialization potential Vini are supplied from a power supply circuit (not illustrated). Note that the high-level power supply potential ELVDD corresponds to a first power supply potential, and the low-level power supply potential ELVSS corresponds to a second power supply potential. Furthermore, the high-level power supply line corresponds to a first power supply line, and the low-level power supply line corresponds to a second power supply line.
Hereinafter, the operation of each component illustrated in
The gate driver 300 is connected to the scanning signal lines GL(0) to GL(i+1). The gate driver 300 applies scanning signals to the scanning signal lines GL(0) to GL(i+1) based on the gate control signal GCTL outputted from the display control circuit 100. That is, the gate driver 300 selectively drives the scanning signal lines GL(0) to GL(i+1) sequentially.
The emission driver 400 is connected to the light emission control lines EM(1) to EM(i). The emission driver 400 applies light emission control signals to the light emission control lines EM(1) to EM(i) based on the emission driver control signal EMCTL outputted from the display control circuit 100.
The source driver 500 includes a j-bit shift register, a sampling circuit, a latch circuit, j D/A converters, and the like (not illustrated). The shift register includes j registers connected in cascade. The shift register sequentially transfers the pulse of the source start pulse signal supplied to the first-stage register from an input terminal to an output terminal based on the source clock signal. The sampling pulse is outputted from each stage of the shift register according to the transfer of the pulse. Based on the sampling pulse, the sampling circuit stores the digital video signals DV. The latch circuit captures and holds the digital video signals DV for one row stored in the sampling circuit according to the latch strobe signal. The D/A converter is provided so as to correspond to each of the data signal lines DL(1) to DL(j). The D/A converter converts the digital video signal DV held in the latch circuit into an analog voltage. The converted analog voltages are simultaneously applied to all the data signal lines DL(1) to DL(j) as data signals.
As described above, the data signals are applied to the data signal lines DL(1) to DL(j), the scanning signals are applied to the scanning signal lines GL(0) to GL(i+1), and the light emission control signals are applied to the light emission control lines EM(1) to EM(i), whereby an image based on the input image signal DIN is displayed on the display unit 200.
Next, configurations of the pixel circuit 20 and its peripheral circuits in the present embodiment will be described.
The pixel circuit 20 illustrated in
Regarding the first initialization transistor T1, a control terminal is connected to the scanning signal line GL(n−1), a first conduction terminal is connected to the drive current control node NG, and a second conduction terminal is connected to the initialization power supply line. Regarding the threshold voltage compensation transistor T2, a control terminal is connected to the scanning signal line GL(n), a first conduction terminal is connected to a second conduction terminal of the drive transistor T4 and a first conduction terminal of the light emission control transistor T6, and a second conduction terminal is connected to the drive current control node NG. Regarding the write control transistor T3, a control terminal is connected to the scanning signal line GL(n), a first conduction terminal is connected to the data signal line DL(m), and a second conduction terminal is connected to a first conduction terminal of the drive transistor T4 and a second conduction terminal of the power supply control transistor T5. Regarding the drive transistor T4, a control terminal is connected to the drive current control node NG, a first conduction terminal is connected to the second conduction terminal of the write control transistor T3 and the second conduction terminal of the power supply control transistor T5, and a second conduction terminal is connected to the first conduction terminal of the threshold voltage compensation transistor T2 and the first conduction terminal of the light emission control transistor T6.
Regarding the power supply control transistor T5, a control terminal is connected to the light emission control line EM(n), a first conduction terminal is connected to the high-level power supply line, and a second conduction terminal is connected to the second conduction terminal of the write control transistor T3 and the first conduction terminal of the drive transistor T4. Regarding the light emission control transistor T6, a control terminal is connected to the light emission control line EM(n), a first conduction terminal is connected to the first conduction terminal of the threshold voltage compensation transistor T2 and the second conduction terminal of the drive transistor T4, and a second conduction terminal is connected to a first conduction terminal of the second initialization transistor T7 and an anode terminal (first terminal) of the organic EL element 21. Regarding the second initialization transistor T7, a control terminal is connected to the scanning signal line GL(n), a first conduction terminal is connected to the second conduction terminal of the light emission control transistor T6 and the anode terminal of the organic EL element 21, and a second conduction terminal is connected to the initialization power supply line. As for the holding capacitor Cst, a first electrode is connected to the drive current control node NG, and a second electrode is connected to the high-level power supply line. Note that typically, a capacitance value of the holding capacitor Cst is larger than a capacitance value of the adjustment capacitor Cp. Regarding the organic EL element 21, the anode terminal is connected to the second conduction terminal of the light emission control transistor T6 and the first conduction terminal of the second initialization transistor T7, and a cathode terminal (second terminal) is connected to the low-level power supply line.
Regarding the photocurrent control transistor T8, a control terminal is connected to the scanning signal line GL(n), a first conduction terminal is connected to the high-level power supply line, and a second conduction terminal is connected to a cathode terminal of the photodiode 220. Regarding the third initialization transistor T9, a control terminal is connected to the scanning signal line GL(n+1), a first conduction terminal is connected to the light emission intensity adjustment node NP, and a second conduction terminal is connected to the initialization power supply line. Regarding the photodiode 220, an anode terminal is connected to the light emission intensity adjustment node NP and the cathode terminal is connected to the second conduction terminal of the photocurrent control transistor T8. As above, the circuit between the high-level power supply line and the light emission intensity adjustment node NP is configured to generate a photocurrent depending on the intensity of light incident on the photodiode 220 during a period in which the photocurrent control transistor T8 is in an on state.
Note that a drive current control node initialization transistor is realized by the first initialization transistor T1, a display initialization transistor is realized by the second initialization transistor T7, and a light intensity adjustment node initialization transistor is realized by the third initialization transistor T9. Furthermore, a light receiving circuit is realized by the photocurrent control transistor T8, the photodiode 220, and wirings connected thereto, and a light emission intensity adjustment node initialization circuit is realized by the third initialization transistor T9 and wirings connected thereto.
The operation of the pixel circuit 20 and its peripheral circuits illustrated in
In the period P01, the scanning signal GL(n−1), the scanning signal GL(n), and the scanning signal GL(n+1) are at a high level, the light emission control signal EM(n) is at a low level, a potential of the drive current control node NG is at a level depending on writing of the data signal DL(m) in a previous frame, and a potential of the light emission intensity adjustment node NP is a potential in an initialized state. In this period, the power supply control transistor T5 and the light emission control transistor T6 are in an on state, and a drive current flows as indicated by an arrow denoted by reference character 61 in
In a period P02, the light emission control signal EM(n) changes from the low level to the high level. Therefore, the power supply control transistor T5 and the light emission control transistor T6 are turned off. As a result, the supply of the current to the organic EL element 21 is cut off, and the organic EL element 21 is turned off. Furthermore, in the period P02, the scanning signal GL(n−1) changes from the high level to the low level, so that the first initialization transistor T1 goes into an on state. As a result, as indicated by an arrow denoted by reference character 62 in
In the period P03, the scanning signal GL(n−1) changes from the low level to the high level. As a result, the first initialization transistor T1 is turned off. Furthermore, in the period P03, the scanning signal GL(n) changes from the high level to the low level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned on. When the threshold voltage compensation transistor T2 and the write control transistor T3 are turned on, the data signal DL(m) is provided to the drive current control node NG via the write control transistor T3, the drive transistor T4, and the threshold voltage compensation transistor T2, as indicated by an arrow denoted by reference character 63 in
In a period P04, the scanning signal GL(n) changes from the low level to the high level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned off. Furthermore, in the period P04, the scanning signal GL(n+1) changes from the high level to the low level. As a result, the third initialization transistor T9 is turned on, and the potential of the light emission intensity adjustment node NP is initialized based on the initialization potential Vini as indicated by an arrow denoted by reference character 66 in
In the period P05, the scanning signal GL(n+1) changes from the low level to the high level. As a result, the third initialization transistor T9 is turned off. Furthermore, in the period P05, the light emission control signal EM(n) changes from the high level to the low level. As a result, the power supply control transistor T5 and the light emission control transistor T6 are turned on, and a drive current flows as indicated by an arrow denoted by reference character 61 in
By each pixel circuit 20 in the display unit 200 operating as described above, an image based on the input image signal DIN is displayed on the display unit 200. Furthermore, in the period P03, as the intensity of external light is higher, the potential of the light emission intensity adjustment node NP greatly increases. Then, the potential of the drive current control node NG decreases in the period P04 depending on the degree of increase in the potential of the light emission intensity adjustment node NP in the period P03. That is, as the intensity of the external light is higher, a larger amount of drive current than the original amount is supplied to the organic EL element 21. In this way, visibility under external light is improved.
Note that the sizes of the photodiode 220 and the adjustment capacitor Cp need to be appropriately designed so that good visibility can be obtained by suitably decreasing the potential of the light emission intensity adjustment node NP in the period P04 depending on the intensity of the external light.
In the present embodiment, the scanning signal GL(n−1), the scanning signal GL(n), and the scanning signal GL(n+1) are sequentially set to the low level for each predetermined period in a period in which the light emission control signal EM(n) is maintained at the high level. In other words, during the period in which the emission driver 400 maintains the nth light emission control line in the non-selected state, the gate driver 300 sequentially brings the (n−1)th scanning signal line, the nth scanning signal line, and the (n+1)th scanning signal line into the selected state for each predetermined period. The gate control signal GCTL is transmitted from the display control circuit 100 to the gate driver 300 and the emission driver control signal EMCTL is transmitted from the display control circuit 100 to the emission driver 400 such that above operation is performed.
Note that, in the present embodiment, a step of stopping supply of the drive current is realized by the operation at the time of transition from the period P01 to the period P02, a step of charging the drive current control node and generating the photocurrent depending on intensity of light is realized by the operation in the period P03, a step of initializing the light emission intensity adjustment node is realized by the operation in the period P04, and a step of resuming the supply of the drive current is realized by the operation at the time of transition from the period P04 to the period P05.
According to the present embodiment, the adjustment circuit 22 that adjusts the amount of the drive current supplied to the organic EL element 21 in the pixel circuit 20 is provided. When the drive current control node NG in the pixel circuit 20 is charged on the basis of the data signal, the potential of the light emission intensity adjustment node NP in the adjustment circuit 22 increases depending on the intensity of the external light. Thereafter, before the light emission period starts, by initializing the light emission intensity adjustment node NP, the potential of the drive current control node NG decreases as the potential of the light emission intensity adjustment node NP decreases. As a result, a larger amount of drive current than the original amount is supplied to the organic EL element 21 depending on the intensity of the external light, and visibility under the external light is improved.
Meanwhile, the photodiode 220 in the adjustment circuit 22 is not directly connected to the drive transistor T4 and the organic EL element 21. Therefore, unlike the organic EL display device disclosed in Japanese Laid-Open Patent Publication No. 2005-92006, an unintended current does not flow through the organic EL element 21 during the light emission period. Furthermore, the photodiode 220 generates a photocurrent only during a period in which the organic EL element 21 corresponding thereto is in a turn-off state. Therefore, the intensity of the external light is detected without being affected by the light emission of the organic EL element 21. As a result, the amount of the drive current can be accurately adjusted. Moreover, since the adjustment circuit 22 is provided for each pixel circuit 20, the amount of the drive current can be adjusted with high accuracy. From the above, the visibility under the external light is effectively improved without causing deterioration in display quality.
Furthermore, according to the present embodiment, since the potential of the drive current control node NG is controlled depending on the intensity of the external light, it is not necessary to perform calculation processing for adjusting the length of the light emission period and the data voltage (value of the data signal) outside the panel, for example. That is, unlike the organic EL display device disclosed in Japanese Laid-Open Patent Publication No. 2008-176115, it is not necessary to provide a control system or a control chip outside the panel. Moreover, in a case where the method of changing the data voltage depending on the intensity of the external light is adopted, a special system or chip capable of changing the data voltage in a wide range is required. However, according to the present embodiment, since it is not necessary to change the data voltage, the special system or chip is unnecessary.
As above, according to the present embodiment, with respect to the organic EL display device, the visibility in an environment where external light is strong is improved while a decrease in display quality and an increase in cost are suppressed.
Regarding the configuration of the adjustment circuit 22, in the first embodiment, the photodiode 220 is provided between the photocurrent control transistor T8 and the light emission intensity adjustment node NP. However, it is not limited thereto, and the photodiode 220 may be provided between the high-level power supply line and the photocurrent control transistor T8 as illustrated in
In the first embodiment, all the transistors in the pixel circuit 20 and all the transistors in the adjustment circuit 22 are P-channel transistors (typically, LTPS-TFTs). On the other hand, in the present embodiment, the transistors in the pixel circuit 20 include a P-channel transistor and an N-channel transistor, and all the transistors in the adjustment circuit 22 are N-channel transistors. The P-channel transistor is typically an LTPS-TFT, and the N-channel transistor is typically an IGZO-TFT (thin film transistor having a channel layer formed by oxide semiconductor including indium, gallium, zinc, and oxygen).
The overall configuration is substantially similar to that of the first embodiment. However, in the present embodiment, the display unit 200 is provided with, as scanning signal lines, first scanning signal lines that control a state of the P-channel transistor in the pixel circuit 20, and second scanning signal lines that control a state of the N-channel transistor in the pixel circuit 20 and the N-channel transistor in the adjustment circuit 22. Specifically, in the display unit 200, (i+2) first scanning signal lines GLa(0) to GLa(i+1) and i second scanning signal lines GLb(1) to GLb(i) are disposed as scanning signal lines (see
The operation of the pixel circuit 20 and its peripheral circuits illustrated in
In the period P11, the first scanning signal GLa(n−1), the first scanning signal GLa(n), and the first scanning signal GLa(n+1) are at a low level, the second scanning signal GLb(n) is at a high level, the light emission control signal EM(n) is at a low level, a potential of the drive current control node NG is at a level depending on the writing of the data signal DL(m) in a previous frame, and a potential of the light emission intensity adjustment node NP is a potential in an initialized state. In this period, the power supply control transistor T5 and the light emission control transistor T6 are in an on state, and the organic EL element 21 emits light depending on the magnitude of the drive current.
In a period P12, the light emission control signal EM(n) changes from the low level to a high level. Therefore, the power supply control transistor T5 and the light emission control transistor T6 are turned off. As a result, the supply of the current to the organic EL element 21 is cut off, and the organic EL element 21 is turned off. Furthermore, in the period P12, the first scanning signal GLa(n−1) changes from the low level to the high level, so that the first initialization transistor T1 goes into an on state. As a result, the potential of the drive current control node NG is initialized based on the initialization potential Vini.
In the period P13, the first scanning signal GLa(n−1) changes from the high level to the low level. As a result, the first initialization transistor T1 is turned off. Furthermore, in the period P13, the first scanning signal GLa(n) changes from the low level to the high level, and the second scanning signal GLb(n) changes from the high level to the low level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned on. When the threshold voltage compensation transistor T2 and the write control transistor T3 are turned on, the data signal DL(m) is provided to the drive current control node NG via the write control transistor T3, the drive transistor T4, and the threshold voltage compensation transistor T2. Furthermore, when the second initialization transistor T7 is turned on, the anode potential of the organic EL element 21 is initialized based on the initialization potential Vini. Furthermore, when the photocurrent control transistor T8 is turned on, a current (photocurrent) depending on the intensity of light (that is, external light) incident on the photodiode 220 flows from the high-level power supply line to the light emission intensity adjustment node NP via the photocurrent control transistor T8 and the photodiode 220. As a result, the light emission intensity adjustment node NP is charged.
In a period P14, the first scanning signal GLa(n) changes from the high level to the low level, and the second scanning signal GLb(n) changes from the low level to the high level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned off. Furthermore, in the period P14, the first scanning signal GLa(n+1) changes from the low level to the high level. As a result, the third initialization transistor T9 is turned on, and the potential of the light emission intensity adjustment node NP is initialized based on the initialization potential Vini. At this time, as in the first embodiment, the potential of the light emission intensity adjustment node NP decreases. As a result, the potential of the drive current control node NG also decreases via the adjustment capacitor Cp.
In the period P15, the first scanning signal GLa(n+1) changes from the high level to the low level. As a result, the third initialization transistor T9 is turned off. Furthermore, in the period P15, the light emission control signal EM(n) changes from the high level to the low level. As a result, the power supply control transistor T5 and the light emission control transistor T6 are turned on, and the organic EL element 21 emits light depending on the magnitude of the drive current.
In the present embodiment, the first scanning signal GLa(n−1), the first scanning signal GLa(n), and the first scanning signal GLa(n+1) are sequentially set to the high level for each predetermined period in a period in which the light emission control signal EM(n) is maintained at the high level. In other words, during the period in which the emission driver 400 maintains the nth light emission control line in the non-selected state, the gate driver 300 sequentially brings the (n−1)th first scanning signal line, the nth first scanning signal line, and the (n+1)th first scanning signal line into the selected state for each predetermined period. The gate control signal GCTL is transmitted from the display control circuit 100 to the gate driver 300 and the emission driver control signal EMCTL is transmitted from the display control circuit 100 to the emission driver 400 such that above operation is performed. Furthermore, the second scanning signal GLb(n) is at the low level during a period in which the first scanning signal GLa(n) is at the high level. In other words, the gate driver 300 puts the nth second scanning signal line into the selected state during the period in which the nth first scanning signal line is in the selected state.
According to the present embodiment, with respect to the organic EL display device employing the pixel circuit 20 including the N-channel transistor and the P-channel transistor, similarly to the first embodiment, visibility in an environment where external light is strong is improved while degradation in display quality and an increase in cost are suppressed. Furthermore, since charge leakage is suppressed by adopting the IGZO-TFT as the N-channel transistor, it is possible to perform low-frequency driving. As a result, the power consumption is remarkably reduced.
In the first embodiment, all the transistors in the pixel circuit 20 and all the transistors in the adjustment circuit 22 are P-channel transistors. In the second embodiment, the transistors in the pixel circuit 20 include a P-channel transistor and an N-channel transistor, and all the transistors in the adjustment circuit 22 are N-channel transistors. On the other hand, in the present embodiment, all the transistors in the pixel circuit 20 and all the transistors in the adjustment circuit 22 are N-channel transistors (typically, IGZO-TFTs).
The overall configuration is substantially similar to that of the first embodiment. However, in the present embodiment, a first initialization potential Vini1 and a second initialization potential Vini2 are used as the initialization potentials. Hereinafter, a power supply line that supplies the first initialization potential Vini1 is referred to as a “first initialization power supply line”, and a power supply line that supplies the second initialization potential Vini2 is referred to as a “second initialization power supply line”. Typically, the first initialization potential Vini1 is a potential higher than the high-level power supply potential ELVDD, and the second initialization potential Vini2 is a potential lower than the low-level power supply potential ELVSS.
The second conduction terminal of the first initialization transistor connected to the first initialization power supply line. The second conduction terminal of the second initialization transistor T7 is connected to the second initialization power supply line. The second conduction terminal of the third initialization transistor T9 is connected to the first initialization power supply line. As for the photodiode 220, the anode terminal is connected to the second conduction terminal of the photocurrent control transistor T8 and the cathode terminal is connected to the light emission intensity adjustment node NP. Note that, as in the modification of the first embodiment, the photodiode 220 may be provided between the high-level power supply line and the photocurrent control transistor T8.
The operation of the pixel circuit 20 and its peripheral circuits illustrated in
In the period P21, the scanning signal GL(n−1), the scanning signal GL(n), and the scanning signal GL(n+1) are at a low level, the light emission control signal EM(n) is at a high level, a potential of the drive current control node NG is at a level depending on the writing of the data signal DL(m) in a previous frame, and a potential of the light emission intensity adjustment node NP is a potential in a state initialized based on the first initialization potential Vini1. In this period, the power supply control transistor T5 and the light emission control transistor T6 are in an on state, and a drive current flows as indicated by an arrow denoted by reference character 71 in
In a period P22, the light emission control signal EM(n) changes from the high level to the low level. Therefore, the power supply control transistor T5 and the light emission control transistor T6 are turned off. As a result, the supply of the current to the organic EL element 21 is cut off, and the organic EL element 21 is turned off. Furthermore, in the period P22, the scanning signal GL(n−1) changes from the low level to a high level, so that the first initialization transistor T1 goes into an on state. As a result, as indicated by an arrow denoted by reference character 72 in
In the period P23, the scanning signal GL(n−1) changes from the high level to the low level. As a result, the first initialization transistor T1 is turned off. Furthermore, in the period P23, the scanning signal GL(n) changes from the low level to the high level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned on. When the threshold voltage compensation transistor T2 and the write control transistor T3 are turned on, the data signal DL(m) is provided to the drive current control node NG via the write control transistor T3, the drive transistor T4, and the threshold voltage compensation transistor T2, as indicated by an arrow denoted by reference character 73 in
In a period P24, the scanning signal GL(n) changes from the high level to the low level. As a result, the threshold voltage compensation transistor T2, the write control transistor T3, the second initialization transistor T7, and the photocurrent control transistor T8 are turned off. Furthermore, in the period P24, the scanning signal GL(n+1) changes from the low level to the high level. As a result, the third initialization transistor T9 is turned on, and the potential of the light emission intensity adjustment node NP is initialized based on the first initialization potential Vini1 as indicated by an arrow denoted by reference character 76 in
In the period P25, the scanning signal GL(n+1) changes from the high level to the low level. As a result, the third initialization transistor T9 is turned off. Furthermore, in the period P25, the light emission control signal EM(n) changes from the low level to the high level. As a result, the power supply control transistor T5 and the light emission control transistor T6 are turned on, and a drive current flows as indicated by an arrow denoted by reference character 71 in
In the present embodiment, in the period P23, as the intensity of the external light is higher, the potential of the light emission intensity adjustment node NP greatly decreases. Then, the potential of the drive current control node NG increases in the period P24 depending on the degree of decrease in the potential of the light emission intensity adjustment node NP in the period P23. Here, the drive transistor T4 is an N-channel transistor. Therefore, as the intensity of the external light is higher, a larger amount of drive current than the original amount is supplied to the organic EL element 21. In this way, visibility under external light is improved. Furthermore, similarly to the first embodiment, no deterioration in display quality is caused and there is no need to provide a special system or chip. From the above, according to the present embodiment, with respect to the organic EL display device in which the transistors in the pixel circuit 20 include only the N-channel transistors, the visibility under the environment where the external light is strong is improved while the deterioration in display quality and the increase in cost are suppressed. Furthermore, similarly to the second embodiment, by adopting the IGZO-TFT as the N-channel transistor, low-frequency driving can be performed, and power consumption is remarkably reduced.
In the first to third embodiments, the adjustment circuit 22 and the adjustment capacitor Cp are provided for each pixel circuit 20. On the other hand, in the present embodiment, the adjustment capacitor Cp is provided for each pixel circuit 20, but the adjustment circuit 22 is provided for every three pixel circuits 20. The overall configuration is similar to that of the first embodiment.
The adjustment circuit 22 is provided for every three pixel circuits 20 as described above, and the second electrodes of the three adjustment capacitors Cp (adjustment capacitor Cpr, adjustment capacitor Cpg, and adjustment capacitor Cpb) corresponding to the three pixel circuits 20 are connected to the same light emission intensity adjustment node NP. Furthermore, the first electrode of each of the three adjustment capacitors Cp (adjustment capacitor Cpr, adjustment capacitor Cpg, and adjustment capacitor Cpb) is connected to the drive current control node NG included in the corresponding pixel circuit 20.
Note that, in the present embodiment, all the transistors in the pixel circuit 20 are P-channel transistors, but it is not limited thereto. Similarly to the second embodiment, a P-channel transistor and an N-channel transistor may be included in the transistors in the pixel circuit 20 (see
Each pixel circuit 20 (red pixel circuit 20R, green pixel circuit 20G, and blue pixel circuit 20B) and its peripheral circuits operate in the same manner as in the first embodiment (see
Note that the sizes of the photodiode 220 and the three adjustment capacitors Cp (adjustment capacitor Cpr, adjustment capacitor Cpg, and adjustment capacitor Cpb) need to be appropriately designed so that the potentials of the drive current control node NGr, the drive current control node NGg, and the drive current control node NGb are suitably controlled depending on the intensity of external light, thereby obtaining good visibility.
According to the present embodiment, similarly to the first embodiment, regarding the organic EL display device, the visibility in an environment where external light is strong is improved while suppressing a decrease in display quality and an increase in cost. Furthermore, since the adjustment circuit 22 including the photodiode 220, the photocurrent control transistor T8, and third the initialization transistor T9 is provided for every three pixel circuits 20, the degree of freedom in the layout of the pixel circuit 20 is higher than that in the first embodiment.
In the fourth embodiment, the adjustment circuit 22 is provided for every three pixel circuits 20 (red pixel circuit 20R, green pixel circuit 20G, and blue pixel circuit 20B) constituting one pixel. However, it is not limited thereto, and the adjustment circuit 22 may be provided for every plural (for example, three) pixel circuits 20 for the same color. This will be described below with reference to
In
Note that the configuration may be such that the adjustment circuit 22 is provided for every k pixel circuits 20 for the same color, where k is an integer of 2 or more.
Although the organic EL display device has been described as an example in each of the above embodiments and modifications, the device is not limited thereto. The above disclosure can also be applied to an inorganic EL display device, a QLED display device, and the like as long as the display device includes a display element driven by a current.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2021/040727 | 11/5/2021 | WO |
