Patent Application
20130009938
This application claims priority to and the benefit of Korean Patent Application No. 10-2011-0067027 filed in the Korean Intellectual Property Office on Jul. 6, 2011, the entire contents of which are incorporated by reference herein.
(a) Technical Field
The present disclosure relates to a display device and a driving method thereof, and, more particularly, to a display device driven by a time division pulse width modulation method and a driving method thereof.
(b) Discussion of the Related Art
Typically, a display device includes a display panel including a plurality of pixels and display signal lines, a gate driver that applies a gate signal to a gate line among the display signal lines, and a data driver that applies a data voltage corresponding to an input image signal to a data line among the display signal lines. Each pixel may include a switching element connected to the display signal line and a pixel electrode connected thereto. The pixel electrode is applied with a data voltage according to the gate signal through the switching element.
For color display, each pixel PX uniquely represents one of primary colors such as red (R), green G) and blue (B), or each pixel PX sequentially represents the primary colors in turn.
When the gate driver applies a gate-on voltage to the gate line, the switching element connected to the gate line is turned on and the data voltage applied to the data line is applied to a corresponding pixel through the turned-on switching element. In this way, if the gate-on voltage is sequentially applied to all gate lines and all pixels receive the data voltage, an image of one frame is displayed. The input image signal corresponding to the image to be displayed by each pixel has information for luminance during one frame, that is, a gray level. When two grey levels are applied for the image to be displayed by the pixel, to display the image of several grays, the display device may be driven using time division pulse width modulation (PWM).
However, as a size of the display device is increased, the number of gate lines is increased and the time to display the image of one frame is increased such that it becomes difficult to increase the driving speed of the display device
In accordance with exemplary embodiments of the present invention the driving speed of a display device driven by a time division pulse width modulation method is increased.
According to an exemplary embodiment, a display device is provided. A display panel includes a plurality of pixels, a plurality of gate lines, and a plurality of data lines. A first gate driver is configured to apply a gate-on voltage to gate lines of a first gate line group among the plurality of gate lines in each period of n first scan periods for a first frame, n being a natural number. A second gate driver is configured to apply a gate-on voltage to gate lines of a second gate line group among the plurality of gate lines in each period of n second scan periods for a first frame. A data driver is configured to apply a data voltage to a plurality of data lines. A signal controller is configured to transmit a control signal to the first gate driver, the second gate driver and the data driver, wherein an interval between start points of the n first scan periods is gradually decreased according to time, and the interval between start points of the n second scan periods is gradually increased according to time.
The n first scan periods and the n second scan periods may be not overlapped with each other.
A temporal difference between a start point of the first scan period among the n first scan periods for the first frame and a start point of the first scan period among the n second scan periods for the first frame may be smaller than one frame.
Each of the n first scan periods and each of the n second scan periods may be maintained during one scan time. An interval between two adjacent scan periods of the n first scan periods and an interval between two adjacent scan periods of the n second scan periods may respectively maintained during one scan time. The interval of the n first scan period and the interval between the n second scan periods may be a multiple of the one scan time.
An interval between start points of neighboring scan periods of the n first scan periods may be decreased by 1/k according to time, and an interval between start points of neighboring scan periods of the n second scan periods may be increased by a k, according to time, k being a natural number.
A start point of the first scan period of the n first scan periods may be earlier than a start point of the first scan period of the n second scan periods.
A start point of the first scan period of the n first scan periods may be later than a start point of the first scan period of the n second scan periods.
The signal controller may outputs a first scanning start signal and a first gate clock signal to the first gate driver, and a second scanning start signal and a second gate clock signal to the second gate driver.
An output sequence of first pulses of the first scanning start signal, each first pulse corresponding to the n respective first scan periods, may be opposite to an output sequence of second pulses of the second scanning start signal, each second pulse corresponding to the n respective second scan periods.
The first gate clock signal may be the same as the second gate clock signal.
A data voltage applied to a pixel during each scan period of the n first scan periods and the n second scan periods may be maintained until a next scan period starts after the each scan period is finished.
The signal controller may output a first scanning start signal and a first gate clock signal to the first gate driver, and a second scanning start signal and a second gate clock signal to the second gate driver.
The display device may further include a third gate driver configured to apply the gate-on voltage to gate lines of a third gate line group among the plurality of gate lines in each period of n third scan periods for the first frame.
The n first scan periods, the n second scan periods, and the third scan periods may not overlap.
Each of the n first scan periods, each of the n second scan periods, and each of the n third scan periods may be respectively maintained during one scan time. An interval between two adjacent scan periods of the n first scan periods, an interval between two adjacent scan periods of the n second scan periods, and an interval between two adjacent scan periods of the n third scan periods may be respectively a multiple of the one scan time.
A ratio of intervals between two start points of two adjacent scan periods among the n first scan periods may not have a multiple relationship.
When n is 3, a ratio of the intervals between the start points of neighboring scan periods of the n first scan periods may be 1:3:7.
The signal controller may output a first scanning start signal and a first gate clock signal to the first gate driver, a second scanning start signal and a second gate clock signal to the second gate driver, and a third scanning start signal and a third gate clock signal to the third gate driver.
The display device may be an electrowetting display device.
A reset scan period may be in the first frame.
The data voltage may have two or more values.
According to an exemplary embodiment a method is provided for driving a display device including a display panel having a plurality of pixels coupled to a plurality of gate lines and to a plurality of data lines, a first gate driver and a second gate driver coupled to the gate lines, a data driver coupled to the data lines, and a signal controller configured to provide control signals to the first and second gate drivers and to the data driver. The method includes applying a gate-on voltage to a first gate line group among the plurality of gate lines in each period of n first scan periods for a first frame by the first gate driver, n being a natural number, and applying a gate-on voltage to a second gate line group among the plurality of gate lines in each period of n second scan periods for the first frame by the second gate driver. An interval between start points of the n first scan periods is gradually decreased according to time, and an interval between start points of the n second scan periods is gradually increased according to time.
In the method the n first scan periods and the n second scan periods may not be overlapped with each other.
In the method, the temporal difference between a start point of the first scan period among the n first scan periods for the first frame and a start point of the first scan period among the n second scan periods for the first frame may be smaller than one frame.
In the method, each of the n first scan periods and each of the n second scan periods may be maintained during one scan time, and an interval between two adjacent scan periods of the n first scan period and an interval between two adjacent scan periods of the n second scan periods may be respectively a multiple of the one scan time.
In the method an interval between start points of neighboring scan periods of the n first scan periods may be decreased by 1/k according to time, k being a natural number, and an interval between start points of neighboring scan periods of the n second scan periods may be increased by k according to time.
In the method a start point of the first scan period of the n first scan periods may be earlier than a start point of the first scan period of the n second scan periods.
In the method a start point of the first scan period of the n first scan periods may be later than a start point of the first scan period of the n second scan periods.
The method may further include outputting a first scanning start signal and a first gate clock signal to the first gate driver by the signal controller, and outputting a second scanning start signal and a second gate clock signal to the second gate driver by the signal controller.
The method may further include applying a data voltage to the data line during each scan period of the n first scan periods and the n second scan periods by the data driver and maintaining the data voltage applied to a pixel connected to the data line until a next scan period starts after the each scan period is finished.
The display device may further include a third gate driver, and the method may further include applying the gate-on voltage to a third gate line group among the plurality of gate lines in each period of n third scan periods for the first frame by the third gate driver.
In the method, the n first scan periods, the n second scan periods, and the n third scan periods may not overlap.
In the method each of the n first scan periods, each of the n second scan periods, and each of the n third scan periods may be respectively maintained during one scan time, and an interval between two adjacent scan periods of the n first scan periods, an interval between two adjacent scan periods of the n second scan periods, and an interval between two adjacent scan periods of the n third scan periods may be respectively a multiple of the one scan time.
In the method a ratio of the intervals between two start points of two adjacent scan periods among the n first scan periods does not have a multiple relationship.
In the method, when n is 3, a ratio of the intervals between the start points of neighboring scan periods of the n first scan periods is 1:3:7.
The method may further include outputting a first scanning start signal and a first gate clock signal to the first gate driver by the signal controller, outputting a second scanning start signal and a second gate clock signal to the second gate driver by the signal controller, and outputting a third scanning start signal and a third gate clock signal to the third gate driver by the signal controller.
In the method the data driver may further apply the data voltage having two or more levels to the data line.
The method may further include applying the gate-on voltage to the first gate line group, to the second gate line group, and to the third gate line group at the end of the first frame and applying a reset data voltage to the data line.
The method may further include applying a data voltage having two or more levels to the data line by the data driver.
According to an exemplary embodiment an electrowetting display device is provided. A display panel includes a plurality of pixels, each pixel having a reflecting electrode formed on a first substrate, a first transparent electrode positioned on the reflecting electrode, a hydrophobic insulating layer coated on the first transparent electrode, a first fluid and a second fluid formed on the hydrophobic insulating layer, the first fluid and the second fluid being materials that are not mixed and have different electrical conductivities. A first gate driver is configured to apply a gate-on voltage to gate lines of a first gate line group coupled to pixels in a first portion of the display panel in each period of n first scan periods for a first frame, n being a natural number. A second gate driver is configured to apply a gate-on voltage to gate lines of a second gate line group coupled to pixels in a second portion of the display panel in each period of n second scan periods for a first frame. A data driver is configured to apply a data voltage to a plurality of data lines coupled to respective ones of the pixels. A signal controller is configured to transmit a control signal to the first gate driver, to the second gate driver and to the data driver. An interval between start points of the n first scan periods is gradually decreased according to time, and an interval between start points of the n second scan periods is gradually increased according to time.
The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
In the drawings, the thickness of layers, films, panels, regions, and the like, may be exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
A display device according to an exemplary embodiment of the present invention will now be described with reference to
As shown in
The display panel 300 is divided into a first display panel part 300a and a second display panel part 300b, and includes a plurality of display signal lines G1-Gk, D1-Dm and a plurality of pixels PX connected thereto and arranged substantially as a matrix.
The display signal lines G1-Gk, D1-Dm include a plurality of gate lines G1-Gk that transmit a gate signal and a plurality of data lines D1-Dm that transmit a data voltage.
The gate lines G1-Gk are divided into a first gate line group Gset1 positioned in the first display panel part 300a and a second gate line group Gset2 positioned in the second display panel part 300b. The first gate line group Gset1 is connected to the first gate driver 400a and includes gate lines G1-Gj (j<k) sequentially arranged, and the second gate line group Gset2 is connected to the second gate driver 400b and includes gate lines G(j+1)-Gk sequentially arranged. The gate lines G1-Gk may intersect the data lines D1-Dm.
Each pixel PX includes a switching element connected to the display signal lines G1-Gk, D1-Dm and a pixel circuit connected thereto. The switching element as three terminal element, such as a thin film transistor (TFT), includes a control terminal connected to the gate lines G1-Gk, an input terminal connected to the data lines D1-Dm, and an output terminal connected to the pixel electrode. For color display, each pixel PX uniquely represents one of primary colors (i.e., spatial division) or each pixel PX sequentially represents the primary colors in turn (i.e., temporal division), such that a spatial or temporal sum of the primary colors is recognized as a desired color. An example of a set of the primary colors includes three primary colors of red, green, and blue colors. An example of a spatial division display may include a color filter representing one of the primary colors in an area corresponding to each pixel PX, and an example of a temporal division display may involves supplying light of the color changed according to the amount of time light is supplied by a backlight unit to each pixel PX.
The data driver 500 is connected to the data lines D1-Dm of the display panel 300 and applies the data voltage to the data lines D1-Dm.
The first gate driver 400a is connected to the gate lines G1-Gj of the first gate line group Gset1 and applies a scanning signal that is composed of a combination of a switch-on voltage Von to turn on the switching transistor and a switch-off voltage Voff to turn off the switching transistor to the gate lines G1-Gj.
The second gate driver 400b is connected to the gate lines G(j+1)-Gk of the second gate line group Gset2 and applies the gate signal to the gate lines G(j+1)-Gk.
The signal controller 600 controls the operation of the first and second gate drivers 400a, 400b, and the data driver 500.
Next, an operation of a display device will be described with reference to
Referring back to
The gate control signal includes the first scanning start signal STV1 and at least one first gate clock signal CPV1 input to the first gate driver 400a and the second scanning start signal STV2 and at least one second gate clock signal CPV2 input to the second gate driver 400b. The first and second scanning start signals STV1, STV2 instruct a scan start of the gate-on voltage Von, and the first and second gate clock signals CPV1, CPV2 control output time of the gate-on voltage Von. Alternatively, the first and second gate drivers 400a, 400b may use the same gate clock signal CPV. That is, the first and second gate clock signals CPV1, CPV2 may be the same signal. The gate control signal may further include at least one output enable signal OE limiting the duration of the gate-on voltage Von.
The first gate driver 400a and the second gate driver 400b sequentially apply the gate-on voltage Von to the gate line G1-Gj of the first gate line group Gset1 and the gate line G(j+1)-Gk of the second gate line group Gset2 n times during one frame to express the image of a 2n gray (n is a natural number). The application of the gate-on voltage is processed according to the first and second scanning start signals STV1, STV2 and the first and second gate clock signals CPV1, CPV2 from the signal controller 600. Referring to
The n (n=4 in
Referring to
To display images having grays of a number of 2n (e.g., 16) according to the time division pulse width modulation (PWM) method according to an exemplary embodiment of the present invention, the time between the end point of each scan period Sn, S(n−1), . . . , S1, L1, L2, . . . , Ln lasting 1 scan time 1T and the start point of the next scan period is different according to the position of the scan periods Sn, S(n−1), . . . , S1, L1, L2, . . . , Ln. For example, the interval between two adjacent scan periods of the n scan periods Sn, S(n−1), . . . , S1, L1, L2, . . . , Ln may be gradually increased or decreased.
For example, a temporal distance (referred to as “a data application and maintaining time” or “a sub-frame time” of each scan period) from the start point of the scan periods Sn, S(n−1), . . . , S2 to the start point of the next scan periods S(n−1), . . . , S1, Sn of the next frame in the case of the first gate driver 400a may be gradually decreased by ½ time such as 2(n-1)T, 2n-2T, . . . , 21T, 1T. In the case of the second gate driver 400b, the temporal distance from the start point of the scan periods L1, L2, . . . , Ln to the start point of the next scan periods L2, . . . , Ln, L1 of the next frame may be gradually increased by 2 times such as 1T, 21T, . . . , 2n-2T, 2(n-1)T. In other words, when a bit number of the image signal is n (the number of the gray of the image is 2n), a ratio of the temporal distance from the start point of the scan periods Sn, S(n−1), . . . , S2, L1, L2, . . . , Ln to the start point of the next scan periods S(n−1), . . . , S1, Sn of the next frame, L2, . . . , Ln, L1 of the next frame may be 1:21: . . . :2n-2:2(n-1) as a ratio of a digit value of each bit of the n bits or may be opposite thereto. Accordingly, the entire length of one frame may be 2n-1T. However, the temporal distance between the scan periods Sn, S(n−1), . . . , S2, L1 L2, . . . , Ln is not limited thereto and may be vary.
The data voltage applied to the pixel PX is maintained before the start of the next scan period S(n−1), . . . , S1, Sn of the next frame, L2, . . . , Ln, L1 of the next frame after the finish of one scan period Sn, S(n−1), . . . , S1, L1, L2, . . . , Ln, and the maintaining of the data voltage may be realized by a maintaining means such as a storage capacitor.
According to an exemplary embodiment as shown in
According to an exemplary embodiment of the present invention, the start point of the first scan period for one frame of the first and second gate drivers 400a, 400b for the scan period Sn, S(n−1), . . . , S1 of the first gate driver 400a and the scan periods L1, L2, . . . , Ln of the second gate driver 400b are not to overlapped.
For example, in the exemplary embodiment shown in
In the exemplary embodiments shown in
On the other hand, if a time from the start point of the first scan period Sn of the first gate driver 400a to the finish time of scan period S1 is referred to as 1 frame time 1F, the temporal difference between the start point of the first scan period L1 for the first frame of the second gate driver 400b and the start point of the first scan period Sn for the first frame of the first gate driver 400a may be smaller than 1 frame time 1F.
As described above, according to an exemplary embodiment of the present invention, when the display device is driven by the time division pulse width modulation (PWM) method by using two gate drivers 400a, 400b, the arrangement sequence of the n scan periods for one frame of the second gate driver 400b among two gate drivers 400a, 400b and the arrangement sequence of the n scan periods for one frame of the first gate driver 400a are opposite to each other and the start point of the n scan periods for one frame for the scan periods of two gate drivers 400a, 400b are not overlapped such that the total time to display the image of one frame may be reduced. That is, a total idle time of two gate drivers 400a, 400b may be reduced.
Accordingly, according to an exemplary embodiment of the present invention, the entire driving time for applying the gate-on voltage to the gate lines G1-Gk of the entire display panel 300 may be reduced by about half and the driving frequency may be increased by about two times compared with a case that the n scan periods of two gate driver 400a, 400b are the same. Also, in the case that the driving frequency is not increased, the application time of the gate-on voltage may be increased such that the charging time of the data voltage for the pixel PX may be increased.
In the exemplary embodiment shown in
Next, a display device according to an exemplary embodiment of the present invention will be described with reference to
Electrowetting is the modification of the wetting properties of a surface which is typically hydrophobic, i.e., the physical property of a molecule that is repelled from a mass of water, with an applied electric field. Electrowetting allows large numbers of material droplets to be independently manipulated under direct electrical control without the use of external pumps, valves or even fixed channels. Such manipulation can provide varying light transmission characteristics for the display device.
Referring to
In the exemplary embodiment shown in
Also, a portion of the light passing outside may be passed through the first fluid 150 that is pushed to one side of the pixel PX, and in this case, the color of the light passing through the first fluid 150 may be the same as the color of the first color of the first fluid 150 and may have high saturation.
As described above, as the display device according to an exemplary embodiment of the present invention, the electrowetting display device includes the pixel electrode made of the first and second transparent electrodes 130 and 170 positioned in each pixel PX, and thereby the first state and the second state are respectively defined when the pixel electrode is not applied with the voltage and is applied with the voltage. The first state may display the black, and the second state may display the white.
The electrowetting display device according to an exemplary embodiment of the present invention may be driven by the driving method according to the exemplary embodiment shown in
The electrowetting display device according to an exemplary embodiment of the present invention may have a characteristic that the first fluid 150 is backflowed into an original position although the voltage applied to the first and the second transparent electrodes 130, 170 is maintained after the first fluid 150 is pushed to one side of the pixel PX. To prevent this, the first and second gate drivers 400a, 400b may have an additional scan period as well as the n scan periods Sn, S(n−1), . . . , S1, L1, L2, . . . , Ln. This will be described with reference to
A driving method according to an exemplary embodiment shown in
The data voltage applied to the data lines D1-Dm during the reset scan periods Sr, Lr as a reset data voltage may be equal to or different from the first data voltage (e.g., 30V). If the reset data voltage is applied to all pixels PX through the data lines D1-Dm during the reset scan periods Sr, Lr, the backflow of the pushed first fluid 150 may be prevented.
Also, the driving method according to the exemplary embodiment shown in
According to another exemplary embodiment of the present invention, in the time division pulse width modulation driving method according to the above-described exemplary embodiments, the data voltage applied to the pixel PX during each scan period is not limited to two values of the first data voltage (e.g., 30V) and the second data voltage (e.g., 0V) and may have one among three or more values. For example, the data voltage may have seven values such as −15V, −10V, −5V, 0V, 5V, 10V, and 15V. As described above, the driving method displaying the different grays by varying the size of the data voltage is referred to as a pulse amplitude modulation method. Accordingly, in the driving method of the display device according to the several exemplary embodiment of the present invention, if the gray is displayed by varying three or more magnitudes of the data voltage, the pulse width modulation method and the pulse amplitude modulation method may be used together such that the number of grays of the image to be displayed may be further increased. In other words, the gray of the image displayed by the pixel PX is proportional to the product of the applied data voltage and the time that the data voltage is applied and maintained, that is, the data application and maintaining time or the sub-frame time, such that the gray range may be further increased. However, in the exemplary embodiment shown in
For example, if four data voltages are applied to the pixel PX, such as 0V, 5V, 10V, or 15V, and the data application and maintaining is expressed as 2n (n=0, 1, 2, . . . ), the gray expressed when the applied data voltage is 20V and the data application and maintaining time of the scan period is 20=1 and the gray expressed when the applied data voltage is 10V and the data application and maintaining time of the scan period is 21 may be the same.
A driving method of a display device according to another exemplary embodiment of the present invention will be described with reference to
The driving method shown in
Also, in the exemplary embodiment shown in
According to the driving method shown in
Referring to
The duration of the first scan period S1 of the gate driver is referred to as the first sub-frame time SF1. A time interval between the start point of the second scan period S2 and the start point of the third scan period S3 is referred to as the second sub-frame time SF2. The time interval between the start point of the third scan period S3 and the start point of the reset scan period Sr is referred to as the third sub-frame time SF3. The duration of the reset scan period Sr is referred to as a reset time reset.
In the exemplary embodiment shown in
As described above, when the ratio of the sub-frame time related to scan periods S1, S2, S3 is not a multiple or a sub-multiple such as 1:3:7 . . . , the number of grays under the driving of the pulse amplitude modulation method may be further increased. For example, when considering the data voltages of 5V, 10V, and 15V, a gray proportional to the product of the sub-frame time and the data voltage may have different values except for the case that the sub-frame time is 1k (k is natural number) and the data voltage is 15V and the case that the sub-frame time is 3k and the data voltage is 5V. In contrast, when the ratio of the sub-frame has a geometric series such as 1:2:4 . . . , an overlapping gray is generated such that the number of grays to be expressed is less than the exemplary embodiment shown in
By controlling the data voltage, the number of grays to be expressed in the exemplary embodiment shown in
The various characteristics of the exemplary embodiment shown in
Next, a display device according to another exemplary embodiment of the present invention will be described with reference to
Referring to
In the exemplary embodiment of
The display panel 300 may be divided into a plurality of display panel parts according to the number of gate drivers. For example, as shown in
In the exemplary embodiment shown in
The first, second, and third gate drivers 400a, 400b, 400c are connected to the signal transmitting lines provided in a printed circuit board (PCB) 440 for receiving gate control signals, and a data driver 500 is connected to the signal transmitting lines provided in a printed circuit board (PCB) 550 for receiving the data control signals. These gate control signals and data control signals may be transmitted from the signal controller 600 shown in
The gate control signal includes a first scanning start signal STV1 and at least one first gate clock signal CPV1 input to the first gate driver 400a, a second scanning start signal STV2 and at least one second gate clock signal CPV2 input to the second gate driver 400b, and a third scanning start signal STV3 and at least one third gate clock signal CPV3 input to the third gate driver 400c. Like the exemplary embodiment shown in
Next, the operation of the display device shown in
In the exemplary embodiment shown in
The ratio of the first sub-frame time SF1 which is the time interval between the start point of the first scan period S1 and the start point of the following scan period, the second sub-frame time SF2 which is the time interval between the start point of the second scan period S2 and the start point of the following scan period, and the third sub-frame time SF3 which is the time interval between the start point of the third scan period S3 and the following scan period may be gradually increased. The ratio may be constituted by numbers that do not have a multiple relationship, such as 1:3:7.
Referring to
For example, as shown in
If the gate-on voltage Von is applied to the gate lines G1-Gk in each scan period S1, S2, S3 and the reset scan period Sr, the data voltage is applied to the switching element of the pixel connected to the gate lines G1-Gk such that the corresponding data voltage is applied to the pixel. To express many grays, the display device may be driven with the pulse amplitude modulation method by configuring three or more levels of the data voltage.
As set forth in the exemplary embodiments of the present invention, for the driving method for the time division pulse width modulation method, if the temporal intervals between the several sequential scan periods of a plurality of gate drivers are appropriately controlled, three or more gate drivers may be used. That is, as shown in
In the several exemplary embodiments of the present invention, an electrowetting display device is provided as an example of the display device. However, it is not limited thereto, and the present invention may be applied to various display devices that may be driven by the driving method of the time division pulse width modulation method according to an exemplary embodiment of the present invention, for example, a display device using microelectromechanical systems (MEMS) or a cholesteric liquid crystal display.
While this invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2011-0067027 | Jul 2011 | KR | national |
