Patent Application
20130127880
This disclosure relates to illumination systems, including illumination systems for displays, particularly illumination systems having light guides with light turning features, and to electromechanical systems.
Electromechanical systems include devices having electrical and mechanical elements, actuators, transducers, sensors, optical components (e.g., mirrors) and electronics. Electromechanical systems can be manufactured at a variety of scales including, but not limited to, microscales and nanoscales. For example, microelectromechanical systems (MEMS) devices can include structures having sizes ranging from about a micron to hundreds of microns or more. Nanoelectromechanical systems (NEMS) devices can include structures having sizes smaller than a micron including, for example, sizes smaller than several hundred nanometers. Electromechanical elements may be created using deposition, etching, lithography, and/or other micromachining processes that etch away parts of substrates and/or deposited material layers, or that add layers to form electrical and electromechanical devices.
One type of electromechanical systems device is called an interferometric modulator (IMOD). As used herein, the term interferometric modulator or interferometric light modulator refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In some implementations, an interferometric modulator may include a pair of conductive plates, one or both of which may be transparent and/or reflective, wholly or in part, and capable of relative motion upon application of an appropriate electrical signal. In an implementation, one plate may include a stationary layer deposited on a substrate and the other plate may include a reflective membrane separated from the stationary layer by an air gap. The position of one plate in relation to another can change the optical interference of light incident on the interferometric modulator. Interferometric modulator devices have a wide range of applications, and are anticipated to be used in improving existing products and creating new products, especially those with display capabilities.
Reflected ambient light is used to form images in some display devices, such as reflective displays using display elements formed by interferometric modulators. The perceived brightness of these displays depends upon the amount of light that is reflected towards a viewer. In low ambient light conditions, light from an illumination device with an artificial light source can be used to illuminate the reflective display elements, which then reflect the light towards a viewer to generate an image. To meet market demands and design criteria for display devices, including reflective and transmissive displays, new illumination devices and methods for forming them are continually being developed.
The systems, methods and devices of the disclosure each have several innovative aspects, no single one of which is solely responsible for the desirable attributes disclosed herein.
One innovative aspect of the subject matter described in this disclosure can be implemented in a method of manufacturing a display device. The method includes providing a substrate having a first side and a second side opposite the first side. The method further includes processing the first side using a first processing technology. Processing the first side includes forming a plurality of light turning features on the first side of the substrate. Processing the first side further includes forming a first protective layer over the light turning features and subsequently processing the second side using a second processing technology. Processing the second side includes forming an array of display elements on the second side of the substrate. In an implementation, the first processing technology can use substantially the same tool set as the second processing technology. In an implementation, the first protective layer can be a scratch resistant layer. In an implementation, the first protective layer can be resistant to etch chemistries for forming the array of display elements.
Another innovative aspect of the subject matter described in this disclosure can be implemented in a display device. The display device includes a substrate having a first side and a second side opposite the first side. The display device further includes a plurality of light turning features defined by indentations on the first side. The display device further includes a substantially planar first protective layer over the light turning features and substantially extending into the indentations. The display device further includes an array of display elements formed on the second side. In an implementation, the array of display elements can be formed directly in contact with the substrate. In an implementation, the substrate can constitute a light guide.
Another innovative aspect of the subject matter described in this disclosure can be implemented in a display device. The display device includes a substrate having a first side and a second side opposite the first side. The display device further includes a plurality of light turning features on the first side. The display device further includes means for protecting the light turning features and an array of display elements formed on the second side. In an implementation, the means for protecting can include an optical cladding layer. In an implementation, the means for protecting can include a passivating layer. In an implementation, the plurality of light turning features can be formed in indentations on the first side of the substrate, and the means for protecting can include a scratch-resistant layer extending into the indentations.
Details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, the drawings, and the claims. Note that the relative dimensions of the following figures may not be drawn to scale.
Like reference numbers and designations in the various drawings indicate like elements.
The following detailed description is directed to certain implementations for the purposes of describing the innovative aspects. However, the teachings herein can be applied in a multitude of different ways. The described implementations may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual, graphical or pictorial. More particularly, it is contemplated that the implementations may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, multimedia Internet enabled cellular telephones, mobile television receivers, wireless devices, smartphones, Bluetooth® devices, personal data assistants (PDAs), wireless electronic mail receivers, hand-held or portable computers, netbooks, notebooks, smartbooks, tablets, printers, copiers, scanners, facsimile devices, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, electronic reading devices (e.g., e-readers), computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, camera view displays (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, microwaves, refrigerators, stereo systems, cassette recorders or players, DVD players, CD players, VCRs, radios, portable memory chips, washers, dryers, washer/dryers, parking meters, packaging (e.g., MEMS and non-MEMS), aesthetic structures (e.g., display of images on a piece of jewelry) and a variety of electromechanical systems devices. The teachings herein also can be used in non-display applications such as, but not limited to, electronic switching devices, radio frequency filters, sensors, accelerometers, gyroscopes, motion-sensing devices, magnetometers, inertial components for consumer electronics, parts of consumer electronics products, varactors, liquid crystal devices, electrophoretic devices, drive schemes, manufacturing processes, and electronic test equipment. Thus, the teachings are not intended to be limited to the implementations depicted solely in the Figures, but instead have wide applicability as will be readily apparent to a person having ordinary skill in the art.
In some implementations, an illumination system is provided with a substrate having a first side and a second side opposite the first. The substrate can be optically transmissive and form part of a light guide for distributing light. The first side of the substrate can be processed using a first processing technology. In some implementations, the first processing technology can involve using a particular processing tool set (such as a first set of processing equipment or a first processing chamber). The first processing technology can be utilized for one or more first deposition and/or patterning processes, which can create one or more first structures.
The second side can be processed using a second processing technology, while the protective layer protects the first side from damage. In some implementations, the second processing technology can involve using a particular processing tool set and can include one or more second deposition and/or patterning processes. The second processing technology can create one or more structures, which can be different from the structures formed on the first side. For example, processing the second side can include forming a display element on the second side of the substrate. Note that the first and second processing technologies can utilize the same tool set (for example, the same processing equipment or process chamber).
In some implementations, processing the first side of the substrate can include forming light turning features on the first side and forming a first protective layer over the light turning features. In addition to protecting the first side, the first protective layer may function as an optical cladding and/or passivation layer. In some implementations, a second protective layer can be formed over the protective layer. Relative to the first protective layer, the second protective layer can have a higher scratch resistance and/or resistance to reaction with chemistries in the second processing technology, in some implementations.
The illumination system may be an integrated device that includes a display and a display light for illuminating the display. For example, the light turning features can be configured to turn light propagating inside the substrate so that the light exits the substrate and impinges on the display elements, thereby illuminating the display formed by the display elements. Thus, the substrate can function both as a light guide for the illumination function and as a support for the display elements during fabrication of those display elements. In addition, in some implementations, the protective layer can protect the light turning features during the fabrication of the display elements and also act as a cladding layer to facilitate propagation of light within the light guide by total internal reflection and/or as a passivation layer.
Particular implementations of the subject matter described in this disclosure can be implemented to realize one or more of the following potential advantages. For example, various implementations of the methods disclosed herein allow integrated fabrication of both display elements and light-turning features on a single substrate. In contrast, separately forming and combining the display elements with a light guide having the display elements can be costly, and the interface between the light guide and a display substrate can interfere with light transmission, reducing the brightness of the end device. For example, there may be undesirable Fresnel reflections at the interface between the light guide and the display substrate. Accordingly, an integrated device having a substrate that both supports display elements during fabrication and that can function as part of a display light can improve the brightness of the front light and reduce the fabrication cost. In addition, various implementations of the methods disclosed herein provide a substantially planar protective layer over a first side of the integrated substrate. The protective layer can help alleviate potential problems including, but not limited to: process damage to the first side from chemicals used during processing of the second side, scratch and handling damage to the first side from contact with processing surfaces and robot end-effectors during processing of the second side, contamination of front-end process systems by damaged light turning feature parts that have been removed from the first side during processing of the second side, contamination of the light turning features by particulate matter present during processing of the second side, and vacuum sensor errors during processing of the second side due to protrusions in the surface of the first side. In addition, the protective layer may also function as a cladding layer and/or passivation layer, thereby facilitating propagation of light in the display light and/or reducing corrosion in the light turning features, where the light turning features are provided with parts, such as metallic reflective layers, that are sensitive to corrosion. One or more of these potential advantages can reduce the time and/or cost of manufacture, and increase the manufacturing yield, while also improving display performance.
An example of a suitable MEMS device, to which the described implementations may apply, is a reflective display device. Reflective display devices can incorporate interferometric modulators (IMODs) to selectively absorb and/or reflect light incident thereon using principles of optical interference. IMODs can include an absorber, a reflector that is movable with respect to the absorber, and an optical resonant cavity defined between the absorber and the reflector. The reflector can be moved to two or more different positions, which can change the size of the optical resonant cavity and thereby affect the reflectance of the interferometric modulator. The reflectance spectrums of IMODs can create fairly broad spectral bands which can be shifted across the visible wavelengths to generate different colors. The position of the spectral band can be adjusted by changing the thickness of the optical resonant cavity, i.e., by changing the position of the reflector.
The IMOD display device can include a row/column array of IMODs. Each IMOD can include a pair of reflective layers, i.e., a movable reflective layer and a fixed partially reflective layer, positioned at a variable and controllable distance from each other to form an air gap (also referred to as an optical gap or cavity). The movable reflective layer may be moved between at least two positions. In a first position, i.e., a relaxed position, the movable reflective layer can be positioned at a relatively large distance from the fixed partially reflective layer. In a second position, i.e., an actuated position, the movable reflective layer can be positioned more closely to the partially reflective layer. Incident light that reflects from the two layers can interfere constructively or destructively depending on the position of the movable reflective layer, producing either an overall reflective or non-reflective state for each pixel. In some implementations, the IMOD may be in a reflective state when unactuated, reflecting light within the visible spectrum, and may be in a dark state when actuated, reflecting light outside of the visible range (e.g., infrared light). In some other implementations, however, an IMOD may be in a dark state when unactuated, and in a reflective state when actuated. In some implementations, the introduction of an applied voltage can drive the pixels to change states. In some other implementations, an applied charge can drive the pixels to change states.
The depicted portion of the pixel array in
In
The optical stack 16 can include a single layer or several layers. The layer(s) can include one or more of an electrode layer, a partially reflective and partially transmissive layer and a transparent dielectric layer. In some implementations, the optical stack 16 is electrically conductive, partially transparent and partially reflective, and may be fabricated, for example, by depositing one or more of the above layers onto a transparent substrate 20. The electrode layer can be formed from a variety of materials, such as various metals, for example indium tin oxide (ITO). The partially reflective layer can be formed from a variety of materials that are partially reflective, such as various metals, e.g., chromium (Cr), semiconductors, and dielectrics. The partially reflective layer can be formed of one or more layers of materials, and each of the layers can be formed of a single material or a combination of materials. In some implementations, the optical stack 16 can include a single semi-transparent thickness of metal or semiconductor which serves as both an optical absorber and conductor, while different, more conductive layers or portions (e.g., of the optical stack 16 or of other structures of the IMOD) can serve to bus signals between IMOD pixels. The optical stack 16 also can include one or more insulating or dielectric layers covering one or more conductive layers or a conductive/absorptive layer.
In some implementations, the layer(s) of the optical stack 16 can be patterned into parallel strips, and may form row electrodes in a display device as described further below. As will be understood by one having skill in the art, the term “patterned” is used herein to refer to masking as well as etching processes. In some implementations, a highly conductive and reflective material, such as aluminum (Al), may be used for the movable reflective layer 14, and these strips may form column electrodes in a display device. The movable reflective layer 14 may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes of the optical stack 16) to form columns deposited on top of posts 18 and an intervening sacrificial material deposited between the posts 18. When the sacrificial material is etched away, a defined gap 19, or optical cavity, can be formed between the movable reflective layer 14 and the optical stack 16. In some implementations, the spacing between posts 18 may be on the order of 1-1000 um, while the gap 19 may be on the order of <10,000 Angstroms (Å).
In some implementations, each pixel of the IMOD, whether in the actuated or relaxed state, is essentially a capacitor formed by the fixed and moving reflective layers. When no voltage is applied, the movable reflective layer 14 remains in a mechanically relaxed state, as illustrated by the pixel 12 on the left in
The processor 21 can be configured to communicate with an array driver 22. The array driver 22 can include a row driver circuit 24 and a column driver circuit 26 that provide signals to, e.g., a display array or panel 30. The cross section of the IMOD display device illustrated in
In some implementations, a frame of an image may be created by applying data signals in the form of “segment” voltages along the set of column electrodes, in accordance with the desired change (if any) to the state of the pixels in a given row. Each row of the array can be addressed in turn, such that the frame is written one row at a time. To write the desired data to the pixels in a first row, segment voltages corresponding to the desired state of the pixels in the first row can be applied on the column electrodes, and a first row pulse in the form of a specific “common” voltage or signal can be applied to the first row electrode. The set of segment voltages can then be changed to correspond to the desired change (if any) to the state of the pixels in the second row, and a second common voltage can be applied to the second row electrode. In some implementations, the pixels in the first row are unaffected by the change in the segment voltages applied along the column electrodes, and remain in the state they were set to during the first common voltage row pulse. This process may be repeated for the entire series of rows, or alternatively, columns, in a sequential fashion to produce the image frame. The frames can be refreshed and/or updated with new image data by continually repeating this process at some desired number of frames per second.
The combination of segment and common signals applied across each pixel (that is, the potential difference across each pixel) determines the resulting state of each pixel.
As illustrated in
When a hold voltage is applied on a common line, such as a high hold voltage VCHOLD
When an addressing, or actuation, voltage is applied on a common line, such as a high addressing voltage VCADD
In some implementations, hold voltages, address voltages, and segment voltages may be used which always produce the same polarity potential difference across the modulators. In some other implementations, signals can be used which alternate the polarity of the potential difference of the modulators. Alternation of the polarity across the modulators (that is, alternation of the polarity of write procedures) may reduce or inhibit charge accumulation which could occur after repeated write operations of a single polarity.
During the first line time 60a: a release voltage 70 is applied on common line 1; the voltage applied on common line 2 begins at a high hold voltage 72 and moves to a release voltage 70; and a low hold voltage 76 is applied along common line 3. Thus, the modulators (common 1, segment 1), (1,2) and (1,3) along common line 1 remain in a relaxed, or unactuated, state for the duration of the first line time 60a, the modulators (2,1), (2,2) and (2,3) along common line 2 will move to a relaxed state, and the modulators (3,1), (3,2) and (3,3) along common line 3 will remain in their previous state. With reference to
During the second line time 60b, the voltage on common line 1 moves to a high hold voltage 72, and all modulators along common line 1 remain in a relaxed state regardless of the segment voltage applied because no addressing, or actuation, voltage was applied on the common line 1. The modulators along common line 2 remain in a relaxed state due to the application of the release voltage 70, and the modulators (3,1), (3,2) and (3,3) along common line 3 will relax when the voltage along common line 3 moves to a release voltage 70.
During the third line time 60c, common line 1 is addressed by applying a high address voltage 74 on common line 1. Because a low segment voltage 64 is applied along segment lines 1 and 2 during the application of this address voltage, the pixel voltage across modulators (1,1) and (1,2) is greater than the high end of the positive stability window (i.e., the voltage differential exceeded a predefined threshold) of the modulators, and the modulators (1,1) and (1,2) are actuated. Conversely, because a high segment voltage 62 is applied along segment line 3, the pixel voltage across modulator (1,3) is less than that of modulators (1,1) and (1,2), and remains within the positive stability window of the modulator; modulator (1,3) thus remains relaxed. Also during line time 60c, the voltage along common line 2 decreases to a low hold voltage 76, and the voltage along common line 3 remains at a release voltage 70, leaving the modulators along common lines 2 and 3 in a relaxed position.
During the fourth line time 60d, the voltage on common line 1 returns to a high hold voltage 72, leaving the modulators along common line 1 in their respective addressed states. The voltage on common line 2 is decreased to a low address voltage 78. Because a high segment voltage 62 is applied along segment line 2, the pixel voltage across modulator (2,2) is below the lower end of the negative stability window of the modulator, causing the modulator (2,2) to actuate. Conversely, because a low segment voltage 64 is applied along segment lines 1 and 3, the modulators (2,1) and (2,3) remain in a relaxed position. The voltage on common line 3 increases to a high hold voltage 72, leaving the modulators along common line 3 in a relaxed state.
Finally, during the fifth line time 60e, the voltage on common line 1 remains at high hold voltage 72, and the voltage on common line 2 remains at a low hold voltage 76, leaving the modulators along common lines 1 and 2 in their respective addressed states. The voltage on common line 3 increases to a high address voltage 74 to address the modulators along common line 3. As a low segment voltage 64 is applied on segment lines 2 and 3, the modulators (3,2) and (3,3) actuate, while the high segment voltage 62 applied along segment line 1 causes modulator (3,1) to remain in a relaxed position. Thus, at the end of the fifth line time 60e, the 3×3 pixel array is in the state shown in
In the timing diagram of
The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example,
As illustrated in
In implementations such as those shown in
The process 80 continues at block 84 with the formation of a sacrificial layer 25 over the optical stack 16. The sacrificial layer 25 is later removed (e.g., at block 90) to form the cavity 19 and thus the sacrificial layer 25 is not shown in the resulting interferometric modulators 12 illustrated in
The process 80 continues at block 86 with the formation of a support structure e.g., a post 18 as illustrated in
The process 80 continues at block 88 with the formation of a movable reflective layer or membrane such as the movable reflective layer 14 illustrated in
The process 80 continues at block 90 with the formation of a cavity, e.g., cavity 19 as illustrated in
With continued reference to
The light source 130 may include any suitable light source, for example, an incandescent bulb, a edge bar, a light emitting diode (“LED”), a fluorescent lamp, an LED light bar, an array of LEDs, and/or another light source. In certain implementations, light from the light source 130 is injected into the light guide 1070 such that a portion of the light propagates in a direction across at least a portion of the light guide 1070 at a low-graze angle relative to the surface of the light guide 1070 aligned with the array 1060 of display elements such that the light is reflected within the light guide 1070 by total internal reflection (“TIR”) off of the light guide's first and second sides 1012 and 1014, respectively. In some implementations, optical cladding layers (not shown) having a lower refractive index (for example, 0.05 or 0.1 lower) than the light guide 1070 may be disposed at the first side 1012 and/or second side 1014 to facilitate TIR off those sides. In some implementations, the light source 130 injecting light into the light guide 1070 includes a light bar. Light entering the light bar from a light generating device (e.g., a LED) may propagate along some or all of the length of the bar and exit out of a surface or edge of the light bar over a portion or all of the length of the light bar. Light exiting the light bar may enter an edge of the light guide 1070, and then propagate within the light guide 1070.
The light turning features 1030 in the light guide 1070 redirect the light towards display elements in the array 1060 of display elements at an angle sufficient such that at least some of the light passes out of the light guide 1070 to the array 1060 of display elements. The redirected light passing out the light guide 1070 may be considered to be extracted out of the light guide 1070. The light turning features 1030 may include one or more layers of different materials (for example, described herein with respect to
In some implementations, the light turning features 1030 are formed in the light guide 1070, and the IMODs (such as the IMODs 12 shown in
In various implementations, a protective layer can protect the light turning features 1030 during subsequent processing, such as when using the second processing technology. In some implementations, the protective layer can be removed at the end of the fabrication process. In some implementations, the protective layer can remain at the end of the fabrication process as a protective, passivation, and/or cladding layer, as discussed herein. The protective layer can be made thick enough to protect the light turning features 1030 on a first side 1012 from chemical and/or mechanical damage during processing of the second side 1014. For example, the protective layer can be a scratch resistant and/or passivation layer. The passivation layer can reduce moisture absorption and chemical damage to underlying features. The passivation layer may provide a moisture or gas barrier to protect moisture-sensitive underlying features, such as metal-containing light turning features that may be present in the light guide 1070. Thus, corrosion or other undesired changes to the light turning features 1030 may be mitigated or avoided. In some implementations, the protective layer can also be planarized. Planarization of the protective layer can provide compatibility with processing equipment designed for use with substrates having flat substrate backsides.
Referring to
In some implementations, the light turning film 1020 is selectively patternable and has sufficient structural integrity to support the formation of the light turning features 1030 with angled sidewalls. While shown in isolation for ease of illustration and description, a plurality of light turning features 1030 may be distributed across the light turning film 1020. In the illustrated implementation, the light turning features 1030 in the light turning film 1020 extend all the way through the light turning film 1020 to the substrate 1010. In another implementation, the light turning features 1030 may not extend all the way through the light turning film 1020, and may not reach the substrate 1010. In another implementation, the light turning features 1030 may be formed directly in the substrate 1010 without providing a separate light turning film 1020. For example, the substrate 1010 may be patterned and etched to define recesses on the surface 1012 to form light turning features on the substrate 1010 directly.
Referring still to
Referring now to
In some implementations, the protective layer 1050 can be formed using, for example, a material that forms a substantially planar surface as-deposited, or a material that can be made to have a substantially planar surface by subsequent processing after deposition. For example, the protective layer 1050 can be formed by spin coating a planarization polymer. The planarization polymer can be a high-temperature, low-refractive index polymer. Examples of planarization polymers include the organic polymers sold under the trademark AGC-ALX543™ by Asahi Glass Co. of Chiyoda-ku, Tokyo, Japan; AGC-ALX2000™ by Asahi Glass Co. of Chiyoda-ku, Tokyo, Japan, and/or HD-4100™ by HP Microsystems of Parlin, N.J. As another example, the protective layer 1050 can be formed by spin coating a spin-on glass material, including a patternable spin-on glass material. In various implementations, the protective layer 1050 can include a spin-on glass material such as the material sold under the trademark Accuglass T-12™ by Honeywell International, Inc. of Morristown, N.J., 512B™ by Honeywell International, Inc. of Morristown, N.J., PTS-R™ by Honeywell International, Inc. of Morristown, N.J., PTS-T™ by Honeywell International, Inc. of Morristown, N.J., and/or TOK-Trial 009™ by Tokyo Ohka Kogyo Co., Ltd. of Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture, Japan. In various implementations, the protective layer 1050 can include a photo-patternable spin-on glass material such as the material sold under the trademark TOK-OLiM-iF™ by Tokyo Ohka Kogyo Co., Ltd. of Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture, Japan. In some implementations, the protective layer 1050 can include AZLExp™ j sold by AZ Electronic Materials (Japan) Co. LTD., of 3330 Chihama Kakegawa-city, Shiznoka Japan. The planarization layer fills the light turning features 1030 and provides a substantially planar top surface.
In some implementations, the protective layer 1050 is a thick coating of SiO2. In various implementations, the protective layer 1050 can be about 1000 Å to about 3 μm thick. The SiO2 can be formed using a plasma CVD process. In another implementation, the SiO2 can be formed using a sputtering process. The protective layer 1050 fills in the light turning features 1030, and may include one or more surface protrusions 1052. The surface protrusions 1052 can be caused by, for example, protrusions in the topology of the underlying substrate 1010 which is propagated through to the top of the protective layer 1050.
Referring now to
In some implementations, the protective layer 1050 includes a material with a refractive index substantially matched to the substrate 1010 and/or the turning film 1020. For example, the indices of refraction of the protective layer 1050 and the turning film 1020 may be within about 0.03, or about 0.02 of one another. In some implementations, the substrate 1010 and the light turning film 1020 may form a light guide 1070. Further, the protective layer 1050 may form some part of the light guide 1070 and may support TIR at an upper surface of the protective layer 1050. In some other implementations, the protective layer 1050 can include a material having a refractive index lower than the light turning film 1020 and sufficient to support TIR at the interface between the protective layer 1050 and the light turning film 1020. For example, the refractive index of the protective layer 1050 can be less than the refractive index of the light turning film 1020 by more than about 0.05, about 0.08, or about 0.1. Thus, the protective layer 1050 can function as a cladding layer. Additionally or alternatively, in some implementations, the protective layer 1050 can be a passivation layer formed of a material sufficient to protect one or more underlying layers from oxidation.
Referring now to
Referring still to
Referring now to
Referring to
Referring still to
In some implementations, the second protective layer 1155 can include one of SiON, SiO2, silicon nitride (SiNx), or combinations thereof. The second protective layer 1155 can be formed using a plasma CVD process. In another implementation, the second protective layer 1155 can be formed using a sputtering process. The second protective layer 1155 may not include the surface protrusions 1052 described above with respect to
Referring now to
The interferometric stack can be configured to give the coatings 1040 a dark appearance, as seem by the viewer 170 (
The reflective layer 1242 may, for example, include a metal layer, for example, aluminum (Al), nickel (Ni), silver (Ag), molybdenum (Mo), gold (Au), and chromium (Cr). The reflective layer 1242 can be between about 100 Å and about 700 Å thick. In one implementation, the reflective layer 1242 is about 300 Å thick. The spacer layer 1244 can include various optically transmissive materials, for example, air, silicon oxy-nitride (SiOxN), silicon dioxide (SiO2), aluminum oxide (Al2O3), titanium dioxide (TiO2), magnesium fluoride (MgF2), chromium (III) oxide (Cr3O2), silicon nitride (Si3N4), transparent conductive oxides (TCOs), indium tin oxide (ITO), and zinc oxide (ZnO). In some implementations, the spacer layer 1244 is between about 500 Å and about 1500 Å thick. In one implementation, the spacer layer 1244 is about 800 Å thick. The partially reflective layer 1246 can include various materials, for example, molybdenum (Mo), titanium (Ti), tungsten (W), chromium (Cr), etc., as well as alloys, for example, MoCr. The partially reflective 1246 can be between about 20 and about 300 Å thick in some implementations. In one implementation, the partially reflective layer 1246 is about 80 Å thick. In some implementations, the reflective layer 1242, the spacer layer 1244, and the partially reflective layer 1246 can include an Al film, a SiO2 film, and a MoCr film, respectively.
The manufacturing process 1300 begins at block 1310 with the provision of the substrate 1010 (
In some implementations, a coating layer 1040 can be formed in the light turning features 1030. In some implementations, the coating layer 1040 can be configured to increase reflectivity of the ultimately-formed turning feature and/or function as a black mask from the viewer side to improve contrast of the array 1060 of display elements as observed by the viewer 170 (
At block 1330, the second side of the substrate 1010 can be processed using a second processing technology. In some implementations, the second processing technology can be the same as, or substantially similar to, the first processing technology. In some implementations, processing of the second side of the substrate 1010 can include forming the array 1060 on the second side of the substrate 1010. In some implementations, the array 1060 can be formed on the second side of the substrate 1010 by flipping the substrate 1010. In some implementations, the array 1060 can be formed using the process described above with respect to
The display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 45, an input device 48, and a microphone 46. The housing 41 can be formed from any of a variety of manufacturing processes, including injection molding, and vacuum forming. In addition, the housing 41 may be made from any of a variety of materials, including, but not limited to: plastic, metal, glass, rubber, and ceramic, or a combination thereof. The housing 41 can include removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols.
The display 30 may be any of a variety of displays, including a bi-stable or analog display, as described herein. The display 30 also can be configured to include a flat-panel display, such as plasma, EL, OLED, STN LCD, or TFT LCD, or a non-flat-panel display, such as a CRT or other tube device. In addition, the display 30 can include an interferometric modulator display, as described herein.
The components of the display device 40 are schematically illustrated in
The network interface 27 includes the antenna 43 and the transceiver 47 so that the display device 40 can communicate with one or more devices over a network. The network interface 27 also may have some processing capabilities to relieve, e.g., data processing requirements of the processor 21. The antenna 43 can transmit and receive signals. In some implementations, the antenna 43 transmits and receives RF signals according to the IEEE 16.11 standard, including IEEE 16.11(a), (b), or (g), or the IEEE 802.11 standard, including IEEE 802.11a, b, g or n. In some other implementations, the antenna 43 transmits and receives RF signals according to the BLUETOOTH standard. In the case of a cellular telephone, the antenna 43 is designed to receive code division multiple access (CDMA), frequency division multiple access (FDMA), time division multiple access (TDMA), Global System for Mobile communications (GSM), GSM/General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Terrestrial Trunked Radio (TETRA), Wideband-CDMA (W-CDMA), Evolution Data Optimized (EV-DO), NEV-DO, EV-DO Rev A, EV-DO Rev B, High Speed Packet Access (HSPA), High Speed Downlink Packet Access (HSDPA), High Speed Uplink Packet Access (HSUPA), Evolved High Speed Packet Access (HSPA+), Long Term Evolution (LTE), AMPS, or other known signals that are used to communicate within a wireless network, such as a system utilizing 3G or 4G technology. The transceiver 47 can pre-process the signals received from the antenna 43 so that they may be received by and further manipulated by the processor 21. The transceiver 47 also can process signals received from the processor 21 so that they may be transmitted from the display device 40 via the antenna 43.
In some implementations, the transceiver 47 can be replaced by a receiver. In addition, the network interface 27 can be replaced by an image source, which can store or generate image data to be sent to the processor 21. The processor 21 can control the overall operation of the display device 40. The processor 21 receives data, such as compressed image data from the network interface 27 or an image source, and processes the data into raw image data or into a format that is readily processed into raw image data. The processor 21 can send the processed data to the driver controller 29 or to the frame buffer 28 for storage. Raw data typically refers to the information that identifies the image characteristics at each location within an image. For example, such image characteristics can include color, saturation, and gray-scale level.
The processor 21 can include a microcontroller, CPU, or logic unit to control operation of the display device 40. The conditioning hardware 52 may include amplifiers and filters for transmitting signals to the speaker 45, and for receiving signals from the microphone 46. The conditioning hardware 52 may be discrete components within the display device 40, or may be incorporated within the processor 21 or other components.
The driver controller 29 can take the raw image data generated by the processor 21 either directly from the processor 21 or from the frame buffer 28 and can re-format the raw image data appropriately for high speed transmission to the array driver 22. In some implementations, the driver controller 29 can re-format the raw image data into a data flow having a raster-like format, such that it has a time order suitable for scanning across the display array 30. Then the driver controller 29 sends the formatted information to the array driver 22. Although a driver controller 29, such as an LCD controller, is often associated with the system processor 21 as a stand-alone Integrated Circuit (IC), such controllers may be implemented in many ways. For example, controllers may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware with the array driver 22.
The array driver 22 can receive the formatted information from the driver controller 29 and can re-format the video data into a parallel set of waveforms that are applied many times per second to the hundreds, and sometimes thousands (or more), of leads coming from the display's x-y matrix of pixels.
In some implementations, the driver controller 29, the array driver 22, and the display array 30 are appropriate for any of the types of displays described herein. For example, the driver controller 29 can be a conventional display controller or a bi-stable display controller (e.g., an IMOD controller). Additionally, the array driver 22 can be a conventional driver or a bi-stable display driver (e.g., an IMOD display driver). Moreover, the display array 30 can be a conventional display array or a bi-stable display array (e.g., a display including an array of IMODs). In some implementations, the driver controller 29 can be integrated with the array driver 22. Such an implementation is common in highly integrated systems such as cellular phones, watches and other small-area displays.
In some implementations, the input device 48 can be configured to allow, e.g., a user to control the operation of the display device 40. The input device 48 can include a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a rocker, a touch-sensitive screen, or a pressure- or heat-sensitive membrane. The microphone 46 can be configured as an input device for the display device 40. In some implementations, voice commands through the microphone 46 can be used for controlling operations of the display device 40.
The power supply 50 can include a variety of energy storage devices as are well known in the art. For example, the power supply 50 can be a rechargeable battery, such as a nickel-cadmium battery or a lithium-ion battery. The power supply 50 also can be a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell or solar-cell paint. The power supply 50 also can be configured to receive power from a wall outlet.
In some implementations, control programmability resides in the driver controller 29 which can be located in several places in the electronic display system. In some other implementations, control programmability resides in the array driver 22. The above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.
The various illustrative logics, logical blocks, modules, circuits and algorithm steps described in connection with the implementations disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. The interchangeability of hardware and software has been described generally, in terms of functionality, and illustrated in the various illustrative components, blocks, modules, circuits and steps described above. Whether such functionality is implemented in hardware or software depends upon the particular application and design constraints imposed on the overall system.
The hardware and data processing apparatus used to implement the various illustrative logics, logical blocks, modules and circuits described in connection with the aspects disclosed herein may be implemented or performed with a general purpose single- or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or, any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In some implementations, particular steps and methods may be performed by circuitry that is specific to a given function.
In one or more aspects, the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, including the structures disclosed in this specification and their structural equivalents thereof, or in any combination thereof. Implementations of the subject matter described in this specification also can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a computer storage media for execution by, or to control the operation of, data processing apparatus.
Various modifications to the implementations described in this disclosure may be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other implementations without departing from the spirit or scope of this disclosure. Thus, the claims are not intended to be limited to the implementations shown herein, but are to be accorded the widest scope consistent with this disclosure, the principles and the novel features disclosed herein. The word “exemplary” is used exclusively herein to mean “serving as an example, instance, or illustration.” Any implementation described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other implementations. Additionally, a person having ordinary skill in the art will readily appreciate, the terms “upper” and “lower” are sometimes used for ease of describing the figures, and indicate relative positions corresponding to the orientation of the figure on a properly oriented page, and may not reflect the proper orientation of the IMOD as implemented.
Certain features that are described in this specification in the context of separate implementations also can be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation also can be implemented in multiple implementations separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Further, the drawings may schematically depict one more example processes in the form of a flow diagram. However, other operations that are not depicted can be incorporated in the example processes that are schematically illustrated. For example, one or more additional operations can be performed before, after, simultaneously, or between any of the illustrated operations. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products. Additionally, other implementations are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results.
