Patent Application
20250104611
This application claims priority to Korean Patent Application No. 10-2023-0127904, filed on Sep. 25, 2023, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference.
Embodiments of the inventive concept relate to a display device and a method of driving the same. More particularly, embodiments of the inventive concept relate to a display device and a method of driving the same for improving a display quality in a variable frequency.
Generally, a display device may include a display panel and a display panel driver. The display panel may include gate lines, data lines, emission lines and pixels. The display panel driver may include a gate driver for providing gate signal respectively to the gate lines, a data driver for providing a data voltage to the data lines, an emission driver for providing emission signals respectively to the emission lines and a driving controller for controlling the gate driver, the data driver and the emission driver.
When a driving frequency of the display panel changes from a relatively high frequency to a relatively low frequency, a hysteresis characteristics of a driving transistor of the pixel may change, and a luminance difference of the display panel may occur. The luminance difference of the display panel may be visible to a user as a flicker.
Embodiments of the inventive concept provide a display device which decreases a luminance difference when a driving frequency of a display panel changes from a relatively high frequency to a relatively low frequency.
Embodiments of the inventive concept provide a method of driving using the display device.
In an embodiment of a display device according to the inventive concept, the display device comprises a display panel including pixels, a driving controller which receives input image data including an input grayscale from a host and generate a data signal including an output grayscale based on the input image data, and a data driver which converts the data signal into a data voltage and provides the data voltage to the display panel. In a case which a driving frequency of the display panel is changed from a relatively high frequency to a relatively low frequency, an output grayscale of a first low frequency frame having the relatively low frequency is less than or equal to the input grayscale.
In an embodiment, the output grayscale of the first low frequency frame may be less than or equal to an output grayscale of a high frequency frame having the relatively high frequency.
In an embodiment, in a case which a frequency interval, which is a difference between the relatively high frequency and the relatively low frequency, is greater than or equal to a reference frequency interval, the output grayscale of the first low frequency frame may be less than the input grayscale.
In an embodiment, in a case which the frequency interval is less than the reference frequency interval, the output grayscale of the first low frequency frame may be equal to the input grayscale.
In an embodiment, the reference frequency interval may be changed in a case which the input grayscale value is changed.
In an embodiment, the reference frequency interval may be decreased in a case which the input grayscale is decreased.
In an embodiment, an average luminance of the first low frequency frame may be greater in a case which a frequency interval, which is a difference between the relatively high frequency and the relatively low frequency, may be greater.
In an embodiment, a compensation grayscale of the first low frequency frame, which is a difference between the input grayscale and the output grayscale of the first low frequency frame, may be greater in a case which a difference between the average luminance of the first low frequency frame and a target luminance corresponding to the input grayscale is greater.
In an embodiment, an output grayscale of a second low frequency frame having the relatively low frequency may be greater than or equal to the output grayscale of the first low frequency frame and may be less than or equal to the input grayscale.
In an embodiment, the output grayscale may be gradually increased toward the input grayscale in the first low frequency frame and the second low frequency frame.
In an embodiment of a method of driving a display device according to the inventive concept, the method comprises receiving input image data including an input grayscale from a host and generating a data signal including an output grayscale based on the input image data, and converting the data signal into a data voltage and providing the data voltage to a display panel. In a case which a driving frequency of the display panel is changed from a relatively high frequency to a relatively low frequency, an output grayscale of a first low frequency frame having the relatively low frequency is less than or equal to the input grayscale.
In an embodiment, the output grayscale of the first low frequency frame may be less than or equal to an output grayscale of a high frequency frame having the relatively high frequency.
In an embodiment, the output grayscale of the first low frequency frame may be less than the input grayscale in a case which a frequency interval, which is a difference between the relatively high frequency and the relatively low frequency, is greater than or equal to a reference frequency interval.
In an embodiment, the output grayscale of the first low frequency frame may be equal to the input grayscale in a case which the frequency interval is less than the reference frequency interval.
In an embodiment, the reference frequency interval may be changed in a case which the input grayscale is changed.
In an embodiment, the reference frequency interval may be decreased in a case which the input grayscale is decreased.
In an embodiment, an average luminance of the first low frequency frame may be greater in a case which a frequency interval, which is a difference between the relatively high frequency and the relatively low frequency, is greater.
In an embodiment, a compensation grayscale of the first low frequency frame, which is a difference between the input grayscale and the output grayscale of the first low frequency frame, may be greater in a case which a difference between the average luminance of the first low frequency frame and a target luminance corresponding to the input grayscale is greater.
In an embodiment, an output grayscale of a second low frequency frame having the relatively low frequency may be greater than or equal to the output grayscale of the first low frequency frame and may be less than or equal to the input grayscale.
In an embodiment, the output grayscale may be gradually increased toward the input grayscale in the first low frequency frame and the second low frequency frame.
According to the display device and the method of driving the display device, in a case which the driving frequency of the display panel is changed from the relatively high frequency to the relatively low frequency, the output grayscale of the first low frequency frame having the relatively low frequency may be less than or equal to the input grayscale. Accordingly, a luminance difference when the driving frequency of the display panel changes from the relatively high frequency to the relatively low frequency may be reduced.
The above and other features of embodiments of the inventive concept will become
more apparent by describing in detailed embodiments thereof with reference to the accompanying drawings, in which:
Hereinafter, the disclosure will be described in more detail with reference to the accompanying drawings.
It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
It will be understood that, although the terms “first,” “second,” “third” etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, “a first element,” “component,” “region,” “layer” or “section” discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one,” unless the content clearly indicates otherwise. “Or” means “and/or.” As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower,” can therefore, encompasses both an orientation of “lower” and “upper,” depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The exemplary terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Referring to
In an embodiment, the driving controller 200 and the data driver 500 may be unitary, for example. In an embodiment, the driving controller 200, the gamma reference voltage generator 400 and the data driver 500 may be unitary, for example. In an embodiment, the driving controller 200, the gate driver 300, the gamma reference voltage generator 400 and the data driver 500 may be unitary, for example. In an embodiment, the driving controller 200, the gate driver 300, the gamma reference voltage generator 400, the data driver 500 and the emission driver 600 may be unitary, for example. A driving module in which at least the driving controller 200 and the data driver 500 are unitary may be also referred to as a timing controller embedded data driver (“TED”).
The display panel 100 may include a display area for displaying an image and a peripheral area disposed adjacent to the display area.
In the illustrated embodiment, the display panel 100 may be an organic light-emitting diode display panel including an organic light-emitting diode, for example. In an embodiment, the display panel 100 may be a quantum-dot organic light-emitting diode display panel including an organic light-emitting diode and a quantum-dot color filter, for example. In an embodiment, the display panel 100 may be a quantum-dot nano light-emitting diode display panel including a nano light-emitting diode and a quantum-dot color filter, for example.
The display panel 100 may include gate lines GL, data lines DL, emission lines EML and pixels P electrically connected to the gate lines GL and the data lines DL and the emission lines EML, respectively. The gate lines GL may extend in a first direction (e.g., horizontal direction in
The driving controller 200 may receive input image data IMG and an input control signal CONT from the host 700. The input image data IMG may include an information for a grayscale, and the grayscale of the input image data IMG may be referred to as input grayscale IG. In an embodiment, the input image data IMG may include red image data, green image data and blue image data, for example. The input image data IMG may include white image data. The input image data IMG may include magenta image data, yellow image data, and cyan image data. The input control signal CONT may include a master clock signal and a data enable signal. The input control signal CONT may further include a vertical synchronization signal and a horizontal synchronization signal.
The driving controller 200 may generate a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, a fourth control signal CONT4 and a data signal DATA based on the input image data IMG and the input control signal CONT.
The driving controller 200 may generate the first control signal CONT1 for controlling an operation of the gate driver 300 based on the input control signal CONT, and output the first control signal CONT1 to the gate driver 300. The first control signal CONT1 may include a vertical start signal and a gate clock signal.
The driving controller 200 may generate the second control signal CONT2 for controlling an operation of the data driver 500 based on the input control signal CONT, and output the second control signal CONT2 to the data driver 500. The second control signal CONT2 may include a horizontal start signal and a load signal.
The driving controller 200 may generate a data signal DATA based on the input image data IMG. The data signal DATA may include an information for the grayscale, and the grayscale of the data signal DATA may be referred to as an output grayscale OG. The output grayscale OG may be calculated through a grayscale compensation operation for the input grayscale IG. The driving controller 200 may output the data signal DATA to the data driver 500.
The driving controller 200 may generate the third control signal CONT3 for controlling an operation of the gamma reference voltage generator 400 based on the input control signal CONT, and output the third control signal CONT3 to the gamma reference voltage generator 400.
The driving controller 200 may generate the fourth control signal CONT4 for controlling an operation of the emission driver 600 based on the input control signal CONT, and output the fourth control signal CONT4 to the emission driver 600.
The gate driver 300 may generate gate signals for driving the gate lines GL in response to the first control signal CONT1 received from the driving controller 200. The gate driver 300 may output the gate signals to the gate lines GL.
In an embodiment, the gate driver 300 may be integrated on the peripheral area of the display panel 100.
The gamma reference voltage generator 400 may generate a gamma reference voltage VGREF in response to the third control signal CONT3 received from the driving controller 200. The gamma reference voltage generator 400 may provide the gamma reference voltage VGREF to the data driver 500. The gamma reference voltage VGREF may have a value corresponding to each data signal DATA.
In an embodiment, the gamma reference voltage generator 400 may be disposed in the driving controller 200 or may be disposed in the data driver 500, for example.
The data driver 500 may receive the second control signal CONT2 and the data signal DATA from the driving controller 200, and receive the gamma reference voltage VGREF from the gamma reference voltage generator 400. The data driver 500 may convert the data signal DATA into a data voltage having an analog type using the gamma reference voltage VGREF. The data driver 500 may output the data voltage to the data line DL.
The emission driver 600 may generate emission signals for driving the emission lines EML in response to the fourth control signal CONT4 received from the driving controller 200. The emission driver 600 may output the emission signals to the emission lines EML.
In an embodiment, the emission driver 600 may be integrated into the peripheral area of the display panel 100. In an embodiment, the emission driver 600 may be disposed (e.g., mounted) on the peripheral area of the display panel 100.
In
Referring to
In an embodiment, as shown in
The first active period AC1 may have the same length as that of the second active period AC2, and the first blank period BL1 may have a length different from that of the second blank period BL2. In other words, a frame cycle of the second driving frequency may be different from a frame cycle of the first driving frequency.
The second active period AC2 may have the same length as that of the third active period AC3, and the second blank period BL2 may have a length different from that of the third blank period BL3. In other words, a frame cycle of the third driving frequency may be different from the frame cycle of the second driving frequency.
Referring to
The first transistor T1 (that is, a driving transistor) may include a gate electrode connected to a first node N1, a first electrode connected to a second node N2, and a second electrode connected to a third node N3.
The second transistor T2 may include a gate electrode to which a data write gate signal GW is applied, a first electrode to which a data voltage VDATA is applied, and a second electrode connected to the second node N2. The data voltage VDATA may be applied to the pixel P according to the data write gate signal GW.
The third transistor T3 may include a gate electrode to which a compensation gate signal GC is applied, a first electrode connected to the first node N1, and a second electrode connected to the third node N3. A threshold voltage of the first transistor T1 may be compensated according to the compensation gate signal GC.
The fourth transistor T4 may include a gate electrode to which a data initialization gate signal GI is applied, a first electrode to which an initialization voltage VINIT is applied, and a second electrode connected to the first node N1. According to the data initialization gate signal GI, the gate electrode of the first transistor T1 may be initialized to the initialization voltage VINIT.
The fifth transistor T5 may include a gate electrode to which an emission signal EM is applied, a first electrode to which a first driving voltage ELVDD is applied, and a second electrode connected to the second node N2.
The sixth transistor T6 may include a gate electrode to which the emission signal EM is applied, a first electrode connected to the third node N3, and a second electrode connected to an anode electrode of the light-emitting element EE.
The seventh transistor T7 may include a gate electrode to which a light-emitting element initialization gate signal GB is applied, a first electrode to which a light-emitting element initialization voltage VAINIT is applied and a second electrode connected to the anode electrode of the light-emitting element EE. The anode electrode of the light-emitting element EE may be initialized to the light-emitting element initialization voltage VAINIT according to the light-emitting element initialization gate signal GB.
The light-emitting element EE may include the anode electrode and a cathode electrode to which a second driving voltage ELVSS is applied. The second driving voltage ELVSS may be lower than the first driving voltage ELVDD.
The pixel P may further include a storage capacitor CST including a first electrode to which the first driving voltage ELVDD is applied and a second electrode connected to the first node N1. The storage capacitor CST may store a voltage corresponding to the data voltage VDATA.
A driving current ID of the pixel P may sequentially flow to the fifth transistor T5, the first transistor T1 and the sixth transistor T6 to drive the light-emitting element EE. A luminance of the light-emitting element EE may be determined by intensity of the driving current ID. The intensity of the driving current ID may be determined by a level of the data voltage VDATA. The level of the data voltage VDATA may be determined by an input grayscale IG and an output grayscale OG. As shown in a 2.2 gamma curve of
When all of the transistors included in the pixel P are P-type transistors, flicker may occur due to leakage currents of the transistors in low-frequency driving. Accordingly, some of the transistors included in the pixel P may be N-type transistors. In the illustrated embodiment, the third transistor T3 and the fourth transistor T4 may be the N-type transistors, and the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7 may be the P-type transistors. However, the disclosure is not limited thereto. The disclosure may be applied to a pixel including only the P-type transistor or may be applied to a pixel including only the N-type transistor.
Referring to
When the driving frequency of the display panel 100 is changed from the high frequency DFH to the low frequency DFL, a hysteresis characteristic of the driving transistor T1 may be changed. The hysteresis characteristic of the driving transistor T1 may refer to a driving current ID according to a gate-source voltage of the driving transistor T1. Thus, when the hysteresis characteristic of the driving transistor T1 is changed, the display panel 100 according to the same input grayscale IG may have a different luminance. The luminance difference of the display panel 100 may be visually recognized as a flicker to a user.
Specifically, since the hysteresis characteristic of the driving transistor T1 is not changed in the last high frequency frame DFH_FRL having the high frequency DFH, an optical waveform of the last high frequency frame DFH_FRL may be an optical waveform G1 in which a flicker of the high frequency DFH is not visually recognized. A peak luminance of the last high frequency frame DFH_FRL may be a peak luminance DF1_PL of the optical waveform G1 in which the flicker of the high frequency DFH is not visually recognized. When the area of the optical waveform of the last high frequency frame DFH_FRL is divided by the frame cycle of the high frequency DFH, an average luminance of the last high frequency frame DFH_FRL may be calculated, as shown in
Since the hysteresis characteristic of the driving transistor T1 is changed in a first low frequency frame DFL_FR1 having the low frequency DFL, an optical waveform of the first low frequency frame DFL_FR1 may be an optical waveform G2′ in which the flicker of the low frequency DFL is visually recognized. A peak luminance of the first low frequency frame DFL_FR1 may be a peak luminance DF2_PL′ of the optical waveform G2′ in which the flicker of the low frequency DFL is visually recognized. When the area of the optical waveform of the first low frequency frame DFL_FR1 is divided by the frame cycle of the low frequency DFL, an average luminance of the first low frequency frame DFL_FR1 may be calculated, as shown in
Since the hysteresis characteristic of the driving transistor T1 is recovered in a second low frequency frame DFL_FR2 having the low frequency DFL, an optical waveform of a second low frequency frame DFL_FR2 may be an optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized. A peak luminance of the second low frequency frame DFL_FR2 may be the peak luminance DF1_PL of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized. When the area of the optical waveform of the second low frequency frame DFL_FR2 is divided by the frame cycle of the low frequency DFL, an average luminance of the second low frequency frame DFL_FR2 may be calculated, as shown in
Accordingly, when the driving frequency of the display panel 100 is changed from the high frequency DFH to the low frequency DFL, the hysteresis characteristic of the driving transistor T1 in the first low frequency frame DFL_FR1 may be changed, and the peak luminance of the first low frequency frame DFL_FR1 may be greater than the peak luminance DF2_PL of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized. In addition, an area difference between the area of the optical waveform of the first low frequency frame DFL_FR1 and the area of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized may be visually recognized as the flicker to the user. When an area difference LUM_AREA_DIFF between the area of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized and the area of the optical waveform G2′ in which the flicker of the low frequency DFL is visually recognized is divided by the frame cycle of the low frequency DFL, a luminance difference LUM_DIFF of the first low frequency frame DFL_FR1 may be calculated.
A difference between the peak luminance DF2_PL′ of the optical waveform G2′ in which the flicker of the low frequency DFL is visually recognized and the peak luminance DF2_PL of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized may be also referred to as a peak luminance difference PL_DIFF.
Referring to
Since the peak luminance of the first low frequency frame DFL_FR1 is greater than the peak luminance DF2_PL of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized, the driving controller 200 may compensate for the input grayscale IG by decreasing the input grayscale IG. Thus, the output grayscale OG of the first low frequency frame DFL_FR1 may be less than the input grayscale IG. In an embodiment, the input grayscale IG may be 128 grayscales, and the output grayscale OG of the first low frequency frame DFL_FR1 may be 126 grayscales, for example. Thus, a difference between the input grayscale IG and the output grayscale OG may be also referred to as a compensation grayscale CG, and the compensation grayscale CG of the first low frequency frame DFL_FR1 may be 2 grayscales.
The compensation grayscale CG of the first low frequency frame DFL_FR1 may correspond to the luminance difference LUM_DIFF (refer to
Referring to
In an embodiment, the high frequency DFH may be 120 Hz and the low frequency DFL may be 90 Hz, in which the frequency interval FI may be 30 Hz, for example. In an embodiment, the input grayscale IG may be 128 grayscales, in which the reference frequency interval FI_REF may be 40 Hz, for example. In other words, the frequency interval FI may be less than the reference frequency interval FI_REF.
When the frequency interval FI is decreased, the difference between the frame cycle of the high frequency DFH and the frame cycle of the low frequency DFL may be decreased, and the peak luminance difference PL_DIFF may be decreased. Since the peak luminance difference PL_DIFF is decreased, the area difference LUM_AREA_DIFF between the area of the optical waveform G2 in which the flicker of the low frequency DFL is not visually recognized and the area of the optical waveform G2′ in which the flicker of the low frequency DFL is visually recognized may be decreased, and the luminance difference LUM_DIFF (refer to
Referring to
In an embodiment, the high frequency DFH may be 120 Hz and the low frequency DFL may be 48 Hz, in which the frequency interval FI may be 72 Hz, for example. In an embodiment, the input grayscale IG may be 128 grayscales, in which the reference frequency interval FI_REF may be 40 Hz, for example. In other words, the frequency interval FI may be greater than the reference frequency interval FI_REF.
When the frequency interval FI is greater, the average luminance of the first low frequency frame DFL_FR1 may be greater. When the difference between the average luminance and the target luminance TL of the first low frequency frame DFL_FR1 is greater, the compensation grayscale CG of the first low frequency frame DFL_FR1 may be greater. In an embodiment, the input grayscale IG may be 128 grayscales, and the output grayscale OG of the first low frequency frame DFL_FR1 may be 124 grayscales, for example. In other words, the compensation grayscale CG of the first low frequency frame DFL_FR1 may be 4 grayscales.
The output grayscale OG of the second low frequency frame DFL_FR2 may be greater than or equal to the output grayscale OG of the first low frequency frame DFL_FR1 and less than or equal to the input grayscale IG. When the output grayscale OG of the second low frequency frame DFL_FR2 is less than the input grayscale IG, the grayscale compensation operation may be performed by the driving controller 200. In contrast, when the output grayscale OG of the second low frequency frame DFL_FR2 is the same as the input grayscale IG, the grayscale compensation operation may not be performed by the driving controller 200. In particular, when the grayscale compensation operation is performed in the first low frequency frame DFL_FR1 and the second low frequency frame DFL_FR2, the output grayscale OG may be gradually increased toward the input grayscale IG in the first low frequency frame DFL_FR1 and the second low frequency frame DFL_FR2.
When the frequency interval FI is greater, the average luminance of the second low frequency frame DFL_FR2 may be greater. When the difference between the average luminance and the target luminance TL of the second low frequency frame DFL_FR2 is greater, the compensation grayscale CG of the second low frequency frame DFL_FR2 may be greater. In an embodiment, the input grayscale IG may be 128 grayscales, and the output grayscale OG of the second low frequency frame DFL_FR2 may be 126 grayscales, for example. In other words, the compensation grayscale CG of the second low frequency frame DFL_FR2 may be 2 grayscales.
Referring to
The luminance difference LUM_DIFF (refer to
Referring to
In an embodiment, as illustrated in
The processor 1010 may perform various computing functions. The processor 1010 may be a micro processor, a central processing unit (“CPU”), an application processor (“AP”), or the like. The processor 1010 may be coupled to other components via an address bus, a control bus, a data bus, or the like. Further, the processor 1010 may be coupled to an extended bus such as a peripheral component interconnection (“PCI”) bus.
The memory device 1020 may store data for operations of the electronic device 1000. In an embodiment, the memory device 1020 may include at least one non-volatile memory device such as an erasable programmable read-only memory (“EPROM”) device, an electrically erasable programmable read-only memory (“EEPROM”) device, a flash memory device, a phase change random access memory (“PRAM”) device, a resistance random access memory (“RRAM”) device, a nano floating gate memory (“NFGM”) device, a polymer random access memory (“PoRAM”) device, a magnetic random access memory (“MRAM”) device, a ferroelectric random access memory (“FRAM”) device, or the like and/or at least one volatile memory device such as a dynamic random access memory (“DRAM”) device, a static random access memory (“SRAM”) device, a mobile DRAM device, or the like, for example.
The storage device 1030 may include a solid state drive (“SSD”) device, a hard disk drive (“HDD”) device, a compact disc read-only memory (“CD-ROM”) device, or the like.
The I/O device 1040 may include an input device such as a keyboard, a keypad, a mouse device, a touch-pad, a touch-screen, or the like, and an output device such as a printer, a speaker, or the like. In some embodiments, the I/O device 1040 may include the display device 1060.
The power supply 1050 may provide power for operations of the electronic device 1000.
The display device 1060 may be connected to other components through buses or other communication links.
The inventive concepts may be applied to any display device and any electronic device including the touch panel. In an embodiment, the inventive concepts may be applied to a mobile phone, a smart phone, a tablet computer, a digital television (“TV”), a three dimensional (“3D”) TV, a PC, a home appliance, a laptop computer, a personal digital assistant (“PDA”), a portable multimedia player (“PMP”), a digital camera, a music player, a portable game console, a navigation device, etc., for example.
The foregoing is illustrative of the inventive concept and is not to be construed as limiting thereof. Although a few embodiments of the inventive concept have been described, those skilled in the art will readily appreciate that many modifications are possible in the embodiments without materially departing from the novel teachings and advantages of the inventive concept. Accordingly, all such modifications are intended to be included within the scope of the inventive concept as defined in the claims. In the claims, means-plus-function clauses are intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. Therefore, it is to be understood that the foregoing is illustrative of the inventive concept and is not to be construed as limited to the illustrative embodiments disclosed, and that modifications to the disclosed embodiments, as well as other embodiments, are intended to be included within the scope of the appended claims. The inventive concept is defined by the following claims, with equivalents of the claims to be included therein.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2023-0127904 | Sep 2023 | KR | national |
