Patent Grant
7782315
1. Field of the Invention
The present invention relates to a method of driving a display device and to a display device using the driving method, and more particularly to a method of driving an active matrix semiconductor display device having thin-film transistors (TFTs) fabricated over an insulating substrate. In addition, the present invention relates to an active matrix semiconductor display device using the driving method, and more particularly to an active matrix liquid crystal display device which is one type of active matrix semiconductor display device. The present invention is also applicable to a passive matrix type display device.
2. Description of Related Art
The art of forming semiconductor thin films over an inexpensive glass substrate and fabricating thin-film transistors (TFTs) has recently been making rapid progress. The reason for this is that a demand for active matrix liquid crystal display devices (liquid crystal panels) has been increasing.
In general, in an active matrix liquid crystal display device, pixel TFTs are respectively arranged in at least several tens of pixel areas up to a maximum of several millions of pixel areas which are arranged in a matrix form (this circuit is called active matrix circuit), and electric charges which flow into and out of pixel electrodes located in the respective pixel areas are controlled by the switching function of the pixel TFTs.
The active matrix circuit has conventionally used thin-film transistors which use amorphous silicon formed over a glass substrate.
An active matrix liquid crystal display device which uses thin-film transistors using a polycrystalline silicon film formed over a quartz substrate has recently been realized. In this case, a peripheral driving circuit for driving pixel TFTs can be fabricated on the same substrate as an active matrix circuit.
The art of using a technique such as laser annealing to form a polycrystalline silicon film over a glass substrate and fabricate thin-film transistors is also known. The use of this art makes it possible to integrate an active matrix circuit and a peripheral driving circuit on one glass substrate.
In recent years, active matrix liquid crystal display devices have been widely used as display devices for personal computers. In addition, large-screen active matrix liquid crystal display devices have been becoming used in not only notebook types of personal computers but also desktop types of personal computers.
In addition, attention is becoming drawn to projectors using small-sized active matrix liquid crystal display devices having high definition, high resolution and high image quality. Among such projectors, projectors for high-definition televisions which can display higher-resolution video images are drawing more attention.
CRTs have heretofore been used in the above-described personal computers and projectors. However, if CRTs are used, problems such as power consumption, volume and weight become serious according to the requirements for the sizes and resolutions of screens. For this reason, it has been considered that the aforesaid active matrix liquid crystal display devices replace CRTs which have heretofore been primarily used. However, it has been pointed out that if a conventional active matrix liquid crystal display device and a CRT display images at the same resolution, the conventional active matrix liquid crystal display device is lower in horizontal resolution than the CRT.
As described above, the conventional active matrix liquid crystal display devices are lower in horizontal resolution than CRTs which conform to the same standards, so that it is difficult for the conventional active matrix liquid crystal display devices to reproduce images with high quality similar to that of CRTs.
Passive matrix liquid crystal display devices are regarded as inferior in image quality to active matrix liquid crystal display devices, but, in various fields, there are demands for passive matrix liquid crystal display devices in that they are simple in structure and inexpensive. However, the current passive matrix liquid crystal display devices have not yet achieved image quality comparable to that of active matrix liquid crystal display devices.
The present invention has been made in view of the above-described problems, and one object of the present invention is to realize an improvement in the horizontal resolution of an active matrix liquid crystal display device by using a novel driving method. Another object of the present invention is to realize an improvement in the image quality of a passive matrix liquid crystal display device by using a novel driving method.
According to the present invention, by supplying a modulated clock signal obtained by frequency modulating a reference clock signal at a constant period to a driving circuit of an active matrix semiconductor display device or to a driving circuit of a passive matrix semiconductor display device, signal information (the presence or absence of an edge, the extent of nearness) relative to the vicinity of the sampling of video signals (image signals) sampled on the basis of this modulated clock signal can be written to the corresponding pixels of the semiconductor display device as shading information. The driving method of the present invention makes use of a phenomenon which apparently makes the resolution of an image display higher owing to the shading information (visual Mach phenomenon and Craik-O'Brien phenomenon).
Methods of driving semiconductor display devices according to the present invention and the constructions of semiconductor display devices using the driving methods will be described below.
In accordance with a first aspect of the present invention, there is provided a method of driving a semiconductor display device, the method comprising the steps of:
frequency modulating a reference clock signal and obtaining a modulated clock signal;
sampling an image signal on the basis of the modulated clock signal; and
supplying the sampled image signal to a corresponding pixel and obtaining an image.
In accordance with a second aspect of the present invention, there is provided a method of driving a semiconductor display device, the method comprising the steps of:
frequency modulating a reference clock signal and obtaining a modulated clock signal;
performing sampling and A/D conversion on an analog image signal on the basis of the modulated clock signal and obtaining a digital image signal;
after performing digital signal processing on the digital image signal, performing D/A conversion on the digital image signal on the basis of the reference clock signal and obtaining an improved analog image signal; and
supplying the improved analog image signal to a corresponding pixel and obtaining an image.
In accordance with a third aspect of the present invention, there is provided a method of driving a semiconductor display device, the method comprising the steps of:
In accordance with a fourth aspect of the present invention, in the method of driving a semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal on the basis of a Gaussian histogram.
In accordance with a fifth aspect of the present invention, in the method of driving a semiconductor display device, the modulated clock signal may be obtained by randomly shifting a frequency of the reference clock signal.
In accordance with a sixth aspect of the present invention, in the method of driving a semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal in the form of a sine wave.
In accordance with a seventh aspect of the present invention, in the method of driving a semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal in the form of a triangular wave.
In accordance with an eighth aspect of the present invention, there is provided a semiconductor display device comprising:
an active matrix circuit having a plurality of thin-film transistors arranged in a matrix form; and
a source signal line-side driving circuit and a gate signal line-side driving circuit for driving the active matrix circuit,
wherein a modulated clock signal obtained by frequency modulating a reference clock signal is inputted to the source signal line-side driving circuit, while a fixed clock signal is inputted to the gate signal line-side driving circuit.
In accordance with a ninth aspect of the present invention, there is provided a semiconductor display device comprising:
an active matrix circuit having a plurality of thin-film transistors arranged in a matrix form; and
a source signal line-side driving circuit and a gate signal line-side driving circuit for driving the active matrix circuit,
wherein a modulated clock signal obtained by frequency modulating a reference clock signal is inputted to the source signal line-side driving circuit, while a modulated clock signal which differs from the modulated clock signal in quantity of frequency shifting or method of frequency modulation is inputted to the gate signal line-side driving circuit.
In accordance with a tenth aspect of the present invention, there is provided a semiconductor display device comprising a passive matrix circuit, wherein an image signal sampled on the basis of a modulated clock signal obtained by frequency modulating a reference clock signal is inputted to a signal electrode of the passive matrix circuit, and a fixed clock signal being inputted to a scanning electrode of the passive matrix circuit.
In accordance with an eleventh aspect of the present invention, there is provided a semiconductor display device comprising a passive matrix circuit, wherein an image signal sampled on the basis of a modulated clock signal obtained by frequency modulating a reference clock signal is inputted to a signal electrode of the passive matrix circuit, and a modulated clock signal which differs from the modulated clock signal in quantity of frequency shifting or method of frequency modulation is inputted to a scanning electrode of the passive matrix circuit.
In accordance with a twelfth aspect of the present invention, in the semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal on the basis of a Gaussian histogram.
In accordance with a thirteenth aspect of the present invention, in the semiconductor display device, the modulated clock signal may be obtained by randomly shifting a frequency of the reference clock signal.
In accordance with a fourteenth aspect of the present invention, in the semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal in the form of a sine wave.
In accordance with a fifteenth aspect of the present invention, in the semiconductor display device, the modulated clock signal may be obtained by shifting a frequency of the reference clock signal in the form of a triangular wave.
The above and other objects, features and advantages of the present invention will become apparent from the following detailed description of preferred embodiments of the present invention, taken in conjunction with the accompanying drawings.
The driving method according to the present invention will be described below in due order. First, reference will be made to
Then, reference will be made to
The video signals on the respective lines are sampled by a reference clock signal. In this driving method, the video signals are sampled at the rise time and the fall time of each pulse of the reference clock signal. Image information is written to pixels of the semiconductor display device by the sampled video signals so that a video image is displayed on the entire screen. In the screen image, pixels which are displayed in black are the pixels to which the image information is written. In this manner, in the active matrix semiconductor display device, an image is obtained as a set of the image information written to the pixels. In general, the display of an image on the active matrix semiconductor display device is realized by performing writing of such image information by thirty to sixty times per second.
A modulated clock signal which is used in the driving method according to the present invention will be described below. The reference clock signal operates at a constant frequency, whereas the modulated clock signal is a clock signal which shifts in frequency at a certain constant period, i.e., a signal which is frequency-modulated. Incidentally, the modulated clock signal is described in detail in the document “Frequency Modulation of System Clocks for EMI Reduction” (Hewlett-Packard Journal, August 1997, Pages 101 to 106). However, this document only describes the art of reducing EMI (electromagnetic interference) of clock signals by using a modulated clock signal in the field of integrated circuits.
Incidentally, the driving method according to the present invention can also use any type of modulated clock signal obtainable by frequency modulation of a reference clock signal which serves as a reference. Accordingly, the driving method according to the present invention can also use a modulated clock signal due to any method other than the method of the above-cited document and the like.
The driving method according to the present invention will be described below in terms of a modulated clock signal frequency modulated at a certain constant frequency. First, reference will be made to
If the frequency of the reference clock signal is 100%, the modulated clock signal is subjected to a frequency shift of about +67% to about −29%.
Then, reference will be made to
The video signals sig. 1 to sig. 14 on the respective lines are sampled at the rise times and the fall times of pulses of the modulated clock signal, and the sampled signals are written to the corresponding pixels as image information.
First, during the first frame, the video signals sig. 1 to sig. 14 on the respective lines are sampled at the pulse timing of a modulated clock signal 1, and the obtained image information is written to the corresponding pixels. Then, during the second frame, the video signals sig. 1 to sig. 14 on the respective lines are sampled at the pulse timing of a modulated clock signal 2, and the obtained image information is written to the corresponding pixels. The modulated clock signal 1 and the modulated clock signal 2 are shifted by a 1/10 period. Furthermore, during the third frame, the video signals sig. 1 to sig. 14 on the respective lines are sampled at the pulse timing of a modulated clock signal 3, and the obtained image information is written to the corresponding pixels. The modulated clock signal 2 and the modulated clock signal 3 are shifted by a 1/10 period. In this manner, the sampling of the video signals for the first to tenth frames and the writing of image information to the corresponding pixels are performed in order.
An image displayed on the screen when the image information for ten frames is written is shown in a lower portion of
An image having shading information in its outline portion in the above-described manner can be viewed by an observer as an image displayed with enhanced resolution, owing to the previously-described visual Mach phenomenon and Craik-O'Brien phenomenon.
It is to be noted that the period of frequency modulation and the amount of frequency shifting of the modulated clock signal can be arbitrarily set. For example, it is possible to use a modulated clock signal whose amount of frequency shifting varies like a sine or triangular wave with respect to the time axis or a modulated clock signal whose amount of frequency shifting varies completely randomly with respect to the time axis.
The driving method according to the present invention and specific examples of a semiconductor device using the driving method will be described below with reference to preferred embodiments of the present invention. However, the present invention is not limited to only embodiments which will be described below.
In the description of the present embodiment, reference will be made to an active matrix liquid crystal display device as one example of a semiconductor display device for which a driving method of a semiconductor display device according to the present invention can be used.
Reference will be made to
Then, reference will be made to
Inputted to the source signal line-side driving circuit 501 are a modulated clock signal (m-CLK), an inverted signal (m-CLKb) of the modulated clock signal, a start pulse (SP) and a leftward/rightward scan switching signal (SL/R).
When the shift register circuit 600 operates in response to the modulated clock signal (m-CLK), the inverted signal (m-CLKb) of the modulated clock signal, the start pulse (SP) and the leftward/rightward scan switching signal (SL/R) all of which are externally inputted, and the leftward/rightward scan switching signal (SL/R) goes to its high level, signals for sampling video signals are outputted from the NAND circuits 603 in the order of from left to right. The source signal line-side driving circuit 501 of the present embodiment outputs in order signals for sampling video signals at the rise times and the fall times of the modulated clock pulse, as described previously in connection with the embodiment of the present invention. The voltage levels of the signals for sampling the video signals are respectively shifted to their higher voltages by the level shifter circuits 604 and are inputted to analog switches 605. The respective analog switches 605 sample the video signals supplied from the video signal lines in response to the input of the sampling signals, and supply the sampled signals to source signal lines (S1 to S4 to S1280 (not shown)). The video signals supplied to the source signal lines are supplied to the thin-film transistors of the corresponding pixels.
Incidentally, W42C31-09 or the like made by IC WORKS, Inc. is available as a module for producing a modulated clock signal.
The circuit construction of the gate signal line-side driving circuit 502 of the active matrix liquid crystal display device of the present embodiment will be described below. Referring to
When the shift register circuit 800 operates in response to a clock signal (CLK) and the start pulse (SP) both of which are externally inputted, signals for making selection from the gate signal lines 507 are outputted from the NAND circuits in the order of from left to right.
A method of fabricating the active matrix liquid crystal display device described above in the description of the present embodiment will be described below.
Referring to
It is to be noted that it is important to thoroughly control the concentration of impurities in the amorphous silicon film 903 during the formation thereof. In the case of the present embodiment, in the amorphous silicon film 903, each of the concentrations of C (carbon) and N (nitrogen) which are impurities to impede later crystallization is controlled to become less than 5×1018 atoms/cm3 (representatively, not greater than 5×1017 atoms/cm3, preferably, not greater than 2×1017 atoms/cm3), and the concentration of O (oxygen) is controlled to become less than 1.5×1019 atoms/cm3 (representatively, not greater than 1×1018 atoms/cm3, preferably, not greater than 5×1017 atoms/cm3). This is because if the respective impurities are present at concentrations not less than these concentrations, the impurities adversely affect later crystallization and lower the quality of the film after crystallization. In the present specification, the concentrations of the above-noted impurity elements in the film are defined as minimum values in the result of measurement by SIMS (secondary ion mass spectroscopy).
To obtain the above-described construction, it is preferable to periodically dry-clean a reduced-pressure thermal CVD reactor used in the present embodiment and make a film forming chamber clean. In the dry cleaning of the reactor, 100-300 sccm of ClF3 (chlorine fluoride) gas is made to flow in the reactor heated to approximately 200-400° C., and cleaning of the film forming chamber may be performed by using fluorine generated by thermal decomposition.
According to the knowledge of the present applicant, if the inside temperature of the reactor is set to 300° C. and the flow rate of ClF3 gas is set to 300 sccm, deposited foreign matter (which essentially consists of silicon) of thickness about 2 μm can be completely removed in four hours.
The concentration of hydrogen in the amorphous silicon film 903 is also a very important parameter, and it appears that as the hydrogen content is made smaller, the crystallinity of the amorphous silicon film 903 becomes better. For this reason, it is preferable that a reduced-pressure thermal CVD method be used to form the amorphous silicon film 903. Incidentally, if the formation conditions for the amorphous silicon film 903 are optimized, it is also possible to use a plasma CVD method.
Then, the step of crystallizing the amorphous silicon film 903 is performed. The art described in Japanese Patent Laid-Open No. 130652/1995 is used as crystallization means. Although either of Embodiment 1 and Embodiment 2 disclosed in Japanese Patent Laid-Open No. 130652/1995 may be used, it is preferable that the present embodiment make use of the art contents described in Embodiment 2 (which are described in detail in Japanese Patent Laid-Open No. 78329/1996).
According to the art of Japanese Patent Laid-Open No. 78329/1996, first, a mask insulating film 904 for selecting regions in which to add a catalytic element is formed to have a thickness of 150 nm. The mask insulating film 904 has a plurality of apertures through which to add the catalytic element. The location of crystalline regions can be determined by the locations of the apertures (
Then, a solution 905 which contains nickel (Ni) (an Ni acetate ethanol solution) is applied as a catalytic element which promotes the crystallization of the amorphous silicon film 903, by a spin coating method. Incidentally, it is also possible to use a catalytic element other than nickel, such as cobalt (Co), iron (Fe), palladium (Pd), germanium (Ge), platinum (Pt), copper (Cu) and gold (Au).
The above-described catalytic-element adding step can also use an ion implantation method using a resist mask or a plasma doping method. Either of the methods is an art effective in forming a scaled circuit, because it is easy to realize a decrease in the area occupied by regions in which the catalytic element is added as well as control of a growth distance of a horizontal growth region to be described later.
When the catalytic-element adding step is completed, discharge of hydrogen is continued at 450° C. for approximately 1 hour. After that, the crystallization of the amorphous silicon film 903 is performed by heat treatment of 4-24 hours at a temperature of 500-960° C. (representatively, 550-650° C.) in an inert atmosphere, a hydrogen atmosphere or an oxygen atmosphere. In the present embodiment, heat treatment of 570° C. for 14 hours is performed in a nitrogen atmosphere.
At this time, the crystallization of the amorphous silicon film 903 preferentially proceeds from nuclei which have occurred in regions 906 in which nickel has been added, whereby crystalline regions 907 made from a polycrystalline silicon film which have grown approximately in parallel with the substrate surface of the substrate 901 are formed. These crystalline regions 907 are called horizontal growth regions. The horizontal growth regions have the advantage of total superior crystallinity because individual crystals gather in a comparatively orderly state.
Incidentally, it is also possible to crystallize the amorphous silicon film 903 by applying a Ni acetate ethanol solution to the entire surface of the same without using the mask insulating film 904.
Reference will be made to
The dose of phosphorus is preferably approximately 1×1014 to 1×1015 ions/cm2. In the present embodiment, doping is performed with a dose of 5×1014 ions/cm2 by using an ion doping machine.
Incidentally, during the ion doping, acceleration voltage is 10 keV. With an acceleration voltage of 10 keV, phosphorus can hardly pass through the mask insulating film 904 of thickness 150 nm.
Reference will be made to
The step of patterning the polycrystalline silicon film will be described below with reference to
Reference will be made to
Incidentally, at this stage, the heat treatment for gettering the catalytic element (a catalytic-element gettering process) may also be performed. In this case, the heat treatment makes use of a catalytic-element gettering effect due to a halogen element in a treatment atmosphere which contains the halogen element. It is to be noted that the heat treatment is preferably performed at a temperature exceeding 700° C. so that the catalytic-element gettering effect due to the halogen element can be fully obtained. At a temperature of 700° C. or lower, there is a risk that halogen compounds in the treatment atmosphere become difficult to decompose and the gettering effect becomes impossible to obtain. In this case, representatively, one or plural kinds of gases selected from halogen-containing compounds such as HCl, HF, NF3, HBr, Cl2, ClF3, BCl2, F2 and Br2 can be used as a gas which contains the halogen element. In this step, it is considered that, for example, if HCl is used, nickel in the active layers is gettered by the action of chlorine and is removed by vaporizing into the atmosphere as volatile nickel chloride. If the halogen element is used in the catalytic-element gettering process, the catalytic-element gettering process may also be performed before the active layers are patterned after the mask insulating film 904 is removed. Otherwise, the catalytic-element gettering process may also be performed after the active layers are patterned. In addition, these gettering processes may be arbitrarily combined.
Then, a metallic film (not shown) which essentially consists of aluminum is formed and the original forms of gate electrodes to be described later are formed by patterning. In the present embodiment, an aluminum film which contains 2 wt % scandium is used.
Otherwise, the gate electrodes may be formed by a polycrystalline silicon film to which an impurity for imparting electrical conductivity is added.
Then, the art described in Japanese Patent Laid-Open No. 135318/1995 is used to form porous anodic oxide films 913 to 920, non-porous anodic oxide films 921 to 924 and gate electrodes 925 to 928 (
After the state shown in
Reference will be made to
In the present embodiment, the step of adding an impurity for forming N-channel TFTs and the step of adding an impurity for forming P-channel TFTs are respectively performed as two separate steps.
First, the step of adding an impurity for forming N-channel type TFTs is performed. A first impurity adding step (which uses P (phosphorus) in the present embodiment) is performed at a high acceleration voltage of approximately 80 keV, thereby forming n-regions. These n-regions are adjusted so that the concentration of P ions becomes 1×1018 atoms/cm3 to 1×1019 atoms/cm3.
Then, a second impurity adding step is performed at a low acceleration voltage of approximately 10 keV, thereby forming n+ regions. At this time, since the acceleration voltage is low, the gate insulating films function as a mask. These n+ regions are adjusted so that its sheet resistance becomes 500Ω or less (preferably, 300Ω or less).
Through the above-described steps, a source region 932 and a drain region 933 of an N-channel TFT which constitutes a CMOS circuit, low-concentration impurity regions 936 and a channel type formation region 939 are formed. In addition, a source region 934 and a drain region 935 of an N-channel TFT which constitutes a pixel TFT, low-concentration impurity regions 937, 938 and channel type formation regions 940 and 941 are formed (
Incidentally, in the state shown in
Then, as shown in
Although this step is performed in two separate steps similarly to the above-described impurity adding step, B (boron) ions are added at a concentration several times as high as that of the above-described P ions because it is necessary to invert an N-channel type to a P-channel type.
In this manner, a source region 943 and a drain region 944 of the P-channel TFT which constitutes a CMOS circuit, a low-concentration impurity region 945 and a channel formation region 946 are formed (
If the gate electrodes are formed of a polycrystalline silicon film to which an impurity for imparting electrical conductivity is added, a known sidewall structure may be used to form the low-concentration impurity regions.
Then, activation of impurity ions are performed by a combination of furnace annealing, laser annealing, lamp annealing and the like. At the same time, damage caused to the active layers in the adding steps is repaired.
Reference will be made to
Reference will be made to
Then, part of the second interlayer insulating film 953 is etched, and a black matrix 954 is formed above the drain electrode 952 of the pixel TFT with the second interlayer insulating film 953 interposed therebetween. In the present embodiment, Ti (titanium) is used for the black matrix 954. Incidentally, in the present embodiment, an auxiliary capacitor is formed between the pixel TFT and the black matrix 954. A third interlayer insulating film 955 is formed. Silicon oxide, silicon nitride or an organic resin such as polyimide or acrylic resin may be used.
Then, contact holes are formed in the second interlayer insulating film 953, and a pixel electrode 956 of thickness 120 nm is formed. Incidentally, since the present embodiment is an example of a transmission type of active matrix liquid crystal display device, a transparent conductive film such as ITO is used as a conductive film which constitutes the pixel electrode 956.
Then, the entire substrate is heated in a hydrogen atmosphere of 350° C. for 1-2 hours to effect hydrogenation of the entire device, thereby compensating for dangling bonds (unpaired electrons) in the film (particularly, in the active layers). Through the above-described steps, an active matrix substrate which has CMOS circuits and a pixel matrix circuit on one substrate is finished.
The process of fabricating an active matrix liquid crystal display device on the basis of the active matrix substrate fabricated through the above-described steps will be described below.
An alignment film 957 is formed over the active matrix substrate which is in the state shown in
Incidentally, in the present embodiment, a polyimide film is used as the alignment film 957. Incidentally, rubbing is performed after the alignment film 957 is formed. Incidentally, in the present embodiment, polyimide having a comparatively large pretilt angle is used for the alignment film 957.
Then, the active matrix substrate and the counter substrate which have passed through the above-described steps are bonded together with a seal material and a spacer (neither of which is shown) interposed therebetween, by a known cell assembly process. After that, a liquid crystal 961 is charged between both substrates, and they are completely sealed by a sealant (not shown). In the present embodiment, a nematic liquid crystal is used as the liquid crystal 961.
Thus, a transmission type of active matrix liquid crystal display device such as that shown in
Incidentally, the crystallization of the amorphous silicon film 903 may be performed with a laser beam (representatively, an excimer laser beam) instead of the amorphous-silicon-film crystallizing method described above in connection with the present embodiment.
In the description of the present embodiment, reference will be made to an example in which inverted stagger TFTs are used for an active matrix liquid crystal display device which can realize the driving method according to the present invention.
Reference will be made to
Reference numeral 1301 denotes a substrate, and a substrate such as that described above in connection with Embodiment 1 is used as the substrate 1301. Reference numeral 1302 denotes a silicon oxide film. Reference numeral 1303 denotes a gate electrode. Reference numeral 1304 denotes a gate insulating film. Reference numerals 1305, 1306, 1307 and 1308 denote active layers made from a polycrystalline silicon film. In the fabrication of these active layers 1305, 1306, 1307 and 1308, a method which is similar to the polycrystallization of an amorphous silicon film described above in connection with Embodiment 1 is used. It is also possible to adopt a method of crystallizing an amorphous silicon film by means of a laser beam (preferably, a linear laser beam or a planar laser beam). In
In the description of the present embodiment, reference will be made to an example in which an active matrix liquid crystal display device is made of inverted stagger TFTs which differ in construction from those of Embodiment 3.
Reference will be made to
Reference numeral 1401 denotes a substrate, and a substrate such as that described above in connection with Embodiment 1 is used as the substrate 1401. Reference numeral 1402 denotes a silicon oxide film. Reference numeral 1403 denotes a gate electrode. Reference numeral 1404 denotes a benzodiclobutene (BCB) film whose top surface is flattened. Reference numeral 1405 denotes a silicon nitride film. The BCB film 1404 and the silicon nitride film 1405 constitute a gate insulating film. Reference numerals 1406, 1407, 1408 and 1409 denote active layers made from a polycrystalline silicon film. In the fabrication of these active layers 1406, 1407, 1408 and 1409, a method which is similar to the polycrystallization of an amorphous silicon film described above in connection with Embodiment 1 is used. It is also possible to adopt a method of crystallizing an amorphous silicon film by means of a laser beam (preferably, a linear laser beam or a planar laser beam). In
According to the present embodiment, since the gate insulating film made of the BCB film and the silicon nitride film is flattened, the amorphous silicon film formed over the gate insulating film is also flattened. Accordingly, in the poly-crystallization of the amorphous silicon film, it is possible to obtain a polycrystalline silicon film more uniform than in a conventional inverted stagger TFT.
In the description of the present embodiment, reference will be made to a driving method for format conversion which displays an image signal which conforms to a low-resolution standard such as VGA (640×480 pixels) or SVGA (800×600 pixels), on an active matrix liquid crystal display device which conforms to a high-resolution standard such as SXGA (1280×1024 pixels).
For example, consideration will be given to a case in which an image signal which conforms to VGA (640×480 pixels) is displayed on an active matrix liquid crystal display device which conforms to SXGA (1280×1024 pixels). In the driving method of the present embodiment, a modulated clock signal is supplied to not only a source signal line-side driving circuit but also a gate signal line-side driving circuit.
Reference will be made to
As shown in
In addition, in the case where modulated clocks are inputted to the source signal line-side driving circuit 1801 and the gate signal line-side driving circuit 1802 to execute format conversion of the screen, fixed clocks may be used for writing an image to the central portion of the screen, and an image size may also be converted by frequency expansion or modulated clocks from the central portion of the screen toward the periphery thereof.
In the description of the present embodiment, reference will be made to a case in which a modulated clock signal is used in an active matrix liquid crystal display device having a digital driving circuit. In the active matrix liquid crystal display device of the present embodiment, an analog image signal such as a high-definition television signal or an NTSC signal to be externally supplied is converted into a digital image signal by A/D conversion (analog/digital conversion). The sampling of the analog image signal during the A/D conversion is performed by using the modulated clock signal. The digital image signal is subjected to digital signal processing such as gamma correction and aperture control, and is then converted into an improved analog image signal by D/A conversion (digital/analog conversion) using a fixed clock. The improved analog image signal is written to its corresponding pixels. In this manner, the digital signal processing of an image signal can be effected, whereby an observer can obverse the image signal as an image with resolution which is apparently improved, as described above in connection with the aforesaid mode for carrying out the present invention as well as the aforesaid embodiments of the same.
The following method is available as another driving method according to the present embodiment. An analog image signal such as a high-definition television signal or an NTSC signal to be externally supplied is converted into a digital image signal by A/D conversion (analog/digital conversion) at sampling timing due to a fixed clock signal. The digital image signal is subjected to digital signal processing such as gamma correction and aperture control, and is then converted into an improved analog signal image by D/A conversion using a modulated clock signal. The improved analog image signal is written to its corresponding pixels. In this manner, the digital signal processing of an image signal can be effected, whereby an observer can observe the image signal as an image with resolution which is apparently improved, as described above in connection with the aforesaid mode for carrying out the present invention as well as the aforesaid embodiments of the same. In this driving method, the sampling of the analog image signal during the A/D conversion may also be performed with a modulated clock signal.
In the description of the present embodiment, reference will be made to a case in which the driving method using the modulated clock signal according to the present invention is used in a passive matrix liquid crystal display device
Reference will be made to
The modulated clock signal is inputted to the signal electrode driving circuit 2201, and the video signal is sampled and converted into a digital image signal A/D conversion by the modulated clock signal and the digital image signal is temporarily stored in a video memory as described previously in connection with the mode for carrying out the present invention. After that, the digital image signal may also be subjected to digital signal processing. Then, the digital image signal is D/A-converted into image information by the fixed clock signal, and the image information is written to its corresponding signal electrodes 2206. In addition, the fixed clock signal is inputted to the scanning electrode driving circuit 2202, and the scanning electrode driving circuit 2202 supplies scanning signals to the scanning electrodes 2205.
In the passive matrix liquid crystal display device of the present embodiment as well, since the outline portion of an image has shading information, it is possible to obtain effects similar to those obtainable in the active matrix liquid crystal display device of the above-described embodiment.
Incidentally, in the passive matrix liquid crystal display device of the present embodiment as well, it is possible to execute the format conversion method using a modulated clock which has previously been described as Embodiment 4. In this case, the modulated clock is also inputted to the scanning electrode driving circuit 2202.
In the active matrix liquid crystal display device or the passive matrix liquid crystal display device of the above-described embodiments, a TN mode using a nematic liquid crystal is used as a display mode, but another display mode can also be used.
Furthermore, a thresholdless antiferroelectric or ferroelectric liquid crystal with fast response time may be used to constitute an active matrix liquid crystal display device.
For example, it is possible to use liquid crystals which are disclosed in 1998, SID, “Characteristics and Driving Scheme of Polymer-Stabilized Monostable FLCD Exhibiting Fast Response Time and High Contrast Ratio with Gray-Scale Capability” by H. Furue et al.; 1997, SID DIGEST, 841, “A Full-Color Thresholdless Antiferroelectric LCD Exhibiting Wide Viewing Angle with Fast Response Time” by T. Yoshida et al.; 1996, J. Mater. Chem. 6(4), 671-673, “Thresholdless antiferroelectricity in liquid crystals and its application to displays” by S. Inui et al.; and U.S. Pat. No. 5,594,569.
A liquid crystal which exhibits an antiferroelectric phase in a particular temperature range is called an antiferroelectric liquid crystal. Among mixed liquid crystals which have antiferroelectric liquid crystals, there are thresholdless antiferroelectric mixed liquid crystals which exhibit electro-optic response characteristics which allow transmittance to continuously vary with respect to an electric field. Some thresholdless antiferroelectric mixed liquid crystals exhibit V-shaped electro-optic response characteristics, and it has been discovered that a thresholdless antiferroelectric mixed liquid crystal has a driving voltage of approximately ±2.5 V (cell thickness about 1 μm to 2 μm).
As shown in
If such a low-voltage drive thresholdless antiferroelectric mixed liquid crystal is used as an active matrix liquid crystal display device having the driving circuit of the present invention, the source voltage of an image signal sampling circuit can be reduced to, for example, approximately 5 V to 8 V. Thus, it is possible to lower the operating source voltage of a driver and realize higher reliability and lower power consumption in the active matrix liquid crystal display device.
Accordingly, the use of the low-voltage drive thresholdless antiferroelectric mixed liquid crystal is effective even in a case which uses TFTs each having an LDD region (low-concentration impurity region) of comparatively small width (for example, 0 nm to 500 nm or 0 nm to 200 nm).
In general, the thresholdless antiferroelectric mixed liquid crystal is large in spontaneous polarization and the dielectric constant of its liquid crystal itself is high. For this reason, if the thresholdless antiferroelectric mixed liquid crystal is used in the active matrix liquid crystal display device, each pixel needs a comparatively large storage capacity. Therefore, it is preferable to use a thresholdless antiferroelectric mixed liquid crystal having small spontaneous polarization.
It is to be noted that since low-voltage driving is realized by the use of the thresholdless antiferroelectric mixed liquid crystal, low power consumption is realized in the active matrix liquid crystal display device.
It is to be noted that any kind of liquid crystal having an electro-optic characteristic such as that shown in
In addition, any other kind of display medium whose optical characteristics can be modulated in response to applied voltage can be used in an active matrix semiconductor display device which uses the driving circuit according to the present invention. For example, an electroluminescence element or the like may be used.
In addition, instead of TFTs, MIM elements or the like may be used as active elements in an active matrix circuit of the active matrix liquid crystal display device.
An active matrix semiconductor display device or passive matrix semiconductor display device of the type which uses the driving circuit according to the present invention have various uses. In the description of the present embodiment, reference will be made to a semiconductor device in which is incorporated an active matrix semiconductor display device or passive matrix semiconductor display device (referred to as the semiconductor display device) which uses the driving circuit according to the present invention.
Such a semiconductor display device is known as a video camera, a still camera, a projector, a head-mounted display, a car navigation system, a personal computer, and a mobile information terminal (such as a mobile computer or a mobile telephone). One example of the semiconductor display device is shown in
As described above, the range of application of the present invention is extremely wide, and the present invention can be applied to all fields of electronic apparatuses. In addition, even if a construction made of a combination of any arbitrary ones of Embodiments 1 to 7 is used, it is possible to realize the electronic apparatuses of Embodiment 8.
In the description of the present embodiment, reference will be made to a fabrication method which differs from the method of fabricating the active matrix liquid crystal display device described previously in connection with Embodiment 1. Incidentally, an active matrix liquid crystal display device according to the present embodiment can be used as any of the active matrix liquid crystal display devices of Embodiments 1 to 8.
Reference will be made to
Then, a 30-nm-thick amorphous silicon film was formed on the silicon oxide film 5002 by a plasma CVD method, and after dehydrogenation, excimer laser annealing was executed to form a polysilicon film (a crystalline silicon film or a polycrystalline silicon film).
This crystallization step may use a known laser crystallization technique or thermal crystallization technique. In the present embodiment, a pulse oscillation type of KrF excimer laser was condensed into a linear shape to crystallize the amorphous silicon film.
Incidentally, in the present embodiment, the amorphous silicon film was formed as an initial film and was crystallized by laser annealing, thereby forming the polysilicon film. However, a microcrystalline silicon film may also be used as an initial film or the polysilicon film may also be directly formed. Of course, laser annealing may be applied to the formed polysilicon film. Furnace annealing may also be executed instead of laser annealing.
The thus-formed crystalline silicon film was patterned to form active layers 5003 and 5004 made from island-shaped silicon layers.
Then, a gate insulating film 5005 made of a silicon oxide film was formed to cover the active layers 5003 and 5004, and gate lines (including gate electrodes) 5006 and 5007 each made of a stacked structure of tantalum and tantalum nitride were formed on the gate insulating film 5005 (
The gate insulating film 5005 had a thickness of 100 nm. Instead of the silicon oxide film, it is possible to use a stacked structure of a silicon oxide film and a silicon nitride film or silicon oxide nitride film. Although another metal can be used for the gate lines 5006 and 5007, it is desirable to use a material having a high etching selection ratio with respect to silicon in a later step.
After the state shown in
The first impurity regions 5008 and 5009 were formed in a self-aligned manner by using the gate lines 5006 and 5007 as masks. At this time, intrinsic crystalline silicon layers were left directly below the gate lines 5006 and 5007, and channel formation regions 5010 and 5011 were formed. Actually, since a small amount of phosphorus was added to regions below the gate lines 5006 and 5007, a structure in which the respective gate lines 5006 and 5007 overlap the first impurity regions 5008 and 5009 is formed (
Then, sidewalls 5012 and 5013 were formed by forming an amorphous silicon layer of thickness 0.1-1 μm (representatively, 0.2-0.3 μm) to cover the gate lines 5006 and 5007 and performing anisotropic etching of the amorphous silicon layer. Each of the widths of the respective sidewalls 5012 and 5013 (each of the thicknesses of the same as viewed from the side walls of the gate lines 5006 and 5007) was made 0.2 μm (
It is to be noted that, in the present embodiment, the sidewalls 5012 and 5013 were formed of an intrinsic silicon layer because no impurities were added to the amorphous silicon layer.
After the state shown in
Incidentally, in the phosphorus-doping step shown in
In addition, in the step shown in
Then, a resist mask 5016 which covers part of an NTFT and a resist mask 5017 which covers the whole of a PTFT were formed. Then, in this state, a gate insulating film 5018 was formed by working the gate insulating film 5005 by dry etching (
At this time, the length of the portion of the gate insulating film 5018 which projected from the sidewall 5012 (the length of the portion of the gate insulating film 5018 which was in contact with the second impurity region 5014) determined the length (width) of the second impurity region 5014. Accordingly, the resist mask 5016 needed to be aligned with high accuracy.
After the state shown in
In this step, since no phosphorus was added to the portions shielded by the resist masks 5016 and 5017, the second impurity regions 5014 and 5015 were left without modification in the portions. Accordingly, the second impurity region 5014 was defined, and at the same time the third impurity region 5019 was defined.
The second impurity region 5014 functions as a 2nd LDD region, and the third impurity region 5019 functions as a source region or a drain region.
Then, the resist masks 5016 and 5017 were removed, and a resist mask 5021 was newly formed to cover the whole of the NTFT. Then, the sidewall 5013 of the PTFT was removed, and the gate insulating film 5005 was dry-etched to form a gate insulating film 5022 of the same shape as the gate line 5007 (
After the state shown in
At this time, since boron was added to a region below the gate line 5007, the channel formation region 5011 was formed within the region below the gate line 5007. In addition, in this step, the first impurity region 5009 and the second impurity region 5015 formed on the PTFT side were inverted to P-type regions by boron. Accordingly, a resistance value changes between a portion which was originally the first impurity region 5009 and a portion which was the second impurity region 5015, but no problem occurs because boron is added at a fully high concentration.
In this manner, a fourth impurity region 5023 was defined. The fourth impurity region 5023 is formed in a completely self-aligned manner by using the gate line 5007 as a mask, and functions as a source region or a drain region. In the present embodiment, although neither an LDD region nor an offset region is formed for the PTFT, no problem occurs because the PTFT is originally high in reliability. Contrarily, this is also a case in which it is convenient to dispose neither an LDD region nor the like, because ON current can be ensured.
In this manner, as shown in
After the state shown in
After the first interlayer insulating film 5024 had been formed, source lines 5025 and 5026 and a drain line 5027 made of a metallic material were formed. In the present embodiment, a three-layer line was used which had a structure in which a titanium-containing aluminum film was sandwiched between titanium layers.
If a resin film called BCB (benzodiclobutene) is used as the first interlayer insulating film 5024, the flatness of the first interlayer insulating film 5024 is improved and copper can be used as a line material. Since copper has a low line resistance, it is very useful as a line material.
After the source lines 5025 and 5026 and the drain line 5027 had been formed, a silicon nitride film 5028 of thickness 50 nm was formed as a passivation film. Furthermore, a second interlayer insulating film 5029 was formed over the silicon nitride film 5028 as a protection film. A material similar to that of the first interlayer insulating film 5024 can be used for the second interlayer insulating film 5029. In the present embodiment, a structure in which an acrylic resin film was stacked on a 50-nm-thick silicon oxide film was adopted.
Through the above-described steps, a CMOS circuit having the structure shown in
Similarly, pixel TFTs can be formed by NTFTs.
After the state shown in
Then, a counter substrate is prepared. The counter substrate is made of a glass substrate, a counter electrode made of a transparent conductive film and an alignment film.
In the present embodiment, a polyimide film was used as the alignment film. After the formation of the alignment film, rubbing was applied to the alignment film. In the present embodiment, polyimide having a comparatively large pretilt angle was used for the alignment film.
Then, the active matrix substrate and the counter substrate which had passed through the above-described steps were bonded together via a sealing member or a spacer in a known cell assembly step. After that, a liquid crystal is charged between both substrates and completely sealed by a sealant. In the present embodiment, the liquid crystal used was a nematic liquid crystal.
Thus, a transmission type of active matrix liquid crystal display device was finished.
In the description of the present embodiment, reference will be made to an example in which a crystalline semiconductor film which constitutes active layers in Embodiment 9 is formed by a thermal crystallization method using a catalytic element. If a catalytic element is to be used, it is preferable to use the arts described in Japanese Patent Laid-Open Nos. 130652/1995 and 78329/1996 filed by the present inventor.
Then, after a dehydrogenation step of 500° C. for 1 hour, heat treatment of 4-12 hours at 500-650° C. (in the present embodiment, 8 hours at 550° C.) was performed to form a polysilicon film 6005. The thus-formed polysilicon film 6005 had highly excellent crystallinity (
Subsequently, the polysilicon film 6005 was formed into active layers by patterning, and TFTs were fabricated through steps similar to those used in Embodiment 9.
Incidentally, in each of the above-described two arts, it is also possible to use elements other than nickel (Ni), such as germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), platinum (Pt), copper (Cu) and gold (Au).
In the description of the present embodiment, reference will be made to one example a method of fabricating an active matrix liquid crystal display device different from that described previously in connection with Embodiment 1 or 9. The active matrix liquid crystal display device of the present embodiment can be used as an active matrix liquid crystal display device in any of Embodiments 1 to 8.
Reference will be made to
Then, a 50-nm-thick amorphous silicon film was formed on the base film 7002 by a plasma CVD method. Dehydrogenation treatment was performed by heating at, preferably, 400-500° C. which depended on the hydrogen content of the amorphous silicon film, thereby reducing the hydrogen content of the amorphous silicon film to 5 atm % or below. Then, a crystallization step was performed to form the amorphous silicon film into a crystalline silicon film.
This crystallization step may use a known laser crystallization technique or thermal crystallization technique. In the present embodiment, a pulse oscillation type of KrF excimer laser was condensed into a linear shape to illuminate the amorphous silicon film, thereby forming the crystalline silicon film. Incidentally, this crystallization may also use the method described previously in connection with Embodiment 1 or 10.
Incidentally, in the present embodiment, the amorphous silicon film was used as an initial film, but a microcrystalline silicon film may also be used as an initial film or the crystalline silicon film may also be directly formed.
The thus-formed crystalline silicon film was patterned to form island-shaped semiconductor layers 7003, 7004 and 7005.
Then, a gate insulating film 7006 which essentially consisted of silicon oxide or silicon nitride was formed to cover the semiconductor layers 7003, 7004 and 7005. In this step, a silicon oxide nitride film was formed to a thickness of 100 nm by a plasma CVD method. Then, although not illustrated in
If aluminum is to be used for the second conductive films 7012, 7013, 7014 and 7015 which constitute the first gate electrodes, pure aluminum may also be used, or an aluminum alloy which contains by 0.1-5 atm % an element selected from among titanium, silicon and scandium may also be used. If copper is to be used, it is preferable that, although not shown, a silicon nitride film be formed on the surface of the gate insulating film 7006.
In
After the structure shown in
The impurity element added to the semiconductor layers 7003, 7004 and 7005 needed to be activated by a laser annealing method or a heat treatment. This step may be carried out after the step of adding an impurity to form source and drain regions, but it was effective to activate the impurity element by a laser annealing method in this stage.
In this step, the first conductive films 7007, 7008, 7009 and 7010 and the second conductive films 7012, 7013, 7014 and 7015 which constituted the first gate electrodes function as masks during the addition of phosphorus. Consequently, phosphorus was not at all or hardly added to the regions of the semiconductor layers 7003, 7004 and 7005 which underlay the gate insulating film 7006, directly below the first gate electrodes. Then, as shown in
Then, regions in which to form the n-channel TFTs were covered with resist masks 7024 and 7025 by using a photoresist film as mask, and only a region in which to form a p-channel TFT was subjected to the step of adding an impurity to impart the p-type. Boron (B), aluminum (Al) and gallium (Ga) are known as impurity elements which impart the p-type, and in this step, boron was added as such impurity element by an ion-doping method using diborane (B2H6). In this step as well, the acceleration voltage was set to 80 keV to add boron at a concentration of 2×1020 atoms/cm3. Thus, as shown in
Then, after the resist masks 7024 and 7025 had been removed, the step of forming second gate electrodes was performed. In this step, tantalum (Ta) was used as the material of the second gate electrodes, and a tantalum film of thickness 100-1000 nm, for example, 200 nm, was formed. Then, patterning using a known technique was performed to form second gate electrodes 7028, 7029, 7030 and 7031. At this time, patterning was performed so that the length of each of the second gate electrodes 7028, 7029, 7030 and 7031 became 5 μm. Consequently, each of the second gate electrodes 7028, 7029, 7030 and 7031 was formed to have areas each of which was 1.5 μm long and which were in contact with the gate insulating film 7006 on the opposite sides of the corresponding one of the first gate electrodes.
Although a holding capacitor portion was disposed on the drain side of the n-channel TFT which constituted the pixel matrix circuit, an electrode 7032 for the holding capacitor portion was formed at the same time as the second gate electrodes 7028, 7029, 7030 and 7031.
Then, a second step of adding an impurity element to impart the n-type was performed by using the second gate electrodes 7028, 7029, 7030 and 7031 as masks. This step was also performed by an ion-doping method using phosphine (PH3). In this step as well, the acceleration voltage was set to a high voltage of 80 keV to add phosphorus to the underlying semiconductor layers through the gate insulating film 7006. In this step, it is preferable to adjust the concentration of phosphorus within the range of 1×1019 to 1×1021 atoms/cm3 in each region in which to add phosphorus so that the regions can be made to function as source regions 7035 and 7043 and drain regions 7036 and 7047 of the n-channel TFTs. In the present embodiment, the concentration of phosphorus was set to 1×1020 atoms/cm3.
Although not shown in
In addition, phosphorus was added to a source region 7039 and a drain region 7040 of the p-channel TFT at the same concentration, but because boron was added at a concentration twice as high as the concentration of phosphorus in the previous step, the conductivity type of the p-channel TFT was not inverted and the p-channel TFT was able to operate without any problem.
Since the impurity elements which were added at the respective concentrations to impart the n- and p-types were not immediately activated and did not work effectively, it was necessary to perform an activation step. This step was able to be performed with a thermal annealing method using an electrical heating reactor, a laser annealing method using the above-described excimer laser or a rapid thermal annealing (RTA) method using a halogen lamp.
In the thermal annealing method, activation was effected by executing a heat treatment of 550° C. for 2 hours in a nitrogen atmosphere. In the present embodiment, aluminum was used for the second conductive films 7012, 7013, 7014 and 7015 which constituted the first gate electrodes, but the first conductive films 7007, 7008, 7009 and 7010 as well as the second gate electrodes 7028, 7029, 7030 and 7031 all of which were formed of tantalum were formed to cover aluminum, and tantalum functioned as a blocking layer so that aluminum atoms could be prevented from diffusing in another region. In the laser annealing method, a pulse oscillation type of KrF excimer laser was condensed into a linear shape to illuminate the regions in which the impurity elements were added, thereby causing activation thereof. In addition, if the thermal annealing method was carried out after the laser annealing method had been carried out, a far better result was able to be obtained. The activation step also had the effect of annealing a region having crystallinity destroyed by ion-doping, and was able to improve the crystallinity of the region.
Through the above-described steps, the first gate electrodes and the second gate electrodes which respectively covered the first gate electrodes were disposed, and in each of the n-channel TFTs, the source region and the drain region were formed on the opposite sides of the corresponding second gate electrode. In addition, the structure in which the first impurity regions formed in the semiconductor layers underlying the gate insulating film and the regions in which the second gate electrodes were in contact with the gate insulating film were disposed in a superimposed manner was formed in a self-aligned manner. In the p-channel TFT, the source region and the drain region were formed to partly overlap the corresponding second gate electrodes, but no problem occurred in practical use. In
After the state shown in
After that, contact holes were formed in the source regions and the drain regions of the respective TFTs by patterning the first interlayer insulating film 7049. Thus, source electrodes 7050, 7052 and 7053 and drain electrodes 7051 and 7054 were formed. Although not shown, in the present embodiment, these source and drain electrodes were formed by patterning a film having a three-layer structure in which a titanium film of thickness 100 nm, a titanium-containing aluminum film of thickness 300 nm and a titanium film of thickness 150 nm were continuously formed by a sputtering method.
Thus, a CMOS circuit and an active matrix circuit were formed over the substrate 7001, as shown in
Then, the step of fabricating an active matrix liquid crystal display device on the basis of the CMOS circuit and the active matrix circuit which were fabricated over one substrate by the above-described steps will be described with reference to
Then, a light blocking layer 7057 was formed on part of a pixel area of the second interlayer insulating film 7056. The light blocking layer 7057 may be formed of a metallic film or an organic resin film which contains a pigment. In this step, titanium was formed by a sputtering method.
After the light blocking layer 7057 had been formed, a third interlayer insulating film 7058 was formed. This third interlayer insulating film 7058 may be formed of an organic resin film similarly to the second interlayer insulating film 7056. Then, a contact hole which reached the drain electrode 7054 was formed in the second interlayer insulating film 7056 and the third interlayer insulating film 7058, thereby forming a pixel electrode 7059. The pixel electrode 7059 may use a transparent conductive film in the case of a transmission type of liquid crystal display device, or a metallic film in the case of a reflection type of liquid crystal display device. In this step, to obtain a transmission type of liquid crystal display device, an indium tin oxide (ITO) film of thickness 100 nm was formed by a sputtering method, and the pixel electrode 7059 was formed.
After the state shown in
The substrate on which the active matrix circuit and the CMOS circuit had been formed through the above-described steps and the counter substrate are bonded together via a sealing member or a spacer (neither of which is shown) in a known cell assembly step. After that, a liquid crystal 7074 is charged between both substrates and completely sealed by a sealant (not shown). Thus, the active matrix liquid crystal display device shown in
According to the driving method of the present invention, by supplying a modulated clock signal frequency modulated at a constant period to a driving circuit of an active matrix semiconductor display device or a passive matrix semiconductor display device, signal information (the presence or absence of an edge, the extent of nearness) relative to the vicinity of the sampling of video signals sampled on the basis of this modulated clock signal can be written to the corresponding pixels of the semiconductor display device as shading information. According to the driving method of the present invention, the resolution of a displayed image is apparently improved as the result of a visual Mach phenomenon and Craik-O'Brien phenomenon. Accordingly, it is possible to provide a good image having a substantially higher resolution than that obtainable in either of an active matrix semiconductor display device and a passive matrix semiconductor display device according to the conventional driving method.
In addition, according to the driving method of the present invention, it is possible to adequately display an image signal which conforms to a low-resolution standard signal, on an active matrix liquid crystal display device which conforms to a high-resolution standard.
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