Patent Grant
8988410
This application claims the benefits, under 35 U.S.C §119, of Korean Patent Application No. 10-2011-0026559 filed Mar. 24, 2011, the entirety of which is incorporated by reference herein.
1. Field
Exemplary embodiments relate to a display device, and more particularly, relate to a display device and its operating method.
2. Description of the Related Art
A liquid crystal display device may be a display device which obtains an image signal by adjusting the amount of light penetrating a substrate. The amount of light may be adjusted by controlling an electric field applied to a liquid crystal material injected between two substrates and having an anisotropic permittivity.
This liquid crystal display device may be a representative flat panel display device being easy to carry around. In particular, a thin film transistor (TFT) liquid crystal display device using thin film transistors as switching elements may be mainly used.
One embodiments is directed to a display device which comprises a display panel including a display pixel displaying an image in response to a common voltage and a data voltage and a sensing pixel outputting a feedback voltage in response to the common voltage and a reference voltage; and a driving circuit unit supplying the data voltage and the reference voltage to the display pixel and the sensing pixel, respectively. The driving circuit unit comprises a common voltage estimating part comparing the reference voltage and the feedback voltage to generate a counter signal having a counter value that is stepwise varied according to the comparing of the reference voltage and the feedback voltage; and a common voltage adjusting part stepwise varying the common voltage supplied to the display panel in response to the counter value.
In this embodiment, the common voltage estimating part comprises a reference voltage generator generating the reference voltage and applying the reference voltage to the sensing pixel; a comparator generating a comparison signal by comparing the reference voltage and the feedback voltage; and a counter generating the counter signal having the counter value in response to the comparison signal.
In this embodiment, when the feedback voltage is lower in level than the reference voltage, the counter increases the counter value of the counter signal in response to the comparison signal, and the common voltage adjusting part increases the common voltage in response to the counter signal having the increased counter value.
In this embodiment, when the feedback voltage is higher in level than the reference voltage, the counter decreases the counter value of the counter signal in response to the comparison signal, and the common voltage adjusting part decreases the common voltage in response to the counter signal decreasing the counter value.
In this embodiment, the counter maintains the counter value of the counter signal when a difference between the reference voltage and the feedback voltage exists within a threshold value.
In this embodiment, the counter signal has an initial counter value, the counter signal having the initial counter value is supplied to the common voltage adjusting part before the comparison signal is generated by the comparator, and the common voltage adjusting part increases the common voltage in response to the counter signal having the initial counter value.
In this embodiment, the driving circuit unit further comprises a gate driving part supplying a gate voltage to the display pixel and the sensing pixel.
In this embodiment, the counter varies the counter value in a stepwise manner during a low level period of the gate voltage.
In this embodiment, the common voltage adjusting part further comprises a first amplifier amplifying the feedback voltage and a second amplifier amplifying the reference voltage.
In this embodiment, the display panel is a liquid crystal display panel, and the display pixel and sensing pixel are formed by a same process.
Another embodiment is directed to an operating method of a display device which includes a display pixel displaying an image in response to a common voltage and a data voltage and which includes a sensing pixel. The operating method comprises outputting a feedback voltage by supplying a reference voltage to the sensing pixel; generating a counter signal having a counter value that is stepwise varied according to a comparing result of the feedback voltage and the reference voltage; and stepwise varying the common voltage according to the counter value.
In this embodiment, the counter value of the counter signal increases when the feedback voltage is lower in level than the reference voltage, the common voltage increases according to an increase in the counter value, and the feedback voltage increases according to an increase in the common voltage.
In this embodiment, the counter value of the counter signal decreases when the feedback voltage is higher in level than the reference voltage, the common voltage decreases according to a decrease in the counter value, and the feedback voltage decreases according to a decrease in the common voltage.
In this embodiment, the counter value of the counter signal and the common voltage are maintained when a difference between the feedback voltage and the reference voltage exists within a threshold value.
The above and other features will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:
Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; however, they may be embodied in different forms and should not be construed as limited to the embodiments set forth herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element or layer is referred to as being “on”, “connected to”, “coupled to”, or “adjacent to” another element or layer, it can be directly on, connected, coupled, or adjacent to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,” “directly connected to”, “directly coupled to”, or “immediately adjacent to” another element or layer, there are no intervening elements or layers present.
Referring to
The display panel 100 may include display pixels 120 and a sensing pixel 130. The display pixels 120 may be disposed at display areas of the display panel 100. The display pixels 120 may be driven by the driving circuit unit to display an image. The sensing pixel 130 may be disposed at a non-display area of the display panel 100. The sensing pixel 130 may not be used to display an image substantially. In an exemplary embodiment, the display panel 100 may include one sensing pixel 130. In another exemplary embodiment, a plurality of sensing pixels 130 can be provided on the display panel 100.
The display panel 100 may include a plurality of gate lines GL1 to GLn extending in the first direction and a plurality of data lines DL1 to DLm extending to the second direction. Each of the display pixels 120 may be connected with one gate line and one data line. A plurality of display pixels 120 arranged in the first direction may constitute a row, and a plurality of display pixels 120 arranged in the second direction may constitute a column. Display pixels 120 in the same row may be connected with the same gate line, and display pixels 120 in the same column may be connected with the same data line. Each of the gate lines GL1 to GLn may be provided between adjacent rows, and each of the data lines DL1 to DLm may be provided between adjacent columns.
The timing control part 200 may generate a gate control signal GCS and a data control signal DCS. The timing control part 200 may generate the gate control signal GCS to send it to the gate driving part 220. The timing control part 200 may generate the data control signal DCS to send it to the data driving part 210. The timing control part 200 may be configured to a pixel data signal RGB to the data driving part 210.
The data driving part 210 may receive the pixel data signal RGB and the data control signal DCS. The data driving part 210 may convert the pixel data signal RGB into a data output signal to supply it to the data lines DL1 to DLm.
The gate driving part 220 may sequentially apply a gate voltage to the plurality of gate lines GL1 to GLn in response to the gate control signal GCS. In the plurality of gate lines GL1 to GLn, switching elements of display pixels 120 connected with a gate line supplied with the gate voltage may be turned on, while switching elements of display pixels 120 connected with a gate line not supplied with the gate voltage may be turned off Transistors in display pixels 120 connected with the same gate line may be turned on or off at the same time.
Each of the display pixels 120 may include the first transistor 122 connected with a corresponding data line DLi (i=1 to m), the first storage capacitor 124 and the first liquid crystal capacitor 126. The capacitors 124 and 126 may be connected with the first transistor 122.
The first transistor 122 may have a control terminal, an output terminal, and an input terminal. The control terminal may be connected with a corresponding gate line GLj (j=1 to n), the input terminal may be connected with a corresponding data line DLi, and the output terminal may be connected with the first terminal of the first storage capacitor 124 and the first terminal of the first liquid crystal capacitor 126. The second terminal of the first liquid crystal capacitor 126 and the second terminal of the first storage capacitor 124 may be connected to receive a common voltage Vcom.
The sensing pixel 130 may include the second transistor and the second storage capacitor. The second transistor may be formed by the same process as the first transistor 122. The second storage capacitor may be formed by the same process as the first storage capacitor 124.
The sensing pixel 130 may be connected with the common voltage estimating part 320 and the common voltage adjusting part 310. The common voltage adjusting part 310 may supply the display panel 100 with the common voltage Vcom compensating for a kickback voltage. An operating method of the display device according to an exemplary embodiment will be more fully described with reference to
Referring to
The second transistor 132 may have a gate connected with the nth gate line GLn of gate lines GL1 to GLn. In an exemplary embodiment, as sensing pixel transistor, the second transistor 132 may be connected with the nth gate line GLn, but embodiments are not limited to this disclosure. The second transistor 132 may be supplied with a gate voltage GV from a gate driving part 220 in
The second transistor 132 may have an input terminal connected to receive the reference voltage Vref from the reference voltage generator 322 of the common voltage estimating part 320 and an output terminal connected with the node N.
The first terminal of the second capacitor 134 may be connected with the node N, and the second terminal thereof may be connected to receive an initial common voltage Vcom0 from the common voltage adjusting part 310.
The second transistor 132, the second storage capacitor 134 and the second liquid capacitor 136 may be formed by the same process as the first transistor 122, the first storage capacitor 124 and the first liquid capacitor 126 described in
The gate voltage GV may have a high level period and a low level period. During the high level period, the second transistor 132 may be turned on. During the low level period, the second transistor 132 may be turned off. The gate voltage GV may transition to a low level from a high level. In this case, the reference voltage Vref applied to the input terminal of the second transistor 132 may not be transferred to its output terminal without a voltage variation, due to the parasitic capacitor Cp between the gate of the second transistor 132 and the node N. In this case, the node N connected with the output terminal of the second transistor 132 may have an initial feedback voltage Vfb0 lower than the reference voltage Vref.
A kickback voltage Vkb may be a difference between the reference voltage Vref and the initial feedback voltage Vfb0. The kickback voltage Vkb may be expressed by the following equation.
In the equation, Vkb may represent the kickback voltage Vkb, and Cgd may represent a parasitic capacitance between the gate and drain of the sensing pixel transistor 132. Von may represent the gate voltage GV at the high level period, and Voff may represent the gate voltage GV at the low level period.
The initial feedback voltage Vfb0 may be amplified K times by the first amplifier 324a, and the amplified initial feedback voltage may be sent to the comparator 326. The reference voltage Vref generated by the reference voltage generator 322 may be amplified K times by the second amplifier 324b, and the amplified reference voltage may be transferred to the comparator 326. The comparator 326 may compare the reference voltage Vref thus amplified and the initial feedback voltage Vfbo thus amplified and generate a comparison signal CS as the comparison. The comparison signal CS may include information on a difference between the reference voltage Vref and the initial feedback voltage Vfb0.
The comparison signal CS may be sent to the counter 328. The counter 328 may generate a counter signal CTS having the first counter value CV1 in response to the comparison signal CS. The counter signal CTS having the first counter value CV1 may be sent to the common voltage adjusting part 310.
In the event that the initial feedback voltage Vfb becomes lower than the reference voltage due to the kickback voltage Vkb, the common voltage adjusting part 310 may supply the sensing pixel 130 with the first common voltage Vcom1 higher in level than the initial common voltage Vcom0 in response to the counter signal CTS having the first counter value CV1.
As the common voltage Vcom increases to the first common voltage Vcom1 from the initial common voltage Vcom0, the feedback voltage Vfb may increase to the first feedback voltage Vfb1 from the initial feedback voltage Vfb0 (represented by {circle around (1)} in
The first feedback voltage Vfb1 may be amplified by the first amplifier 324a, and the amplified feedback voltage Vfb1 may be transferred to the comparator 326. The comparator 326 may again generate the comparison signal CS by comparing the amplified feedback voltage and the amplified reference voltage and send it to the counter 328. The counter 328 may stepwise vary a counter value of the counter signal CTS.
For example, if the first feedback voltage Vfb1 is lower in level than the reference voltage Vref, the counter 328 may control the counter value of the counter signal CTS so as to increase to the second counter value CV2 larger than the first counter value CV1. The common voltage adjusting part 310 may supply the sensing pixel 310 with the second common voltage Vcom2 higher in level than the first common voltage Vcom1 in response to the counter signal CTS having the second counter value CV2.
As the common voltage Vcom increases to the second common voltage Vcom2 from the first common voltage Vcom1, the feedback voltage Vfb may increase to the second feedback voltage Vfb2 from the first feedback voltage Vfb1 (represented by {circle around (2)} in
The second feedback voltage Vfb2 may be amplified by the first amplifier 324a, and the amplified feedback voltage Vfb2 may be transferred to the comparator 326. The comparator 326 may again generate the comparison signal CS by comparing the amplified feedback voltage and the amplified reference voltage and send it to the counter 328. The counter 328 may stepwise vary a counter value of the counter signal CTS or maintain it.
For example, if a difference between the second feedback voltage Vfb2 and the reference voltage Vref is within a threshold value, the counter value of the counter signal CTS may be maintained with the second counter value CV2. In an exemplary embodiment, the threshold voltage may be about 20 mV.
The counter signal CTS having the second counter value CV2 may be supplied to the common voltage adjusting part 310. At this time, the common voltage adjusting part 310 may supply a display panel 100 including display pixels in
According to an exemplary embodiment, a common voltage Vcom may increase according to a counter value of the counter signal CTS, and a feedback voltage Vfb may increase according to an increase in the common voltage Vcom. In this case, a common voltage Vcom may be supplied to compensate for the kickback voltage Vkb. This means that quality lowering due to the kickback voltage Vkb can be minimized. Accordingly, it is possible to provide a display device having the high reliability.
Unlike the above embodiment, in a case where the feedback voltage Vfb is higher in level than the reference voltage Vref, the feedback voltage Vfb may decrease to have a voltage level between the reference voltage Vref and the threshold value. An operating method of a display device according to an exemplary embodiment will be more fully described with reference to
Referring to
A counter signal CTS of a counter 328 may have an initial counter value CV0. The counter signal CTS having the initial counter value CV0 may be sent to the common voltage adjusting part 310. The common voltage adjusting part 310 may supply the sensing pixel 130 with the third common voltage Vcom3 higher in level than the initial common voltage Vcom0 in response to the counter signal CTS having the initial counter value CV0.
The feedback voltage Vfb may increase to the third feedback voltage Vfb3 from the initial feedback voltage Vfb0 as the common voltage Vcom increases to the third common voltage Vcom3 from the initial common voltage Vcom0 (represented by {circle around (3)} in
The third feedback voltage Vfb3 may be amplified by the first amplifier 324a, and the amplified feedback voltage may be sent to the comparator 326. The comparator 326 may generate a comparison signal CS by comparing the amplified third feedback voltage and the amplified reference voltage. The comparison signal CS may be transferred to the counter 328. The comparison signal CS may include information on a difference between the reference voltage Vref and the third feedback voltage Vfb3.
The counter 328 may stepwise vary a counter value of the counter signal CTS in response to the comparison signal CS. For example, if the third feedback voltage Vfb3 is higher in level than the reference voltage Vref, the counter 328 may control the counter value of the counter signal CTS so as to decrease to the third counter value CV3 less than the initial counter value CV0.
The common voltage adjusting part 310 may supply the sensing pixel 130 with the fourth common voltage Vcom4 lower in level than the third common voltage Vcom3 in response to the counter signal CTS having the third counter value CV3. As the common voltage Vcom decreases to the fourth common voltage from the third common voltage Vcom3, the feedback voltage Vfb may decrease to the fourth feedback voltage Vfb4 from the third feedback voltage Vfb3 (represented by {circle around (4)} in
The fourth feedback voltage Vfb4 may be amplified by the first amplifier 324a, and the amplified fourth feedback voltage Vfb4 may be transferred to the comparator 326. The comparator 326 may again generate the comparison signal CS by comparing the amplified fourth feedback voltage and the amplified reference voltage and send it to the counter 328. The counter 328 may stepwise vary a counter value of the counter signal CTS in response to the comparison signal CS or maintain it. For example, if a difference between the fourth feedback and the reference voltage Vref exists within a threshold value, the counter value of the counter signal CTS may be maintained at the third counter value CV3.
The counter signal CTS having the third counter value CV3 may be supplied to the common voltage adjusting part 310. At this time, the common voltage adjusting part 310 may supply a display panel 100 including display pixels in
Below, an operating method of a display device according to still another exemplary embodiment will be more fully described.
Referring to
A feedback voltage Vb reduced due to a kickback voltage may be applied to a node N of the sensing pixel 130. The feedback voltage Vfb may be amplified K times by the first amplifier 324a and the amplified feedback voltage may be sent to the comparator 326a. The reference voltage Vref generated by the reference voltage generator 322 may be amplified K times, and the amplified reference voltage may be transferred to the comparator 326a. The comparator 326a may generate a comparison signal CSa by comparing the amplified reference signal Vref and the amplified feedback voltage Vfb. The comparison signal CSa may include information on a difference between the reference voltage Vref and the feedback voltage Vfb.
The comparison signal CSa may be sent to the counter 328a. The counter 328a may generate a counter signal CTSa having a counter value in response to the comparison signal CSa. For example, the more a difference between the reference voltage Vref and the feedback voltage Vfb, the more a counter value of the counter signal CTSa. The counter signal CTSa having the counter value may be sent to the common voltage adjusting part 310.
The common voltage adjusting part 310 may supply a display panel 100 including display pixels 120 in
Below, an operating method of a display device according to still another exemplary embodiment will be more fully described.
Referring to
The reference voltage Vref generated by the reference voltage generator 322 may be applied to the voltage divider 323. The voltage divider 323 may divide the reference voltage Vref to generate a plurality of division voltages Vd1 to Vdx. The division voltages Vd1 to Vdx may be generated to have voltage levels different to one another. The division voltages Vd1 to Vdx may be transferred to the multiplexer 325.
The multiplexer 325 may select one of the division voltages Vd1 to Vdx in response to a counter signal CTSb having a counter value from the counter 329, and the selected division voltage may be applied to the differential amplifier 327. When applied to a node N of the sensing pixel 130, the feedback voltage Vfb may be transferred to the differential amplifier 327. The feedback voltage Vfb may become lower than the reference voltage Vref due to a kickback voltage.
The differential amplifier 327 may transfer a difference between the feedback voltage Vfb and a division voltage from the multiplexer 325 to the counter 329. In response to the difference from the differential amplifier, the counter 329 may stepwise vary the counter value of the counter signal CTSb or maintain it.
For example, in the event that a division voltage Vd1 lower in level than the reference voltage Vref is applied to the differential amplifier 327, the counter 329 may increase the counter value of the counter signal CTSb. In this case, in response to the counter signal CTSb having the increased counter value, the multiplexer 325 may supply the differential amplifier 327 with a division voltage Vd2 higher than the division voltage Vd1.
The differential amplifier 327 may transfer a difference between the reference voltage Vref and the division voltage Vd2 to the counter 329. For example, if a difference between the reference voltage Vref and the division voltage Vd2 exists within a threshold value, the counter 329 may maintain the counter value of the counter signal CTSb. In this case, the counter signal CTSb having the counter value may be sent to the common voltage adjusting part 310. The common voltage adjusting part 310 may supply the display panel 100 with the common voltage Vcom compensating for the kickback voltage.
By way of summation and review, a gray voltage may decrease by a constant voltage when a gate voltage of a thin film transistor for driving a liquid crystal switches to a gate off voltage from a gate on voltage. At this time, the decreased voltage may be called a kickback voltage.
Such a situation is circumvented with the exemplary embodiments. In particular, with the exemplary embodiments, a driving circuit unit for driving a display panel may generate a counter signal by applying a reference voltage to a sensing pixel of a display panel and comparing a feedback voltage of the sensing pixel with the reference voltage. The driving circuit unit may adjust a common voltage in response to the counter signal such that the feedback voltage becomes identical to the reference voltage. In this case, the high reliability of a display panel may be provided by reducing a quality lowering due to the kickback voltage. Further, it is possible to reduce a flicker phenomenon.
Exemplary embodiments have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation.
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