The invention relates to display systems and more particularly to display devices and methods of operating display devices.
A spatial light modulator (SLM) is a device which imparts information onto a light beam. For example, SLMs include liquid crystal devices (LCD—reflective and transmissive) and micro-electronic mirror systems (MEMS). SLMs are useful as part of display devices and other applications. One known type of display device utilizing an SLM is an LCD having a liquid crystal (LC) material which is driven by electronics located under each pixel. There are many known pixel architectures for these devices, each of which utilizes different structures and techniques to drive the LC material. For example, an analog pixel architecture might represent the color value of the pixel with a voltage that is stored on a capacitor under the pixel. This voltage can then directly drive the LC material to produce different levels of intensity on the optical output.
Various features of the invention will be apparent from the following description of preferred embodiments as illustrated in the accompanying drawings, in which like reference numerals generally refer to the same parts throughout the drawings. The drawings are not necessarily to scale, the emphasis instead being placed upon illustrating the principles of the invention.
In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular structures, architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the various aspects of the invention. However, it will be apparent to those skilled in the art having the benefit of the present disclosure that the various aspects of the invention may be practiced in other examples that depart from these specific details. In certain instances, descriptions of well known devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
With reference to
In some embodiments, a display may include an array of pixel elements 12 and the multi-level drive circuit 14 may be physically co-located with the array of pixel elements 12 on the same integrated circuit die. In some embodiments, a local multi-level drive circuit 14 may be provided for each pixel element 12 in the array. For example, each multi-level drive circuit 14 and pixel element 12 may be physically co-located in a same pixel cell on the same integrated circuit die. Alternatively, some or all of the drive circuits 14 may be provided on one or more circuits not integrated on the same die with the pixel elements 12, but electrically coupled thereto.
For example, the display device 10 may be part of a silicon light modulator (SLM) utilizing a liquid crystal material (LC) that is driven by electronics located under each pixel. There are many other pixel architectures for SLMs, each of which have implications on how the pixel element is driven. For example, a digital pixel might use pulse-width modulation (PWM) to switch the pixel between black and white at a duty cycle that represents the desired gray level.
With PWM digital drive, the device represents the gray level by modulation over a base period of time TM. For example, in some video systems, this base time might be a single video frame. The PWM may operate by slicing TM into N discrete quanta each of duration TQ. For example, the quanta may represent a minimum pulse duration that the device can generate or effectively utilize. In general, more quanta may be provide better control over the duty cycle, and thus the response of the system.
However, increasing the number N of quanta may require decreasing the duration TQ, which may consequently increase the operating frequency and power consumption of the SLM device. Advantageously, some embodiments of the invention may provide additional quanta (effectively) without increasing the operating frequency of the device, by using a multi-level drive circuit to drive the pixel elements. For example, instead of driving the pixel element at one of two states (e.g. corresponding to black and white), some embodiments of the invention may drive the pixel element at one of three or more states.
With reference to
For example, the multi-level drive circuit 24 may convert the output from the n-bit storage element into a corresponding voltage level for the pixel element 22. Advantageously, some embodiments of the invention may provide additional control over the gray level of a display device without increasing the operating frequency of the device. Of course, some embodiments of the invention may alternatively provide the same amount of gray level control as conventional devices with an advantageously lower operating frequency and/or power level.
With reference to
For example, a value stored by the n-bit storage element 36 may be used as an address pointer for the memory 38 (e.g. to index the look-up table). The memory 38 may store values corresponding to desired signal levels (e.g. output voltages) stored in memory locations. When the address indicated by the value stored by the n-bit storage element 36 is applied to the memory 38, the corresponding signal level value is read out from the memory 38 and applied to the DAC circuit 34. The DAC circuit 34 converts the digital value to an analog signal level and drives the pixel element 32 with the analog signal level.
The memory 38 may be volatile or non-volatile. For example, the memory 38 may be loaded with appropriate values each time the memory 38 is powered on. Alternatively, the memory 38 may be a read only memory which is manufactured with preset values. Alternatively, the memory 38 may be an electrically programmable non-volatile memory, such as a flash memory, which may be programmed with application dependent signal level values. Some memory configurations may include an address register, which may take the place of the n-bit storage element in some embodiments.
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For example, the pixel element may include a pixel electrode 41 coupled to one side of a charge storage element 43. The other side of the charge storage element 43 may be grounded. The charge storage element 43 (e.g. a capacitor) holds a charge representing a gray scale value of the pixel. The DAC circuit 44 receives a control signal which controls access to the capacitor 43. Alternatively, a separate enable switch (e.g. a transistor) may be connected between the DAC circuit 44 and the pixel element 42.
For example, the n-bit storage element 46 includes two D flip-flops 45 and 47, providing a 2-bit storage element. For example, data values (e.g. 1 or 0) on columns lines COL-A and COL-B are stored by the D flip-flops 45 and 47 when the row line ROW is enabled to write the corresponding row of data. The Q outputs of the flip-flops 45 and 47 are connected to the look-up table 48 as an index to the table values. For example, when the binary index value is 00, the digital value corresponding to V1 is provided to the DAC circuit 34. For an index value of 01, V2 is provided, and so on for V3 and V4.
When the control signal CONTROL is active, the output of the DAC circuit 34 is applied to the capacitor 43, for as long as the control signal is active. For example, the control signal may be derived from one or more of the state of a write line, a bit line, a ramp value, and/or a pulse width modulation signal. For example, the control signal may become active at the beginning of the refresh cycle and may stay active until a digital ramp value equals a pixel data value for the corresponding pixel cell, thus transferring an appropriate amount of charge to the capacitor 43 in accordance with the stored voltage signal level. Those skilled in the art will appreciate that the pixel cell, charge storage element, enable switch, and/or electrode may take other forms depending on the particular display technology.
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For example, the pixel element may include a pixel electrode 41 coupled to an output of the analog MUX circuit 64. The pixel element may further include a common electrode 63 with liquid crystal material disposed between the pixel electrode 61 and the common electrode 63. For example, the common electrode 63 may be common to all pixel elements in a display and may be made from indium titanium-oxide (ITO). A bias voltage (VITO) is applied to the common electrode 63 to provide the proper bias to the LC cell and to preserve DC balance. In some embodiments, the analog MUX circuit 64 may receive a control signal (not shown) which controls access to the pixel electrode 61. Alternatively, a separate enable switch (e.g. a transistor) may be connected between the analog MUX circuit 64 and the pixel element 62.
For example, the n-bit storage element 66 includes three D flip-flops 65, 67 and 69, providing a 3-bit storage element. The ROW signal is provided to respective clock inputs CK of the D flip-flops 65, 67 and 69, and the COL signals are provided to respective inputs D of the D flip-flops 65, 67 and 69. For example, the D flip-flops 65, 67 and 69 may hold the current state of the PWM waveform for the pixel. For example, data values (e.g. 1 or 0) on columns lines COL-A, COL-B and COL-C are stored by the D flip-flops 65, 67 and 69 when the row line ROW is enabled to write the corresponding row of data. The Q outputs of the D flip-flops 65, 67 and 69 are connected to the analog MUX circuit 64 to select the corresponding analog output voltage. For example, when the collective binary output is 000, the digital value corresponding to V1 is provided to the pixel element 62. For a binary value of 001, V2 is provided, and so on for V3 through V8.
With reference to
For example, some embodiments may include multiplexing the at least three different signal levels (e.g. at block 74), selecting one of the multiplexed signal levels in accordance with the n-bit value (e.g. at block 75), and driving the pixel element with the selected signal level (e.g. at block 76).
For example, some embodiments may include reading a stored digital value from a memory in accordance with the n-bit value (e.g. at block 77). Some embodiments may further include converting the stored digital value to an analog signal level (e.g. at block 78), and driving the pixel element with the analog signal level (e.g. at block 79).
With reference to
Assume a system can produce a minimum pulse duration of TQ seconds as shown in
The control circuitry for a PWM display system may use the multi-level drive signals in any of a number of suitable drive techniques. With reference to
The example of
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Without limitation, the pixel source 112 may be a computer system, graphics processor, digital versatile disk (DVD) player, and/or a high definition television (HDTV) tuner. In addition, the pixel source 112 may not provide pixel data for all of the pixels in the display system. For example, the pixel source may simply provide the pixels that have changed since the last update.
With reference to
For example, in the system 120 the spatial light modulator 123 may be a micro-electronic mirror device, a liquid crystal device, or another type of spatial light modulator. The display system 120 may further include a light engine 126 configured to provide light along the optical path P. The light from the light engine 126 may be acted on by the various optical components 121 along the optical path P, including the spatial light modulator 123. An output beam from the optical components 121 may enter a projection lens 127 to be projected on a display screen 128 configured to display an image of the modulated light from the spatial light modulator 123. Although illustrated as substantially linear, the optical path P may bend or reflect in accordance with the physical arrangement of the components in the display system 120.
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In some embodiments, the system 130 further includes a first drive circuit coupled to or integrated with the first LCOS panel 135, and a second drive circuit coupled to or integrated with the second LCOS panel 136, wherein the drive circuits are respectively configured to provide multi-level drive signals to the respective LCOS panels 135 and 136. For example, the LCOS panels 135 and 136 may each include an array of pixel elements and the drive circuits may be configured to drive the array of pixel elements with at least three different signal levels.
Substantially polarized, modulated light from the first and second LCOS panels 135 and 136 is reflected by the opposite side of the WGP 133 onto respective faces of a combining prism 138. In accordance with some embodiments of the invention, and as illustrated in
Even though single or two-panel (or two PBS) display systems have been described above, according to some embodiments, more or less panels may be utilized in various embodiments of the invention. In many embodiments, single or multi-panel-based color imaging systems may be devised without departing away from the spirit of the present invention. An example of a panel is a liquid crystal on silicon (LCOS) panel, forming screen projection displays in projection display systems. Consistent with numerous embodiments of the present invention, color schemes other than a red-green-blue (RGB) format may be employed since the RGB format is simply used here for illustration purposes only.
The foregoing and other aspects of the invention are achieved individually and in combination. The invention should not be construed as requiring two or more of such aspects unless expressly required by a particular claim. Moreover, while the invention has been described in connection with what is presently considered to be the preferred examples, it is to be understood that the invention is not limited to the disclosed examples, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and the scope of the invention.