Patent Application
20220020316
This disclosure relates generally to light emitting diodes (LEDs) and LED driver circuitry for a display, and more specifically to a display architecture with distributed driver circuits.
LEDs are used in many electronic display devices, such as televisions, computer monitors, laptop computers, tablets, smartphones, projection systems, and head-mounted devices. Modern displays may include well over ten million individual LEDs that may be arranged in rows and columns in a display area. In order to drive each LED, current methods employ driver circuitry that require significant amounts of external chip area that impacts the size of the display device.
A display device comprises an array of light emitting diode zones, an array of driver circuits, a set of shared lines, and a control circuit. The array of light emitting diode zones each comprise one or more light emitting diodes that generate light in response to respective driver currents. The driver circuits are distributed in the display area of the display device. The driver circuits drive respective light emitting diode zones with the respective driver currents based on driver control commands and generate readback data comprising sensed conditions in response to readback commands. The set of shared lines communicate the driver control commands, the readback commands and the readback data. The set of shared lines include row lines coupling driver circuits in respective rows of the array of driver circuits and column lines coupling driver circuits in respective columns of the array of driver circuits. The control circuit operates in an addressing mode to assign addresses to the array of driver circuits based on addressing signals sent on the row lines and the column lines. The control circuit also operates in an operational mode to generate the readback commands, to obtain the readback data in response to the readback commands, and to generate the driver control commands based at least in part on the readback data. The driver control commands include an address associated with a targeted driver circuit.
In an embodiment, the set of shared lines include a set of power lines coupling the driver circuits in the respective rows. The set of power lines provide respective supply voltages to driver circuits in the respective rows. A set of data input lines couple the driver circuits in the respective columns for providing the driver control commands and the readback commands to driver circuits in the respective columns. A set of data output lines couple the driver circuits in the respective columns for communicating the readback data to the control circuit in response to the readback commands.
In another embodiment, the set of shared lines include a set of power lines coupling the driver circuits for providing the respective supply voltages to those driver circuits in the respective rows. A set of data input lines couple the driver circuits in the respective columns for communicating addressing signals during the addressing mode to assign respective addresses to the driver circuits in the respective columns such that all driver circuits within a column have a same address and all driver circuits in a row have different addresses. A set of data output lines that couple the driver circuits in the respective rows communicate the readback data to the control circuit in response to the readback commands.
In another embodiment, the set of shared lines include a set of power communication lines coupling the driver circuits in the respective rows. The set of power communication lines provide respective supply voltages to driver circuits in the respective rows, and provide the driver control commands and the readback commands as digital data modulated on the supply voltages during an operational mode. A set of bidirectional data lines couple the driver circuits in the respective columns. The set of bidirectional data lines communicate the addressing signals from the control circuit during the addressing mode to assign respective addresses to the driver circuits in the respective columns such that all driver circuits within a column have a same address and all driver circuits in a row have different addresses. The set of bidirectional data lines communicate the readback data to the control circuit in response to the readback commands during the operational mode.
In yet another embodiment, the set of shared lines include a set of data input lines coupling the driver circuits in the respective rows to sequentially send row select signals from the control circuit during the addressing mode to select respective rows of the array of driver circuits for address assignment during sequential row select periods. A set of bidirectional data lines couple the driver circuits in the respective columns. In an embodiment, the set of bidirectional data lines sequentially send column select signals from the control circuit during each of the sequential row select periods of the addressing mode to select respective columns of the array of driver circuits for address assignment during sequential row-column select periods. The set of bidirectional data lines also communicate the readback data to the control circuit in response to the readback commands during an operational mode. A set of power communication lines couple the driver circuits in the respective rows. The set of power lines provide respective supply voltages to driver circuits in the respective rows. The set of power communication lines also send address assignments to respective selected driver circuits during each of the row-column select periods of the addressing mode.
In another embodiment, the set of shared lines include a set of data input lines coupling the driver circuits in the respective rows. The set of data input lines sequentially send row select signals from the control circuit during an addressing mode to select respective rows of the array of driver circuits for address assignment during sequential row select periods. A set of bidirectional data lines couple the driver circuits in the respective columns. The set of bidirectional data lines sequentially send column addressing signals from the control circuit during each of the sequential row select periods of the addressing mode to assign addresses to respective driver circuits. The set of bidirectional data lines also communicate the readback data to the control circuit in response to the readback commands during an operational mode. A set of power lines couple the driver circuits in the respective rows for providing respective supply voltages to driver circuits in the respective rows.
The teachings of the embodiments of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.
The features and advantages described in the specification are not all inclusive and many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims.
A display device comprises an array of driver circuits and LED zones distributed in a display area. A set of shared lines includes column lines coupling driver circuits in respective columns and row lines coupling driver circuits in respective rows. During an addressing mode, a control circuit assigns addresses to the driver circuits using a combination of the row lines and the column lines. During an operational mode, the control circuit sends driver control commands to the driver circuits utilizing the assigned addresses to control brightness of the LED zones. The control circuit may also send readback commands to the driver circuits to obtain readback data relating to sensed conditions. The control circuit may adjust the driver control commands based on the sensed conditions.
(FIG.) 1 is a circuit diagram of a display device 100 for displaying images or video, according to one embodiment. In various embodiments, the display device 100 may be implemented in any suitable form-factor, including a display screen for a computer display panel, a television, a mobile device, a billboard, etc. The display device 100 may comprise a liquid crystal display (LCD) device or an LED display device. In an LCD display device, LEDs provide white light backlighting that passes through liquid crystal color filters that control the color of individual pixels of the display. In an LED display device, LEDs are directly controlled to emit colored light corresponding to each pixel of the display.
The display device 100 includes a device array 105 of distributed zone integrated circuits (ICs) 150. Each zone IC 150 includes a driver circuit 120 and one or more LEDs of an LED zone 130. The LED zones 130 each correspond to pixels of a digital image that have color and intensity based on data received from the control circuit 110. The device array 105 may be arranged in rows and columns. Each row may share a common power line (Pwr1, PwrM) 160 controlled by a row controller 112. Each column may share a common data input line (Di1, . . . DiN) 170 and data output line (Do1, . . . DoN) 180 controlled by a column controller 114. Zone ICs 150 in a row or column of the device array 105 may also share other lines (not shown) such as voltage supply lines (VLED) for the LED zones 130 and ground lines (GND). In another embodiment, a shared power line provides power to both the driver circuits 120 and the LED zones 130 in a group (e.g., a row or column). As used herein, a row or column may refer to a partial row or column and not necessarily to the entire row or column of the display device 100.
As will be described in further detail below, the device array 105 may be physically structured such that the LED zones 130 are stacked over the driver circuits 120. In other words, an array of LED zones 130 are arranged in a first x-y plane and an array of driver circuits 120 are arranged in a second x-y plane parallel to the first x-y plane. In one configuration, each LED zone 130 is stacked over (i.e., in the z direction) the corresponding driver circuit 120 that drives it. Furthermore, the components of the device array 105 (e.g., the LED zones 130 and the driver circuits 120) may be integrated on the same substrate and in a same package as further described in
The LED zones 130 each comprise one or more LEDs that each generate light that has a brightness dependent on respective driver currents provided by the corresponding drivers 120. In an LCD display, an LED zone 130 may comprise one or more LEDs that provides backlighting for a backlighting zone, which may include a one-dimensional or two-dimensional array of pixels. In an LED display, the LED zone 130 may comprise one or more LEDs corresponding to a single pixel of the display device 100 or may comprise a one-dimensional array or two-dimensional array of LEDs corresponding to an array of pixels (e.g., one or more columns or rows). For example, in one embodiment, the LED zone 130 may comprise one or more groups of red, green, and blue LEDs that each correspond to a sub-pixel of a pixel. In another embodiment, the LED zone 130 may comprise one or more groups of red, green, and blue LED strings that correspond to a column or partial column of sub-pixels or a row or partial row of sub-pixels. For example, an LED zone 130 may comprise a set of red sub-pixels, a set of green sub-pixels, or a set of blue sub-pixels.
The LEDs may be organic light emitting diodes (OLEDs), inorganic light emitting diodes (ILEDs), mini light emitting diodes (mini-LEDs) (e.g., having a size range between 100 to 300 micrometers), micro light emitting diodes (micro-LEDs) (e.g., having a size of less than 100 micrometers), white light emitting diodes (WLEDs), active-matrix OLEDs (AMOLEDs), transparent OLEDs (TOLEDs), or some other type of LEDs.
The driver circuits 120 drive the LED zones 130 by controlling the respective driver currents to the LED zones 130 in response to driver control signals. In an embodiment, a driver circuit 120 controls a driver current supplied by a power supply (not shown) to control brightness of one LED zone 130 based on the driver control signals. For example, brightness of the LED zone 130 generally increases with increasing driver current.
In an embodiment, the driver circuits 120 each drive multiple channels of a corresponding LED zone 130 that may each have separately controllable driver currents. For example, the driver circuit 120 may independently control LED currents corresponding to red, green, and blue channels of the LED zones 130 via separate output pins.
A set of shared lines couple different groups of driver circuits 120 with the control circuit 110. The shared lines may include column lines that each couple a column of driver circuits 120 to a column controller 114 and row lines that each couple a row of driver circuits 120 to a row controller 112. For example, in the embodiment of
The driver circuits 120 may operate in various modes including at least an addressing mode, a configuration mode, and an operational mode. During the addressing mode, the control circuit 110 initiates an addressing procedure to cause assignment of addresses to each of the driver circuits 120. In an embodiment, different addresses are assigned to driver circuits 120 that are in different rows, but all of the driver circuits 120 in a particular row are assigned the same address. For example, all driver circuits 120 in the first row receive an address ID_1, all driver circuits 120 in a second row receive an address ID_2, and so on. Examples of waveforms associated with an addressing process are described below with reference to
During the configuration and operational modes, the control circuit 110 transmits commands and data that may be targeted to specific driver circuits 120 based on their addresses. For example, in the configuration mode, the control circuit 110 configures the driver circuits 120 with one or more operating parameters (e.g., overcurrent thresholds, overvoltage thresholds, clock division ratios, and/or slew rate control). During the operational mode, the control circuit 110 provides control data to the driver circuits 120 that causes the driver circuits 120 to control the respective driver currents to the LED zones 130, thereby controlling brightness. For example, in each of a sequence of image frames, the control circuit 110 provides driver control signals to the driver circuits 120 that control a driving current of the LED zones 130 (e.g., by controlling a duty cycle and/or current level through one or more LED strings). For example in
The row controller 112 may also issue commands via the data input lines 170 to request readback data from driver circuits 120. In response to the readback commands, the driver circuits output the readback to the column controller 114 via the data output lines 180. The readback data can comprise various sensed conditions such as the channel voltages at the output to the LED channels, the temperature of each driver circuits 120, status information such as overvoltage/undervoltage flags for the driver circuits 120, or other fault information. The readback command may target an individual driver circuit 120 by specifying a target address, or may comprise a group command requesting readback data from all driver circuits 120 coupled to the data input line 170 (e.g., a column of driver circuits 120). The control circuit 110 may adjust driver control signals, supply voltage levels, sensor parameters, or other display parameters dependent on the received feedback data from the driver circuits 120. For example, the control circuit 110 may calibrate the driver circuits 120 based on the sensed data so that LED zones 130 each output the same brightness in response to the same brightness control signal, despite process variations or other sensed conditions that may otherwise cause variations. The calibration process may be performed by measuring light output, channel voltages, temperature, or other data that may affect performances of the LEDs. The calibration process may be repeated over time (e.g., as the display device 100 heats up during operation). In an embodiment, each driver circuit 120 may place its respective data output pin coupled to the data output line 180 in a high impedance state when the driver circuit 120 is not outputting so that it does not interfere with signals outputted by other driver circuits 120 coupled to the same data output line 180.
The zone ICs 350 may be physically structured similarly to the zone ICs 150 described above, but have a modified pin configuration and interact differently with the control circuit 310 as described below. Particularly, in the addressing mode, the column controller 314 outputs respective addresses on each data input line 370 such that all the driver circuits 320 in each column are given the same address. For example, the driver circuits 320 in the first column addresses each receive an address ID_1, the driver circuits 320 in the second column each receive addresses ID_2, and so on. Waveforms associated with the addressing phase are illustrated in
In the operational mode, the row controller 312 communicates driver control commands with brightness settings to the LED drivers via the PLC lines 360. Here, the commands on a PLC line 360 are sent together with an address that specifies which driver circuit 120 is being targeted by the command. Other driver circuits 320 that do not have the matching address may ignore the command. The row controller 312 may similarly send readback commands to the driver circuits 320 via the PLC lines 360 to request readback data such as temperature, channel voltage, or other sensed conditions. The targeted driver circuit 320 sends the readback data on the data output lines 380. The readback data can be sent via the data output lines 380 concurrently with the driver control commands being sent on the PLC lines 360. The readback commands may further optionally be sent as group commands targeted to all driver circuits 320 coupled to the same PLC line 360 instead of to a specific targeted driver circuit 320. In this case, the readback data can be sent back sequentially by the driver circuits 320 (e.g., in order of increasing address, decreasing address, or another pattern). In another embodiment, a specific driver circuit 320 can be targeted by a readback command by asserting a signal on the data input line 370 coupled to the targeted driver circuit 320.
In an alternative embodiment, the data output lines 380 may be omitted and the data input lines 370 may be bidirectional lines. Here, the same bidirectional data lines 370 may be used to both provide addressing inputs during the addressing mode and to provide readback data during the operational mode.
In another embodiment, the display device 300 does not have power communication lines 360 and instead includes separate dedicated power lines and driver control signal lines that provide the brightness information.
The zone ICs 550 may be physically structured similarly to the zone ICs 150 described above, but have a modified pin configuration and interact differently with the control circuit 510 as described below. Particularly, in the addressing mode, the control circuit 510 assigns addresses using both the data input lines 570 and data output lines 580, and optionally the PLC lines 560. For example, the control circuit 510 may assert an active signal on one of the data input lines 570 to identify an active row. Addresses may then be assigned to the driver circuits 520 in the active row via the PLC line 560 or via the bidirectional data lines 580. Here, unique addresses may be assigned to each driver circuit 520. Waveforms associated with the addressing phase are illustrated in
During the operational mode, the control circuit 510 broadcasts driver control signals including brightness information and/or readback commands to the driver circuits 510 in a row via the data input lines 570. Alternatively, the driver control signals and readback commands can be sent via the PLC lines 560. In response to a readback command, the driver circuits 520 output readback data via the bidirectional data lines 580. When sending commands, the targeted driver circuit 520 may be uniquely identified based on its address assigned during the addressing mode.
In another embodiment, the display device 500 does not have power communication lines 560 and instead includes separate dedicated power lines. In this embodiment, the driver and readback commands may be sent via the data input lines 570 or via a separate dedicated line.
The power/PLC control circuit 702 is coupled to receive a supply voltage from the power/PLC pin 718 and provides power regulation to generate an output voltage for powering the control logic 704 or other components of the driver circuit 720. In some embodiments where power line communication is used, the power/PLC control circuit 702 furthermore may demodulate the supply voltage to extract the digitally encoded signal and provide it to the control logic 704. The control logic 704 receives data signals from the data input pin 712 and optionally from the power/PLC control circuit 702 if power line communication is used. In some embodiments, where the data output pin 714 provides bidirectional communication, data signals may also be received via the data output pin 714. Here, the received data signal may include addressing signals for assigning addresses, driver control signals for controlling the driver current to the LED zone 730, readback commands, or other signals. The control logic 704 may also output readback data to the data output pin 714 in response to readback commands.
The control logic 704 generates a PWM signal 722 for controlling the PWM dimming circuit 706 and a max current signal 724 for controlling the brightness control circuit 710. The PWM signal 722 specifies a duty cycle for controlling PWM dimming by the PWM dimming circuit 706. Based on the selected duty cycle, the PWM dimming circuit 706 controls timing of an on-state and an off-state of the transistor 708. During the on-state of the transistor 708, a current path is established from the LED driving output pin 716 (coupled to the LED zones 730) to the ground pin 726 through the transistor 708 and the brightness control circuit 710 to sink the driver current through the LEDs of the LED zones 730. During an off-state of the transistor 708, the current path is interrupted to block current from flowing through the LED zones 730. The brightness control circuit 710 receives the max current signal 724 from the control logic 704 and controls the current level that flows through the LEDs (from the LED driving output pin 716 to the ground pin 726) when the transistor 708 is in the on-state. The control logic 704 controls the duty cycle of the PWM dimming circuit 706 and the max current signal 724 of the brightness control circuit 710 to set the desired brightness of the LED zone 730 coupled to the output pin 716. Although the driver circuit 720 of
The integrated LED and driver circuit 805 includes the substrate 830 that is mountable on a surface of the PCB interconnect layer 820. The substrate 830 may be, e.g., a silicon (Si) substrate. In other embodiments, the substrate 830 may include various materials, such as gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), aluminum nitride (AlN), sapphire, silicon carbide (SiC), or the like.
The driver circuit layer 840 may be fabricated on a surface of the substrate 830 using silicon transistor processes (e.g., BCD processing). The driver circuit layer 840 may include one or more driver circuits 120 (e.g., a single driver circuit or a group of driver circuits arranged in an array). The interconnect layer 850 may be formed on a surface of the driver circuit layer 840. The interconnect layer 850 may include one or more metal or metal alloy materials, such as Al, Ag, Au, Pt, Ti, Cu, or any combination thereof. The interconnect layer 850 may include electrical traces to electrically connect the driver circuits 120 in the driver circuit layer 840 to wire bonds 855, which are in turn connected to the control circuit 110 on the PCB 810. In an embodiment, each wire bond 855 provides an electrical connection between the driver circuit or LED zone and the control circuit or other electronic components (e.g., power and ground lines). Additionally, the interconnect layer 850 may provide electrical connections for supplying the driver current between the driver circuit layer 840 and the conductive redistribution layer 860.
In an embodiment, the interconnect layer 850 is not necessarily distinct from the driver circuit layer 840 and these layers 840, 850 may be formed in a single process in which the interconnect layer 850 represents a top surface of the driver circuit layer 840.
The conductive redistribution layer 860 may be formed on a surface of the interconnect layer 850. The conductive redistribution layer 860 may include a metallic grid made of a conductive material, such as Cu, Ag, Au, Al, or the like. The LED layer 870 includes LEDs that are on a surface of the conductive redistribution layer 860. The LED layer 870 may include arrays of LEDs arranged into LED zones as described above. The conductive redistribution layer 860 provides an electrical connection between the LEDs in the LED layer 870 and the one or more driver circuits in the driver circuit layer 840 for supplying the driver current and provides a mechanical connection securing the LEDs over the substrate 830 such that the LED layer 870 and the conductive redistribution layer 860 are vertically stacked over the driver circuit layer 840.
Thus, in the illustrated circuit 805, the one or more driver circuits and the LED zones including the LEDs are integrated in a single package including a substrate 830 with the LEDs in an LED layer 870 stacked over the driver circuits in the driver circuit layer 840. By stacking the LED layer 870 over the driver circuit layer 840 in this manner, the driver circuits can be distributed in the display area of a display device.
In alternative embodiments, the integrated driver and LED circuits 805, 885, 895 may be mounted to a different base such as a glass base instead of the PCB 810.
The PCB 810 includes a connection to a power source supplying power (e.g., VLED) to the LEDs, a control circuit for generating a control signal, generic I/O connections, and a ground (GND) connection. The driver circuit layer 840 includes a plurality of driver circuits (e.g., DC1, DC2, DCn) and a demultiplexer DeMux. The conductive redistribution layer 860 provides electrical connections between the driver circuits and the demultiplexer DeMux in the driver circuit layer 840 to the plurality of LEDs in the LED layer 870. The LED layer 870 includes a plurality of LEDs arranged in rows and columns. In this example implementation, each column of LEDs is electrically connected via the conductive redistribution layer 860 to one driver circuit in the driver circuit layer 840. The electrical connection established between each driver circuit and its respective column of LEDs controls the supply of driver current from the driver circuit to the column. In this embodiment, each diode shown in the LED layer corresponds to an LED zone. Each row of LEDs is electrically connected via the conductive redistribution layer 860 to one output (e.g., VLED_1, VLED_2, . . . VLED_M) of the demultiplexer DeMux in the driver circuit layer 840. The demultiplexer DeMux in the driver circuit layer 840 is connected to a power supply (VLED) and a control signal from the PCB 810. The control signal instructs the demultiplexer DeMux which row or rows of LEDs are to be enabled and supplied with power using the VLED lines. Thus, a particular LED in the LED layer 870 is activated when power (VLED) is supplied on its associated row and the driver current is supplied to its associated column.
Upon reading this disclosure, those of skill in the art will appreciate still additional alternative embodiments through the disclosed principles herein. Thus, while particular embodiments and applications have been illustrated and described, it is to be understood that the disclosed embodiments are not limited to the precise construction and components disclosed herein. Various modifications, changes and variations, which will be apparent to those skilled in the art, may be made in the arrangement, operation and details of the method and apparatus disclosed herein without departing from the spirit and scope described herein.
This application claims the benefit of U.S. Provisional Application No. 63,052,844 filed on Jul. 16, 2020, which is incorporated by reference herein.
| Number | Date | Country | |
|---|---|---|---|
| 63052844 | Jul 2020 | US |
