This application claims priority to Taiwan Application Serial Number 111111738, filed on Mar. 28, 2022, which is herein incorporated by reference in its entirety.
The present disclosure relates to an electronic device. More particularly, the present disclosure relates to a display device in which circuits on both sides of a readout line are arranged in a dislocation manner.
Conventional display devices have a large number of readout lines, which reduces a pixel density (or called Pixels Per Inch, PPI) in a panel of a display device and causes readout line area to occupy a certain proportion of a chip bonding of a display device. Therefore, a large number of readout lines is not conducive to designs of various shapes of displays.
For the foregoing reason, there is a need to provide other a circuit structure and a trace design of a display device to solve the problems of the prior art.
One aspect of the present disclosure provides a display device. The display device includes a readout line, a first circuit, a second circuit, and a third circuit. The readout line includes a first side and a second side. The first side is opposite to the second side. Each of the first circuit, the second circuit, and the third circuit is coupled to the readout line. The first circuit and the third circuit are located at the first side of the readout line. The first circuit is configured to reset according to a first scan signal at a first stage. The second circuit is located at the second side of the readout line. The second circuit and the first circuit are arranged in a dislocation manner. The second circuit is configured to read a first light sensing signal of the second circuit so as to output the first scan signal to the readout line according to the first scan signal at the first stage. The third circuit and the second circuit are arranged in a dislocation manner, and the third circuit is directly adjacent to the first circuit. The third circuit is configured to sense a light so as to generate a second light sensing signal according to a second scan signal at the first stage.
Another aspect of the present disclosure provides a display device. The display device includes a readout line, a first circuit, a second circuit, and a third circuit. The readout line includes a first side and a second side. The first side is opposite to the second side. The first circuit is coupled to the readout line, and is located at the first side of the readout line. The second circuit is coupled to the readout line, and is located at the second side of the readout line. The third circuit is coupled to the readout line, and is located at the first side of the readout line. Each of the first circuit, the second circuit, and the third circuit includes an optical sensor, a read circuit, and a reset circuit. The optical sensor is configured to sense a light so as to generate a light sensing signal. The read circuit is coupled to the optical sensor and the readout line, and is configured to read the light sensing signal so as to transmit the light sensing signal to the readout line. The reset circuit is coupled to the read circuit and the optical sensor, and is configured to reset the optical sensor. The reset circuit of the first circuit and the read circuit of the second circuit are coupled to a first scan signal line. The reset circuit of the second circuit and the read circuit of the third circuit are coupled to a second scan signal line. The first scan signal line and the second scan signal line are parallel and do not intersect. The reset circuit of the first circuit and the read circuit of the third circuit are directly adjacent to each other.
The present disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows:
Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Furthermore, it should be understood that the terms, “comprising”, “including”, “having”, “containing”, “involving” and the like, used herein are open-ended, that is, including but not limited to.
The terms used in this specification and claims, unless otherwise stated, generally have their ordinary meanings in the art, within the context of the disclosure, and in the specific context where each term is used. Certain terms that are used to describe the disclosure are discussed below, or elsewhere in the specification, to provide additional guidance to the practitioner skilled in the art regarding the description of the disclosure.
In some embodiments, the plurality of readout lines (e.g.: a readout line RL1 and a readout line RL2) are coupled to the brightness sensing read integrated circuit 130. In some embodiments, after the brightness sensing read integrated circuit 130 and the display driver integrated circuit 120 are integrated into a single integrated circuit, the plurality of readout lines (e.g.: a readout line RL1 and a readout line RL2) can be coupled to the single integrated circuit.
In some embodiments, please refer to
In some embodiments, please refer to
Then, the readout line RL1 includes a first side (e.g.: a right side of the figure) and a second side (e.g.: a left side of the figure). The first side is opposite to the second side. Each of the first circuit Sen1, the second circuit Sen2, and the third circuit Sen3 is coupled to the readout line RL1. The first circuit Sen1 and the third circuit Sen3 are located at the first side of the readout line RL1 (e.g.: a right side of the figure). The second circuit Sen2 is located at the second side of the readout line RL1 (e.g.: a left side of the figure). The second circuit Sen2 and the first circuit Sen1 are arranged in a dislocation manner. The third circuit Sen3 and the second circuit Sen2 are arranged in a dislocation manner, and the third circuit Sen3 is directly adjacent to the first circuit Sen1.
Furthermore, the first circuit Sen1 is configured to reset according to a first scan signal S1[n] at a first stage. The second circuit Sen2 is configured to read a first light sensing signal of the second circuit Sen2 so as to output the first scan signal to the readout line RL1 according to the first scan signal S1[n] at the first stage. The third circuit Sen3 is configured to sense a light so as to generate a second light sensing signal according to a second scan signal S2[n] at the first stage.
It should be noted that the first circuit Sen1, the second circuit Sen2, and the third circuit Sen3 are the plurality of circuits with multiple functions in the aforementioned embodiments.
In some embodiments, a circuit structure of the first circuit Sen1, second circuit Sen2, and third circuit Sen3 are the same. In some embodiments, the second circuit Sen2 and the first circuit Sen1 are not in the same row, and the second circuit Sen2 and the third circuit Sen3 are not in the same row.
In some embodiments, please refer to
Then, the second red light pixel circuit R2, the second green light pixel circuit G2, the second blue light pixel circuit B2, the fourth red light pixel circuit R4, the fourth green light pixel circuit G4, and the fourth blue light pixel circuit B4 are the same pixel column.
In some embodiments, please refer to
In some embodiments, please refer to
Then, the first scan signal line L1 is coupled to the first circuit Sen1 and the second circuit Sen2. The second scan signal line L2 is coupled to the second circuit Sen2 and the third circuit Sen3.
In some embodiments, the first scan signal line L1 is configured to transmit the first scan signal S1[n]. The second scan signal line L2 is configured to transmit the second scan signal S2[n].
Furthermore, the first scan signal line L1, the second scan signal line L2, the first red light pixel circuit R1, the first green light pixel circuit G1, the first blue light pixel circuit B1, the second red light pixel circuit R2, the second green light pixel circuit G2, the second blue light pixel circuit B2, the second circuit Sen2 are the same pixel row. The first circuit Sen1 and the third circuit Sen3 are partially overlapped with the pixel row above the figure.
Similarly, the secondary first scan signal line L3 is coupled to the third circuit Sen3 and a fourth circuit Sen4. The secondary second scan signal line L4 is coupled to the fourth circuit Sen4 and the fifth circuit Sen5.
Then, the secondary first scan signal line L3 is configured to transmit a secondary first scan signal S1[n+1]. The secondary second scan signal line L4 is configured to transmit a secondary second scan signal S2[n+1].
Furthermore, the secondary first scan signal line L3, the secondary second scan signal line L4, the third red light pixel circuit R3, the third green light pixel circuit G3, the third blue light pixel circuit B3, the fourth red light pixel circuit R4, the fourth green light pixel circuit G4 and the fourth blue light pixel circuit B4, and the fourth circuit Sen4 are the same pixel row. The third circuit Sen3 and the fifth circuit Sen5 are partially overlapped with the pixel row below the figure.
In some embodiments, a circuit structure of each of the first circuit Sen1 to the fifth circuit Sen5 is the same. It should be noted that parts of circuit structure of the first circuit Sen1 and the fifth circuit Sen5 are not shown in the figure. In practice, a circuit structure of each of first circuit Sen1 and the fifth circuit Sen5 is the same as a circuit structure of the third circuit Sen3.
In some embodiments, each of the first circuit Sen1 to the fifth circuit Sen5 includes three transistors and an optical sensor.
Because the circuit structures of the first circuit Sen1 to the fifth circuit Sen5 are the same, in some embodiments, the first circuit Sen1 includes a first transistor T1, an optical sensor SRO1 and two transistors (not shown in the figure). Please start form a top end and a right end of each of an element shown in the figure as a first end, the optical sensor SRO1 includes a first end and a second end. The first end of the optical sensor SRO1 is coupled to a system low voltage source SVSS.
Then, the first transistor T1 includes a first end, a second end, and a control end. The first end of the first transistor T1 is coupled to the second end of the optical sensor SRO1. The second end of the first transistor T1 is coupled to a second system high voltage source SVDD2. The control end of the first transistor T1 is coupled to the first scan signal line L1, and is configured to receive the first scan signal S1[n].
In some embodiments, the second circuit Sen2 includes a second transistor T2, a third transistor T3, a fourth transistor T4, and an optical sensor SRO2.
In some embodiments, the second transistor T2 includes a first end, a second end, and a control end. The first end of the second transistor T2 is coupled to the readout line RL1. The control end of the second transistor T2 is coupled to the first scan signal line L1, and is configured to receive the first scan signal S1[n].
In some embodiments, the third transistor T3 includes a first end, a second end, and a control end. The first end of the third transistor T3 is coupled to the second end of the second transistor T2. The second end of the third transistor T3 is coupled to a first system high voltage source SVDD1. The control end of the third transistor T3 is coupled to the optical sensor SRO2.
In some embodiments, the fourth transistor T4 includes a first end, a second end, and a control end. The first end of the fourth transistor T4 is couple to the control end of the third transistor T3 and the optical sensor SRO2. The second end of the fourth transistor T4 is coupled to the second system high voltage source SVDD2. The control end of the fourth transistor T4 is coupled to second scan signal line L2, and is configured to receive the second scan signal S2[n].
In some embodiments, the optical sensor SRO2 includes a first end and a second end. The first end of the optical sensor SRO2 is coupled to the control end of the third transistor T3. The second end of the optical sensor SRO2 is coupled to the system low voltage source SVSS.
In some embodiments, the third circuit Sen3 includes a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an optical sensor SRO3. A circuit structure of the third circuit Sen3 is similar to a circuit structure of the second circuit Sen2, and repetitious details are omitted herein.
In some embodiments, the fourth circuit Sen4 includes an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, and an optical sensor SRO4. A circuit structure of the fourth circuit Sen4 is similar to a circuit structure of the second circuit Sen2, and repetitious details are omitted herein.
In some embodiments, the fifth circuit Sen 5 includes an eleventh transistor T11, a twelfth transistor T12, a transistor (not shown in the figure) and an optical sensor (not shown in the figure).
In some embodiments, in order to facilitate the understanding of an operation of the display device of
In some embodiments, please refer to
At this time, the first circuit Sen1 is configured to reset the optical sensor the optical sensor SRO1. The second circuit Sen2 is configured to read first light sensing signal. Each of the third circuit Sen3 to the fifth circuit Sen5 is configured to sense a light. Please refer to
It should be noted that the pixel circuits on both sides of the readout line RL1 (e.g.: pixel circuits R1˜B1 and pixel circuits R2˜R2), and the first circuit Sen1 to the third circuit Sen3 share the first scan signal line L1 and the second scan signal line L2.
In some embodiments, please refer to
At this time, first circuit Sen1 is configured to reset the optical sensor SRO1. The second circuit Sen2 is configured to reset the optical sensor SRO2 and turn off the third transistor T3. Each of the third circuit Sen3 to the fifth circuit Sen5 is configured to sense a light. Please refer to
In some embodiments, please refer to
At this time, the first circuit Sen1 is configured to sense a light. The second circuit Sen2 is configured to reset the optical sensor SRO2. The third circuit Sen3 is configured to read the second light sensing signal of the third circuit Sen3. Each of the fourth circuit Sen4 to the fifth circuit Sen5 is configured to sense a light. Please refer to
In some embodiments, please refer to
At this time, each of the first circuit Sen1 and the second circuit Sen2 is configured to sense a light. The third circuit Sen3 is in a hold state. The fourth circuit Sen4 and the fifth circuit Sen5 are configured to sense a light. Please refer to
In some embodiments, please refer to
At this time, the first circuit Sen1 and the second circuit Sen2 is configured to sense a light. The third circuit Sen3 is configured to switch from the hold state to a reset state. The fourth circuit Sen4 is configured to read the light sensing signal to readout line RL1. The fifth circuit Sen5 is configured to sense a light.
Please refer to
In some embodiments, please refer to
At this time, each of the first circuit Sen1 and the second circuit Sen2 is configured to sense a light. The third circuit Sen3 is configured to reset. The fourth circuit Sen4 is configured to switch from a reading state to a reset state. The fifth circuit Sen5 is configured to sense a light.
Please refer to
In some embodiments, please refer to
At this time, Each of the first circuit Sen1, the second circuit Sen2, and the third circuit Sen3 is configured to sense a light. The fourth circuit Sen4 is configured to reset. The fifth circuit Sen5 is configured to read the light sensing signal.
Please refer to
In some embodiments, please refer to
At this time, each of the first circuit Sen1 to the fifth circuit Sen5 is configured to sense a light. Please refer to
In some embodiments, please refer to
In some embodiments, please refer to
Then, please refer to
Then, the optical sensor (e.g.: the optical sensor SRO2) is configured to sense a light to generate a light sensing signal. the read circuit (e.g.: the read circuit Sen21) is coupled to the optical sensor (e.g.: the optical sensor SRO2) and the readout line RL1, and is configured to read the light sensing signal so as to transmit the light sensing signal to the readout line RL1. The reset circuit (e.g.: the reset circuit Sen22) is coupled to the read circuit (e.g.: the read circuit Sen21) and the optical sensor (e.g.: the optical sensor SRO2), and is configured to reset the optical sensor (e.g.: the optical sensor SRO2). The reset circuit Sen12 of the first circuit Sen1 and the read circuit Sen21 of the second circuit Sen2 are coupled to a first scan signal line L1. The reset circuit Sen22 of the second circuit Sen2 and the read circuit Sen31 of the third circuit Sen3 are coupled to a second scan signal line L2. The first scan signal line L1 and the second scan signal line L2 are parallel and do not intersect. The reset circuit Sen12 of the first circuit Sen1 and the read circuit Sen31 of the third circuit Sen3 are directly adjacent to each other. It should be noted that a difference between embodiments of
In some embodiments, please refer to
Based on the above embodiments, the present disclosure provides a display device to reduce a number of readout lines of a display device, and make the same pixel row can perform circuit operations of reading, resetting and light sensing at the same time, so that a circuit structure of a display device of the present disclosure can be designed for displays of various shapes.
Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the present disclosure. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of the present disclosure provided they fall within the scope of the following claims.
Number | Date | Country | Kind |
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111111738 | Mar 2022 | TW | national |