This application claims the benefit of priority to Japanese Patent Application No. 2022-142145 filed on Sep. 7, 2022, the entire contents of which are incorporated herein by reference.
An embodiment of the present invention relates to a display device.
A display device using an on-cell type touch sensor is known as one display device in which flexible printed substrates are bonded together (see Japanese laid-open patent publication No. 2019-74709). An electrode used for a touch sensor is formed on a sealing layer of the touch sensor, and a wiring for transmitting a signal from an electrode to the flexible printed substrate is formed on the display device.
A wiring for transmitting a signal from an electrode used for a touch sensor to a flexible printed substrate may be short-circuited due to film residue of the wiring due to poor wiring patterning when it gets over a step portion of the planarization layer arranged between the pixel and the flexible printed substrate. A wedge-shaped protrusion was arranged in the step portion as a countermeasure against the short circuit.
However, in the case where the wedge-shaped protrusion is arranged in the step portion, the inclination of the step portion becomes steep at a root portion of the step portion, and the step portion may be exposed from a sealing layer, particularly an inorganic sealing layer, which is arranged so as to cover the step portion as a starting point.
An embodiment of the present invention is a display device. The display device includes a planarization layer on a substrate, a pixel with an organic electroluminescence element on the planarization layer, a sealing layer covering the pixel, a terminal electrode arranged at an edge of the substrate, and a first wiring arranged over the sealing layer and electrically connected to the terminal electrode. The planarization layer has an outer edge that forms a step over the substrate between the pixel and the terminal electrode. The first wiring extends from above the sealing layer to intersect with the step. In a plan view, the step has a first protrusion of the planarization layer protruding in a direction of the terminal electrode, a second protrusion adjacent to the first protrusion and protruding in a direction of the terminal electrode, and an intermediate region between the first protrusion and the second protrusion. The outer edge of the planarization layer has a curved shape in a plan view from the first protrusion to the intermediate region and from the second protrusion to the intermediate region. The first wiring intersects the intermediate region and extends in the direction of the terminal electrode.
Hereinafter, embodiments of the present invention will be described with reference to the drawings and the like. However, the present invention can be implemented in various aspects without departing from the gist thereof, and is not to be construed as being limited to the description of the embodiments exemplified below.
In the drawings, the widths, thicknesses, shapes, and the like of the respective portions may be schematically represented in comparison with the actual embodiments for clarity of explanation, but the drawings are merely examples, and do not limit the interpretation of the present invention. In the present specification and the drawings, elements having the same functions as those described with respect to the above-described drawings are denoted by the same reference signs, and redundant descriptions thereof may be omitted.
In the present specification and claims, when expressing the manner of arranging another structure on a certain structure, the term “on” shall include both arranging another structure directly above a certain structure and arranging another structure over a certain structure via yet another structure, unless otherwise specified.
In the present specification and claims, the phrase “a structure is exposed from another structure” means an aspect in which part of a structure is not covered by another structure, and it includes an aspect in which the part not covered by another structure is covered by yet another structure.
In the present specification and claims, the term end view refers to a vertical cut of an object as viewed from the side. The end view shall include a diagram of an end view. In addition, the expression plan view indicates when the object is viewed from directly above. Top view or plan view shall include a diagram of a plan view.
In the present embodiment, a configuration of a display device 100 according to an embodiment will be described.
As shown in
The display device 100 includes a display region 116 and a peripheral region 118 surrounding the display region 116. The touch sensor 106 is arranged in the display region 116, and the drive circuit 108, the mounting pad 110, the contact portion 134, the first step 112, and the second step 114 are arranged in the peripheral region 118. Although omitted in
The sensor electrode 122 is arranged in the touch sensor 106. The sensor electrode 122 is connected to the sensor wiring 126. The sensor wiring 126 is electrically connected to the wiring 138 via a contact 132 arranged in the contact portion 134. The wiring 138 is electrically connected to the terminal wiring 150. The terminal wiring 150 is connected to the terminal electrode 124 arranged in the mounting pad 110. As a result, the sensor electrode 122 is electrically connected to the terminal electrode 124.
As shown in
A plurality of pixels can be arranged in the display region 116.
The light-emitting element 105 is electrically connected to a transistor arranged in each pixel 104.
The select transistor 410 is connected to a gate line 412 and a data line 414. Specifically, the gate line 412 is connected to a gate of the select transistor 410. The data line 414 is connected to a source of the select transistor 410. The select transistor 410 functions as a switch for selecting whether to input a data signal (video signal Vs) to the pixel circuit 400. A drain of the select transistor 410 is connected to a gate of the drive transistor 420 and the capacitor 430.
The drive transistor 420 is connected to an anode power line 422, the light-emitting element 105, and the capacitor 430. Specifically, the anode power line 422 is connected to a drain of the drive transistor 420. The light-emitting element 105 is connected to a source of the drive transistor 420. The capacitor 430 is connected between the gate and the source of the drive transistor 420. The drive transistor 420 controls a current flowing through the light-emitting element 105. A high potential power supply voltage (PVDD) is applied to the anode power line 422.
The capacitor 430 holds the data signal input through the select transistor 410. A voltage corresponding to the data signal held in the capacitor 430 is applied to the gate of the drive transistor 420. As a result, the amount of current flowing through the drive transistor 420 is controlled according to the data signal.
The light-emitting element 105 is connected between the drive transistor 420 and a cathode power line 424. Specifically, an anode of the light-emitting element 105 is connected to the source of the drive transistor 420. That is, the anode of the light-emitting element 105 is connected to the anode power line 422 via the drive transistor 420. A cathode of the light-emitting element 105 is connected to the cathode power line 424. A low potential power supply voltage (PVSS) is applied to the cathode power line 424.
In the pixel circuit 400, when the select transistor 410 is turned on, the data signal is input from the data line 414. A voltage corresponding to the input data signal is held by the capacitor 430. Thereafter, in the light emission period, the gate of the drive transistor 420 is controlled by the voltage held in the capacitor 430, and a current corresponding to the data signal flows through the drive transistor 420. A current flows through the light-emitting element 105, and then the light-emitting element 105 emits light with a brightness corresponding to the current.
The signal supplied to the pixel circuit 400 is supplied from the drive circuit 108 electrically connected to the pixel circuit 400. The drive circuit 108 may be arranged between the display region 116 and the first step 112. An example in which a plurality of drive circuits 108 is arranged so as to sandwich the display region 116 is shown in
The drive circuit 108 may be electrically connected to an external drive circuit via a wiring (not shown), and may drive the pixel 104 according to a signal supplied from the external drive circuit. A driving IC (Integrated Circuit) can be used as the external drive circuit. The driving IC can supply the signal to the drive circuit 108 via the mounting pad 110.
For example, the driving IC may be mounted on the substrate 102 by COF (Chip On Film) using an anisotropic conductive film (ACF: Anisotropic Conductive Film). In this case, for example, an FOG (Film On Glass) on which a wiring substrate is mounted using the anisotropic conductive film can be used as the terminal electrode 124 of the mounting pad 110. In the case where COF is installed on the mounting pad 110 using FOG, COF is installed by thermocompression bonding with the mounting pad 110 in the COF mounting region 128 including the mounting pad 110 shown in
The sensor electrode 122 is arranged in the touch sensor 106. The sensor electrode 122 is connected to the sensor wiring 126. The sensor wiring 126 is electrically connected to the wiring 138 via the contact 132 arranged in the contact portion 134. The wiring 138 is electrically connected to the terminal wiring 150. The terminal wiring 150 is connected to the terminal electrode 124 arranged in the mounting pad 110. As a result, the sensor electrode 122 is electrically connected to the terminal electrode 124.
As shown in
A capacitive method, a resistance film method, or the like can be used for the touch sensor 106. In the case where the capacitive method is used for the touch sensor 106, the plurality of sensor electrodes 122 is arranged in a matrix in, for example, the display region 116. The plurality of sensor electrodes 122 may be connected in a row direction (direction X) or a column direction (direction Y), respectively, as shown in
A driving IC can be used for a drive circuit for driving the sensor electrode 122 similar to the external drive circuit of the pixel 104. The sensor electrode 122 is electrically connected to the driving IC via the mounting pad 110 electrically connected to the sensor wiring 126. The above-described FOG or COF can be used for the mounting pad 110 and the driving IC.
The sensor wiring 126 and the mounting pad 110 are electrically connected by connecting the sensor wiring 126 and the wiring 138. Specifically, as shown in
As shown in
The contact portion 134 is arranged between the first step 112 surrounding the display region 116 and the second step 114 surrounding the first step 112. The contact portion 134 is located between an end portion of the substrate 102 on which the mounting pad 110 is arranged and the first step 112.
The sensor wiring 126 electrically connected to the contact portion 134 extends intersecting the first step 112 between the sensor electrode 122 and the contact portion 134. Furthermore, the wiring 138 electrically connected to the contact portion 134 extends intersecting the second step 114 between the mounting pad 110 and the contact portion 134.
As shown in
The sensor wiring 126 is arranged between the plurality of protrusions 142. The sensor wiring 126 is arranged so as to intersect the first step 112. The sensor wiring 126 is directly or electrically connected to the wiring 138 at the contact 132 described above. The wiring 138 is arranged so as to intersect the second step 114.
Further, as shown in
Although the sensor wiring 126 is electrically connected to the terminal electrode 124 via a plurality of wirings and contacts as described above, the terminal electrode 124 may extend as a wiring to the contact 132 and may be directly connected to the sensor wiring 126 at the contact 132.
As described above, the display device 100 includes the substrate 102, and for example, a glass substrate, a quartz substrate, or an organic resin substrate may be used as the substrate 102. In the case where an organic substrate is used, the substrate 102 may have flexibility.
As described above, a base film 156 may be arranged on the substrate 102. The base film 156 can prevent contamination from the substrate 102 and, for example, an inorganic insulating material can be used. For example, silicon nitride, silicon oxide, and composites thereof can be used as the inorganic insulating material.
As described above, an insulating film 158 may be arranged on the base film 156. The insulating film 158 in the display region 116 may have a gate insulating film function of the transistor included in the pixel 104 and the drive circuit 108. A material similar to that of the base film 156 can be used for the insulating film 158.
Above the insulating film 158, a signal line 172 may be arranged in the display region 116, and the wiring 138 may be arranged in a peripheral region. The signal supplied from the drive circuit 108 shown in
An interlayer film 160 may be arranged on the signal line 172 and the insulating film 158 so as to cover the signal line 172 and the wiring 138. The interlayer film 160 may also function as a planarization film for the signal line 172 or the wiring 138. A material similar to that of the base film 156 can be used for the interlayer film 160.
The terminal wiring 150 that connects with the wiring 138 at the contact 152 may be arranged on the wiring 138 and the interlayer film 160. A material similar to that of the signal line 172 and the wiring 138 may be used for the terminal wiring 150.
A planarization layer 174 may be arranged on the interlayer film 160 and the signal line 172 in the display region 116. Further, the first step 112 and the second step 114 are arranged on the interlayer film 160 in the peripheral region 118. The first step 112 and the second step 114 are arranged between the pixel 104 located in the display region 116 and the terminal electrode 124 located in the peripheral region 118. The first step 112 is arranged between the pixel 104 and the second step 114. For example, as shown in
The first step 112 may be configured with a stacked structure. For example, as shown in
The second step 114 may be formed in the same manner as the first step 112. For example, as shown in
Further, the insulating film 154 contiguous with the second step 114 may be arranged on the terminal wiring 150. The insulating film 154 may be formed at the same time or in the same manufacturing process as the second step 114. For example, the insulating film 154 can be formed by arranging the planarization layer 114-1 among the films forming the second step 114 up to the top of the terminal wiring 150, arranging a full-tone mask on the planarization layer 114-1 corresponding to the second step 114, arranging a halftone mask from the outer edge 114e of the planarization layer 114-1 to the top of the terminal wiring 150, performing exposure, and developing and firing. The halftone mask is a photomask having a non-uniform light transmittance and a low light transmittance compared with the full-tone mask.
In this case, the terminal wiring 150 arranged under the insulating layer 154 includes a portion that is exposed from the insulating film 154 in the COF mounting region 128, which can be used as the terminal electrode 124 of the mounting pad 110.
A material similar to that of the signal line 172 or the wiring 138 can be used as a material used for the terminal electrode 124 and the terminal wiring 150. In addition, photosensitive organic resin materials, including acrylic resin, polysiloxane, polyimide, polyester, and the like can be used as the planarization layer 174, the planarization layer 112-1, the planarization layer 114-1, and the insulating film 154, which can function as organic insulating layers. Further, a photosensitive organic resin material including an epoxy-resin, an acrylic-resin, or the like can be used as the insulating layer 113 and the insulating layer 115.
Further, a spacer 176 and a partition layer 170 may be arranged on the planarization layer 174. The partition layer 170 functions as a partition that defines the pixel 104. In addition, the partition layer 170 is arranged so as to cover an end portion of the light-emitting element electrode arranged in the pixel 104. The spacer 176 may be arranged on the partition layer 170 and may have a function of supporting a fine mask used in a manufacturing process of the light-emitting element of the pixel 104, for example, a vapor deposition process.
The partition layer 170 and the spacer 176 can be formed from the same layer.
A sealing layer 166 is arranged on the spacer 176 and in a region surrounded by the first step 112 and the second step 114 in a plan view. The sealing layer 166 includes a plurality of insulating layers, each of which may be arranged with different functions. For example, as shown in
A region surrounded by the first step 112 and the second step 114 includes the display region 116, and in the case where an organic EL element is used for the pixel 104, the first inorganic insulating layer 178 covers the region, thereby suppressing entry of impurities into the organic EL element. For example, an inorganic compound such as silicon oxide or silicon nitride can be used as the first inorganic insulating layer 178.
The first organic insulating layer 180 is arranged in a region above the first inorganic insulating layer 178 and surrounded by the first step 112 in a plan view. The first organic insulating layer 180 is arranged along the outer edge 112e so as not to exceed the planarization layer 112-1 or the first step 112. In addition, the first organic insulating layer 180 can planarize the surface of the pixel 104 and in the case where the light-emitting element is arranged in the pixel 104, the light-emitting element can be protected from contaminants. The same material as that of the insulating film 154 can be used for the first organic insulating layer 180.
The second inorganic insulating layer 182 may be arranged on the first organic insulating layer 180 and in a region surrounded by the first step 112 and the second step 114 in a plan view. The second inorganic insulating layer 182 contacts the first inorganic insulating layer 178 at a region outside the organic insulating layer. As a result, the first inorganic insulating layer 178 and the second inorganic insulating layer 182 cover the first step 112 and extend outside the first step 112. With such a configuration, the first inorganic insulating layer 178 and the second inorganic insulating layer 182 can seal the first organic insulating layer 180. For example, an inorganic compound such as silicon nitride can be used as the second inorganic insulating layer 182.
A plurality of different types of films, such as the first organic insulating layer 180 and the second inorganic insulating layer 182 described above, can be planarized on the pixel 104 and protected from light-emitting element contaminants arranged on the pixel 104, so that in the display region 116, a structure, such as the touch sensor 106, can be arranged on the pixel 104.
The sensor electrode 122 may be arranged on the second inorganic insulating layer 182 in the display region 116. Since the sensor electrode 122 is arranged in the display region 116, a transparent conductive film of light transmittance oxide that can ensure visibility of a displayed image, such as indium-tin oxide (ITO), indium-zinc oxide (IZO), zinc oxide (ZnO), or indium-tin-zinc oxide (ITZO), having conductivity, can be used, for example.
In addition, the sensor wiring 126 that connects with the sensor electrode 122 and the wiring 138 is arranged on the sealing layer 166. Specifically, the sensor wiring 126 is arranged on the second inorganic insulating layer 182 of the sealing layer 166. Since the second inorganic insulating layer 182 is also arranged on the first step 112, the sensor wiring 126 is also arranged on the first step 112. A material similar to that of the signal line 172 and the wiring 138 can be used for the sensor wiring 126.
Further, the overcoat layer 168 is arranged so as to cover the sensor electrode 122 and the sensor wiring 126. In a plan view, the overcoat layer 168 is arranged in a region surrounded by the second step 114. The same material as that of the first organic insulating layer 180 can be used for the overcoat layer 168.
The counter substrate 120 may be arranged on the overcoat layer 168. In
Applying such an adhesive to the surface facing the structure on the substrate 102 makes it possible to bond the counter substrate 120 and the substrate 102 using the adhesive layer 169.
At least one of the planarization layer 112-1 and the insulating layer 113 in the first step 112 has the plurality of protrusions 142 protruding toward the terminal electrode 124 in a plan view, and has an intermediate region 140 therebetween. For example, as shown in
The outer edge 112e of the planarization layer 112-1 or the insulating layer 113 in the first step 112 has a curved shape 186 in a plan view from the protrusion 142-1 to the intermediate region 140. In addition, the sensor wiring 126 that intersects with the first step 112 intersects at the intermediate region 140 and extends toward the terminal electrode 124.
The plurality of sensor wirings 126 crosses over the first step 112 and is arranged between the plurality of protrusions 142, respectively. As shown in
The first step 112 having a plurality of protrusions 142 will be described with reference to
The outer edge 112e has the curved shape 186 that curves from the protrusion 142 to the intermediate region 140, as described above. The curved shape 186 is formed by a first curve line 188. As shown in
In addition, an interval between the protrusions 142 can be increased or decreased according to the width and intervals of the sensor wiring 126. For example, as shown in
The first step 112 at a first point 190 on the first curve line 188 has a surface 198 inclined with respect to a first surface 196 facing the substrate 102 in a cross-sectional view. The inclined surface 198 and the first surface 196 intersect at the first point 190 in a cross-sectional view. In a cross-sectional view, an angle θ1 formed between the inclined surface 198 and the first surface 196 is 10° or more and 60° or less. More preferably, the angle θ1 formed between the inclined surface 198 and the first surface 196 is 10° or more and 45° or less in a cross-sectional view. In this case, the angle θ1 is defined by the steepest angle of the inclined surface 198.
Specifically, the angle θ1 will be described with reference to
A process for manufacturing the first step 112 will be described with reference to
Next, the insulating layer 113 may be formed in the same layer as the spacer 176 and the partition layer 170 formed on the planarization layer 174. A resin film is formed on the interlayer film 160 and the planarization layer 112-1, and the mask SPC is arranged as shown in
The inclined surfaces of the first step 112 and the protrusion 142 will be described with reference to
Furthermore, the sealing layer 166 may cover not only the outer edge 112e of the first step 112 but also the oppositely located inner end portion without exposing the first step 112. Specifically, the first inorganic insulating layer 178 may cover the end portion inside the first step 112.
In addition, in the sealing layer 166 covering the first step 112, the layer in contact with the first step 112 has a gently inclined surface of the first step 112, and therefore, even if it is a layer using an inorganic compound, a layer having uniform film quality can cover the first step 112 without exposing the first step 112.
As described above, the first step 112 is not exposed, the first inorganic insulating layer 178 covers both side surfaces or both end portions of the first step 112 with a uniform film quality, and the second inorganic insulating layer 182 covers the outer edge 112e of the first step 112 with a uniform film quality, whereby external moisture can be prevented from penetrating through the second inorganic insulating layer 182 and the first inorganic insulating layer 178 and entering the inside of the panel. As a result, it is possible to suppress adverse effects such as shortening of life due to moisture on the light-emitting element.
Referring now to
Therefore, since the outer edge 112e has the curved shape from the protrusion 142 to the intermediate region 140, as shown in
In the display device 100, the first step 112 is arranged between the pixel 104 and the terminal electrode 124 on the substrate 102, the first step 112 has the plurality of protrusions 142 protruding toward the terminal electrode 124 in a plan view and the intermediate region 140 between the plurality of protrusions 142, and the outer edge of the first step 112 is curved from the protrusion 142 to the intermediate region 140. Therefore, applying the present embodiment makes it possible to maintain the step coverage when the sealing layer 166 covers the first step 112 or when the film is formed on the first step 112, thereby providing a highly reliable display device.
Furthermore, in the display device 100, since the sensor wiring 126 gets over the first step 112 at the protrusion 142 and the protrusion 142 at the intermediate region 140, it is possible to suppress the occurrence of a short circuit between the sensor wirings 126 due to the film remaining when the sensor wirings 126 are formed, thereby providing a display device with high yield and high reliability.
In addition, if the miniaturization of the sensor electrode 122 results in a large number of sensor wirings 126 being used, or when further miniaturization of the sensor wiring 126 is required, then the distance between the protrusions 142 is reduced and the outer shape of the intermediate region 140 is not linear. In such a case, the stress does not concentrate on the sealing layer 166 and the sensor wiring 126 between the protrusions 142 having the curved shape 186 because the border between the interlayer film 160 and the inclined surface 198 beyond the first step 112 is the curved shape 186 and the angle 81 is gentle. Therefore, the sealing layer 166 and the sensor wiring 126 have good film quality and are less likely to crack on the first step 112 and near the border between the interlayer film 160 and the inclined surface 198. Therefore, applying the present embodiment makes it possible to suppress a defect or degradation of the display device 100, thereby providing a display device with high yield and high reliability.
Further, it is understood that, even if the advantageous effect is different from those provided by each of the above-described embodiments, the advantageous effect obvious from the description in the specification or easily predicted by persons ordinarily skilled in the art is apparently derived from the present invention.
Number | Date | Country | Kind |
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2022-142145 | Sep 2022 | JP | national |