DISPLAY DEVICE

Abstract

An oscillator circuit includes (2n+1) inverters connected in series when n is a natural number, an integrator circuit having an input terminal connected to an output terminal of a (2n+1)-th inverter and an output terminal connected to an input terminal of a first inverter, first and second p-type transistors connected in series between the input terminal of the first inverter and a first reference potential, and first and second n-type transistors connected in series between the input terminal of the first inverter and a second reference potential. An output voltage of a j-th inverter is applied to control electrodes of the first p-type transistor and the first n-type transistor. An output voltage of a k-th inverter is applied to control electrodes of the second p-type transistor and the second n-type transistor. Symbol j is an odd number, k is an even number, and j

Description

BRIEF DESCRIPTION OF THE DRAWINGS

These and other objects and advantages of this invention will become more fully apparent from the following detailed description taken with the accompanying drawings in which:

FIG. 1 is a diagram showing the rough configuration of one substrate of a liquid crystal display panel according to an embodiment of the present invention;

FIG. 2 is a circuit diagram showing the circuit configuration of an oscillator circuit within a common pulse oscillator circuit shown in FIG. 1;

FIG. 3 is a schematic diagram showing a voltage waveform of a node (a) at the time of oscillation operation of the oscillator circuit shown in FIG. 2;

FIG. 4 is a graph showing an example of a relationship between the oscillation frequency and the supply voltage of the oscillator circuit shown in FIG. 2; and

FIG. 5 is a circuit diagram showing the circuit configuration of a general oscillator circuit.

Claims

1. A display device comprising: a display panel having a plurality of pixels; anda driver circuit that drives the plurality of pixels, respectively,wherein the driver circuit includes an oscillator circuit,wherein the oscillator circuit includes: (2n+1) inverters having a first inverter to a (2n+1)-th inverter which are connected in series when n is an integer of 1 or larger;an integrator circuit having an input terminal connected to an output terminal of the (2n+1)-th inverter and an output terminal connected to an input terminal of the first inverter;first and second p-type transistors which are connected in series between the input terminal of the first inverter and a first reference potential; andfirst and second n-type transistors which are connected in series between the input terminal of the first inverter and a second reference potential,wherein an output voltage of a j-th inverter is applied to control electrodes of the first p-type transistor and the first n-type transistor,wherein an output voltage of a k-th inverter is applied to control electrodes of the second p-type transistor and the second n-type transistor, andwherein j is an odd number, and k is an even number, and j<k=2n is satisfied.

2. The display device according to claim 1, wherein the integrator circuit includes: a resistor element which is connected between the input terminal of the first inverter and the output terminal of the (2n+1)-th inverter; anda capacitor element that is connected between the input terminal of the first inverter and the first reference potential or the second reference potential.

3. The display device according to claim 1, wherein a relationship of (tdr+tdf)<(tf+tr) is satisfied: when tdr is a period of time during which a voltage of the input terminal of the first inverter is fixed to the first reference potential;when tdf is a period of time during which the voltage of the input terminal of the first inverter is fixed to the second reference potential;when tf is a period of time during which the voltage of the input terminal of the first inverter is shifted from the first reference potential to a threshold voltage of the first inverter; andwhen tr is a period of time during which the voltage of the input terminal of the first inverter is shifted from the second reference potential to the threshold voltage of the first inverter.

4. The display device according to claim 1, wherein a relationship of (tdr+tdf)<<(tf+tr) is satisfied: when tdr is a period of time during which a voltage of the input terminal of the first inverter is fixed to the first reference potential;when tdf is a period of time during which the voltage of the input terminal of the first inverter is fixed to the second reference potential;when tf is a period of time during which the voltage of the input terminal of the first inverter is shifted from the first reference potential to a threshold voltage of the first inverter; andwhen tr is a period of time during which the voltage of the input terminal of the first inverter is shifted from the second reference potential to the threshold voltage of the first inverter.

5. The display device according to claim 1, wherein a relationship of (tdr+tdf)/(tdr+tdf+tf+tr)<0.1 is satisfied: when tdr is a period of time during which a voltage of the input terminal of the first inverter is fixed to the first reference potential;when tdf is a period of time during which the voltage of the input terminal of the first inverter is fixed to the second reference potential;when tf is a period of time during which the voltage of the input terminal of the first inverter is shifted from the first reference potential to a threshold voltage of the first inverter; andwhen tr is a period of time during which the voltage of the input terminal of the first inverter is shifted from the second reference potential to the threshold voltage of the first inverter.

6. The display device according to claim 1, wherein each of the pixels has an active element, andthe active element includes a thin film transistor having a semiconductor layer made of polysilicon.

7. The display device according to claim 1, wherein each of the inverters includes a thin film transistor having a semiconductor layer made of polysilicon.

8. The display device according to claim 2, wherein the capacitor element and the resistor element are incorporated into the display panel.

9. The display device according to claim 2, wherein the capacitor element and the resistor element are externally attached to the display panel.