The present invention relates to a display device, more particularly to a repairing technique of recovering a function of a signal line.
A display device has an array substrate. The array substrate has a transparent substrate on which a circuit to apply a display voltage to each pixel is formed. In this array substrate, a defect in a line occurring in a manufacturing step might be a point defect or a linear defect on a display screen. In response, a short-circuit developed between adjacent lines (short-circuit defect) is repaired by cutting and removing a part of the short-circuit and making the lines function normally, for example. A break in a line (breaking defect) is repaired by connecting a part of the break and making the line function normally.
Various methods have been implemented to repair a breaking defect. Meanwhile, ensuring reliability and handling interconnection resistance of a repaired site (repaired part) have been big issues to be solved. Additionally, various considerations have been given on a method of reducing space on the array substrate required for repair or a method of minimizing influence of a repaired part on a product.
A method of repairing a breaking defect occurring in a line on the array substrate is described for example in Japanese Patent Application Laid-Open Nos. 2001-166704 and 9-033937 (1997). According to Japanese Patent Application Laid-Open No. 2001-166704, the number of preliminary lines to be used for repair is reduced. According to Japanese Patent Application Laid-Open No. 9-033937, a repaired part is covered with a seal to avoid an influence of sputter or projection of metal or leakage of light to occur during repair.
Japanese Patent Application Laid-Open Nos. 2001-166704 and 9-033937 are intended to repair a defect in a line in a display region.
Meanwhile, in a display device of recent years, particularly of a type employing COG (chip on glass) mounting, a line from a driver IC to a display region (hereinafter called a leading line) has been thinned considerably in response to higher density of driver ICs and a narrower frame. This makes the occurrence of a break in the leading line likely. Even if the leading line is not broken completely during manufacture, the leading line is still exposed to the danger of a line defect (partial breaking defect) that might lead to a break due to stress such as collision.
Such a defect in a line may be detected during a manufacturing step by an optical defect inspection system (automatic optical inspection: AOI) or an electric defect inspection system (array tester).
However, the leading line cannot be repaired by the techniques of Japanese of Patent Application Laid-Open Nos. 2001-16674 and 9-033937. Additionally, according to Japanese Patent Application Laid-Open Nos. 2001-16674 and 9-033937, repairing lines extend along opposite sides of a display region. This makes the repairing lines long, leading to increase in a resistance value.
It is an object to provide a display device capable of recovering a function of a leading line at a low resistance.
A display device includes a plurality of first signal lines, a plurality of second signal lines, a pixel switching element, a plurality of driving terminals, a plurality of leading lines, a repairing line. The plurality of first signal lines extend parallel to each other. The plurality of second signal lines extend parallel to each other while crossing the plurality of first signal lines. The pixel switching element is provided at an intersection of each of the first signal lines and each of the second signal lines. The plurality of driving terminals receive signals to be input to the plurality of first signal lines. The plurality of leading lines connect the plurality of driving terminals and the plurality of first signal lines in one to one relationship. The repairing line includes a conductive part extending along with the plurality of leading lines and is capable of electrically connecting at least one of the plurality of driving terminals and at least one of the plurality of leading lines at the plurality of first signal lines side thereof, through the conductive part. The at least one of the driving terminals and the at least one of the plurality of leading lines is corresponding to each other.
According to this display device, if a break occurs in one of the more leading lines, a function of this leading line can be recovered by a process of connecting an end part on the first signal lines side and an end part on the of the driving terminals side of this leading line through the repairing line.
The length of the repairing line is reduced, as comparing to a structure in which a repairing line connects the first signal line and one of the leading lines. As a result, a function of a leading line can be recovered at a low resistance.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
The array substrate 1 has a substrate (such as a transparent substrate, more specifically, a glass substrate, for example) not shown in the drawings. Various components described later are formed on this substrate. As shown in
The display region 10 includes a plurality of gate signal lines 12a and a plurality of source signal lines 12b. The plurality of gate signal lines 12a extend parallel to each other. In the below, a direction where the gate signal lines 12a extend is called an X direction. The plurality of source signal lines 12b extend parallel to each other while crossing the plurality of gate signal lines 12a. The source signal lines 12b extend in a Y direction substantially orthogonal to the X direction, for example.
In the illustration of
Regions each surrounded by one gate signal line 12a and one source signal line 12b correspond to respective pixels. These pixels are arranged in a matrix as a whole, for example.
In response to input of a signal to the gate signal line 12a, the pixel switching element 18 is turned on. If a signal is input to the source signal line 12b in this state, the storage capacitor C10 is charged with a voltage. The voltage for charging the storage capacitor C10 corresponds to a voltage to be applied to a pixel (more specifically, a display element such as a liquid crystal corresponding to this pixel). Display by the display element changes in response to this voltage.
In the illustration of
Each of the semiconductor chip mounting regions 20a and 20b is a region where a semiconductor chip (such as a gate driver (gate driver IC) or a source driver (source drive IC)) is mounted. As an example, a gate driver (not shown in the drawings) to output a signal to the gate signal line 12a is mounted in the semiconductor chip mounting region 20a and a source driver (not shown in the drawings) to output a signal to the source signal line 12b is mounted in the semiconductor chip mounting region 20b.
The semiconductor chip mounting region 20a includes a plurality of driving terminals 22a. The driving terminals 22a are for example juxtaposed in the Y direction. Each of the driving terminals 22a is connected to the gate signal line 12a through a leading line 24a. Specifically, the leading line 24a connects the gate signal line 12a and the driving terminal 22a. The plurality of driving terminals 22a are further connected to a plurality of output terminals (output bumps) of the gate driver. As a result, the gate driver and the gate signal lines 12a are electrically connected through the driving terminals 22a and the leading lines 24a.
A set of the gate signal line 12a and the leading line 24a form one line. The leading line 24a mentioned herein corresponds to a part of this line between the pixel switching element 18 nearest the driving terminal 22a and this driving terminal 22a.
The semiconductor chip mounting region 20b includes a plurality of driving terminals 22b. The driving terminals 22b are for example juxtaposed in the X direction. Each of the driving terminals 22b is connected to the source signal line 12b through a leading line 24b. Specifically, the leading line 24b connects the source signal line 12b and the driving terminal 22b. The plurality of driving terminals 22b are further connected to a plurality of output terminals (output bumps) of the source driver. As a result, the source driver and the source signal lines 12b are electrically connected through the driving terminals 22b and the leading lines 24b.
A set of the source signal line 12b and the leading line 24b form one line. The leading line 24b mentioned herein forms a part of this line between the pixel switching element 18 nearest the driving terminal 22b and this driving terminal 22b.
In the illustration of
The array substrate 1 is provided with a repairing line 40. The repairing line 40 includes a conductive part (hereinafter also called a repairing line) 43 extending parallel to the plurality of leading lines 24b. An end part of the leading line 24b near the source signal line 12b and the driving terminal 22b corresponding to this leading line 24b can become connected through the part 43. The repairing line 40 is formed of a repairing line 41, a repairing line 42, and the repairing line 43, for example. The repairing line 41 extends near the source signal lines 12b so as to cross one or more leading lines 24b. As an example, the repairing line 41 extends in the X direction and crosses all the leading lines 24b. In the illustration of
As a result of repairing process described later, the repairing line 41 can become electrically connected to each of the leading lines 24b.
As a result of repairing process described later, the repairing line 42 can become electrically connected to the aforementioned one or more leading lines 24b in a position closer to the driving terminals 22b than the repairing line 41. More specifically, the repairing line 42 extends for example in the X direction in a position closer to the driving terminals 22b than the repairing line 41. The repairing line 42 crosses all the leading lines 24b. The repairing line 42 extends near the driving terminals 22b. In the illustration of
The repairing line 43 connects the repairing lines 41 and 42. In the illustration of
With the use of the repairing line 40, if a break occurs in one leading line 24b in a region between the repairing lines 41 and 42, a function of this leading line 24b can be recovered by given repairing process. As an example,
The insulation of the insulating layer 30 at an intersection of the leading line 241b and the repairing line 41 is broken to fuse the leading line 241b and the repairing line 41 at this intersection, thereby connecting the leading line 241b and the repairing line 41. This forms electrical connection between the leading line 241b and the repairing line 41 as illustrated in
As a result, electrical connection is formed through the repairing line 40 between the source signal line 12b and the driving terminal 22b connected to the leading line 241b. Thus, a signal can be output to the source signal line 12b after bypassing the site of the break in the leading line 241b.
Like the repairing line 42, the repairing line 42′ extends near the driving terminals 22b. An insulating layer is interposed between the repairing line 42′ and the leading line 24b.
The repairing line 43′ extends for example in an area outside a region where the leading lines 24b are arranged and in an area outside the display region 10 and connects one end of the repairing line 41′ and one end of the repairing line 42′. Thus, the repairing line 40′ extends so as to surround the display region 10 from outside.
Even in the illustration of
Meanwhile, in the illustration of
In contrast, in the first embodiment, the repairing line 41 extends so as to cross the leading lines 24b. This makes a gap between the repairing lines 41 and 42 smaller than the gap between the repairing lines 41′ and 42′. Specifically, the repairing line 40 (a group of the repairing lines 41 to 43) is shorter than the repairing line 40′. This allows recovery of the leading line 241b at a low resistance. This can suppress a signal delay, leading to suppression of degradation of the display performance.
In the aforementioned example, all the leading lines 24b are to be repaired with the repairing line 40. However, this is not construed as a limitation. One or more leading lines 24b may be targeted for repair with the repairing line 40. Specifically, what is required is to provide the repairing line 41 in a manner allowing the repairing line 41 to become electrically connected to one leading line 24b or each of more leading lines 24b as a result of repairing process, to provide the repairing line 42 in a manner allowing the repairing line 42 to become electrically connected to this leading line 24b or each of these leading lines 24b in a position closer to the driving terminals 22b than the repairing line 41 as a result of repairing process, and to form connection between the repairing lines 41 and 42.
In the aforementioned example, the repairing line 40 is provided for the leading lines 24b. A comparable repairing line may also be provided for the leading lines 24a.
The repairing terminal 411 includes a plurality of repairing terminals 411, for example. Each of the repairing terminals 411 is connected to a corresponding one of the leading lines 24b. In the illustration of
The repairing terminal 412 is provided in corresponding relationship with the repairing terminal 411. The repairing terminal 412 is arranged near the corresponding repairing terminal 411. The repairing terminals 411 and 412 corresponding to each other form a pair and can become electrically connected to each other as a result of repairing process.
The repairing process is conducted for example as follows. A certain conductor (such as solder) is made to contact both the repairing terminals 411 and 412 corresponding to each other. Thus, the repairing terminals 411 and 412 can become electrically connected to each other. Forming the electrical connection between the repairing terminals 411 and 412 in this way forms electrical connection between the leading line 24b and the repairing line 41.
The repairing terminal 431 includes a plurality of repairing terminals 431, for example. Each of the repairing terminals 431 is connected to a corresponding one of the leading lines 24b. In the illustration of
These repairing terminals 431 are provided to the leading lines 24b connected to the repairing terminals 411. In the illustration of
The repairing terminal 432 is provided in corresponding relationship with the repairing terminal 431. The repairing terminal 432 is arranged near the corresponding repairing terminal 431. The repairing terminals 431 and 432 corresponding to each other form a pair and can become electrically connected to each other as a result of repairing process described later. Forming the electrical connection between the repairing terminals 431 and 432 forms electrical connection between the driving terminal 22b and the repairing line 42.
The repairing process is conducted for example as follows. A certain conductor (such as solder) is made to contact both the repairing terminals 431 and 432 in a pair. This can form the electrical connection between the repairing terminals 431 and 432.
The size, material, shape, and surface condition (such as surface accuracy) of the repairing terminals 411, 412, 431, and 432 can be determined so as to fit the aforementioned conductor (such as solder).
In the illustration of
In the first embodiment, a laser is applied to fuse each of the repairing lines 41 and 42 in an upper layer and the leading line 24b in a lower layer while breaking the insulating layer 30, thereby electrically connecting each of the repairing lines 41 and 42 and the leading line 24b. This might cause splash of a line material or an insulating material, for example. In response to the occurrence of the splash or the like, a cleaning step should be conducted in some cases to remove the splash.
In the second embodiment, the repairing terminals 411 and 412 are connected with the conductor (such as solder) 60 and the repairing terminals 431 and 432 are connected with the conductor (such as solder) 60 as described above. This does not cause the aforementioned splash, so that manufacturing cost can be reduced.
Repairing process with a laser requires the repairing line 42 to extend so as to cross the leading line 24b with intervention of the insulating layer 30. In the second embodiment, the repairing line 42 is not required to cross the leading line 24b. Specifically, wiring of the repairing line 42 can be determined more flexibly. In the illustrations of
In the second embodiment, repairing terminals are provided to both the repairing lines 41 and 42. Alternatively, a repairing terminal may be provided to at least one of the repairing lines 41 and 42.
In the first or second embodiment, exposure of a part where the leading line 24b and the repairing line 40 are electrically connected (specifically, a repaired part) to the outside is not desirable in terms of reliability. A third embodiment is intended to seal a part to be repaired (hereinafter called a repairing process target part).
The repairing line 42 is described first. In the third embodiment, a repairing process target part of the repairing line 42 is arranged in the semiconductor chip mounting region 20b. Referring to
A source driver is arranged in the semiconductor chip mounting region 20b.
A source driver 26b has an output terminal 261b. The output terminal 261b is arranged to face the driving terminal 22b in one to one relationship. The output terminal 261b includes a plurality of output terminals 261b. These output terminals 261b face the plurality of driving terminals 22b. An anisotropic conductive film 50 is interposed between the output terminal 261b and the driving terminal 22b facing each other.
The anisotropic conductive film 50 is made of a mixture of resin and conductive particles (such as metal particles). As an example, the resin may be a thermosetting resin or a light curing resin. The source driver 26b is fixed in the semiconductor chip mounting region 20b with this resin. The conductive particles provide favorable electrical connection between the output terminal 261b and the driving terminal 22b.
The anisotropic conductive film 50 is provided to extend not only between the output terminal 261b and the driving terminal 22b but also extend through a region (semiconductor chip mounting region 20b) entirely where the source driver 26b is arranged. As a result, a repairing process target part is covered and sealed with the anisotropic conductive film 50.
A distance between different electrical elements inside the semiconductor chip mounting region 20b (such as a distance between the output terminals 261b or a distance between the output terminal 261b and the repairing line 42) is longer than a distance between the output terminal 261b and the driving terminal 22b. Thus, the anisotropic conductive film 50 does not hinder electrical insulation between these different electrical elements.
The anisotropic conductive film 50 is not always required to extend through the semiconductor chip mounting region 20b entirely. Alternatively, the anisotropic conductive film 50 may extend to surround the semiconductor chip mounting region 20b. This allows hermetic sealing of internal space between the source driver 26b and a substrate. A repairing process target part is formed in this internal space, so that it is to be sealed with the anisotropic conductive film 50.
As described above, the aforementioned structure achieves sealing of a repairing process target part of the repairing line 42, thereby enhancing reliability of wiring. Further, the aforementioned example does not require an additional sealing member dedicated to sealing a repairing process target part but makes the anisotropic conductive film 50 further function to seal the repairing process target part. This achieves reduction in manufacturing cost.
The repairing line 41 is described next. A repairing process target part of the repairing line 41 can be sealed with a sealing member to seal a liquid crystal.
A repairing process target part of the repairing line 41 is placed inside a region surrounded by the sealing member 4. In the illustration of
As a result, reliability of wiring is enhanced. Further, the aforementioned example does not require an additional sealing member dedicated to sealing a repairing process target part of the repairing line 41 but makes the sealing member 4 intended to seal the liquid crystal 3 further function to seal this repairing process target part. This achieves reduction in manufacturing cost.
A repairing process target part of the repairing line 41 is not always required to be surrounded by the sealing member 4 in a plan view. As an example, the repairing process target part may be arranged in a position overlapping the sealing member 4 in a plan view. In this case, the repairing process target part is covered and sealed with the sealing member 4.
In the third embodiment, only one of the repairing lines 41 and 42 may be required to be sealed by the corresponding method described above. The other of the repairing lines 41 and 42 may be sealed by a method different from the corresponding method described above. Even in this case, effect of one of the methods can still be achieved.
Referring to
In a fourth embodiment, a plurality of leading line 24b are divided into a plurality of groups and the repairing line 40 is provided for each of these groups.
The repairing line 40a includes a repairing line 41a, a repairing line 42a, and a repairing line 43a. The repairing line 41a extends so as to cross leading lines 24b in the left half of the plane of the sheet of the plurality of leading lines 24b. The repairing line 42a extends so as to cross the leading lines 24b in the left half of the plane of the sheet in a position closer to the driving terminals 22b (lower part of the plane of the sheet) than the repairing line 41a. The repairing line 43a extends on the left side of the plane of the sheet relative to a region where the plurality of leading lines 24b are arranged. The repairing line 43a connects the repairing lines 41a and 42a.
The repairing line 40b includes a repairing line 41b, a repairing line 42b, and a repairing line 43b. The repairing line 41b extends so as to cross leading lines 24b in the right half of the plane of the sheet of the plurality of leading lines 24b. The repairing line 42b extends so as to cross the leading lines 24b in the right half of the plane of the sheet in a position closer to the driving terminals 22b than the repairing line 41b. The repairing line 43b extends on the right side of the plane of the sheet relative to the region where the plurality of leading lines 24b are arranged. The repairing line 43b connects the repairing lines 41b and 42b.
According to the aforementioned structure, if a break occurs in one of the leading lines 24b in the left half, a function of this leading line 24b can be recovered as a result of repairing process using the repairing line 40a. Likewise, if a break occurs in one of the leading lines 24b in the right half, a function of this leading line 24b can be recovered as a result of repairing process using the repairing line 40b. This can increase the number of recoverable leading lines 24b.
Additionally, the repairing lines 40a and 40b are shorter than the repairing line 40 of the first to third embodiments. Referring to
In the aforementioned example, the leading lines 24b are divided into two groups, the group in the right half and that in the left half. Meanwhile, groups of the leading lines 24b can be determined arbitrarily.
In a fifth embodiment, the array substrate 1 is provided with a structure intended to check a break in the source signal line 12b and the leading line 24b.
In comparison to the array substrate 1 of
The array testing terminal 28b is connected to the repairing line 42. As an example, the array testing terminal 28b is connected to one end of the repairing line 42 (an end on the opposite side of the repairing line 43).
As shown in
As described next, adopting the array substrate 1 enables a check for a break in the source signal lines 12b and the leading lines 24b with the array testing terminal 28b and the array testing terminals 30b. First, testing needles (probes) are pressed against the array testing terminal 28b and the array testing terminals 30b. Then, a first potential is applied to one array testing terminal 30b and a second potential different from the first potential is applied to the array testing terminal 28b. As an example, a DC power source is connected between this array testing terminal 30b and the array testing terminal 28b.
At this time, in the absence of a break in a path between this array testing terminal 30b and the array testing terminal 28b, a current flows in this path. In the illustration of
If a break occurs in one of these two paths, a current flows only in the other path. The value of this current is smaller than the value of a current flowing in the two paths. Thus, by detecting this current and determining that this current is smaller than a reference value, the occurrence of a break in one path can be determined. In the absence of flow of a current, the occurrence of breaks in both the paths can be determined. Such detection and determination can be done by a well-known tester with probes.
Meanwhile, the tester finds difficulty in determining which one of the two paths connected to the array testing terminal 30b suffers from a break. Thus, the tester does not specify a path but notifies an operator of both of these paths. The operator having received the notification visually checks these paths and specifies a location of the break.
The aforementioned test is conducted repeatedly by applying a potential to the plurality of array testing terminals 30b in order. Thus, all the source signal lines 12b and all the leading lines 24b can be subjected to check for a break.
As described above, adopting the array substrate 1 of the fifth embodiment enables a check for a break in the source signal lines 12b and the leading lines 24b using the array testing terminal 28b, the array testing terminals 30b, and the repairing line 42. This allows reduction in a circuit scale and manufacturing cost, compared to provision of a line (line dedicated to check for a break) different from the repairing line 42.
In the aforementioned example, the array testing terminal 30b is connected to two source signal lines 12b. Alternatively, the array testing terminal 30b may be connected to one source signal line 12b or three or more source signal lines 12b.
In the illustration of
Adopting the aforementioned structure enables check for a break in the gate signal lines 12a and the leading lines 24a in the same way as a check for a break in the source signal lines 12b and the leading lines 24b.
If a repairing line is provided for the leading lines 24a, a part of this repairing line can also be used as a break checking line.
The embodiments of the present invention can be combined freely or each of the embodiments can be modified or omitted where appropriate without departing from the scope of the invention.
While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention.
Number | Date | Country | Kind |
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2014-110765 | May 2014 | JP | national |
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An Office Action; “Notification of Reasons for Refusal,” issued by the Japanese Patent Office on Mar. 13, 2018, which corresponds to Japanese Patent Application No. 2014-110765 and is related to U.S. Appl. No. 14/716,173; with English language translation. |
An Office Action mailed by the Japanese Patent Office dated Jun. 12, 2018, which corresponds to Japanese Patent Application No. 2014-110765 and is related to U.S. Appl. No. 14/716,173. |
Number | Date | Country | |
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20150348480 A1 | Dec 2015 | US |