The present invention relates generally to a large-sized display device and, more particularly, to electrical connections of display electrode driver circuits for a large-sized display device including arrays of plasma tubes each having a phosphor layer therein.
In a plasma display panel (PDP), plasma discharge is generated in closed discharge spaces of a large number of small cells arranged in length and width directions of the panel, and phosphor materials are excited by ultraviolet light of 147 nm emitted from the discharged plasma, to thereby emit light. The cell spaces are formed between two planar glass plates disposed one on the other. On the other hand, in a plasma tube array (PTA), a phosphor layer is formed within a thin elongated glass tube or a supporting member having a phosphor layer formed thereon is inserted into the thin elongated glass tube, so that a large number of cell spaces are formed in the elongated glass tube. A large-sized display screen of 6 m×3 m, for example, can be provided by arranging a number of such plasma tubes side by side. In an ordinary plasma tube array, X-electrode sustain voltage pulses are applied to X-electrodes by an X-electrode driver device, and Y-electrode sustain voltage pulses are applied by a Y-electrode sustain voltage pulse circuit in a Y-electrode driver circuit through a scan driver circuit in the Y-electrode driver circuit.
Japanese Patent Application Publication No. 2000-47636-A describes an AC plasma display device with improved unevenness of its brightness. In the AC plasma display device, pairs of a sustain electrode and a scan electrode are divided into a first block and a second block. The first block of sustain electrodes and scan electrodes are driven by a first sustain electrode driver and a first scan electrode driver, respectively. The second block of sustain electrodes and scan electrodes are driven by a second sustain electrode driver and a second scan electrode driver, respectively. An output line of the first sustain electrode driver and an output line of the second sustain electrode driver are connected by a short-circuit line. An output line of a scan/sustain pulse generator section which forms the first scan electrode driver, and an output line of a scanning/maintaining pulse generator section which forms the second scan electrode driver are connected by a short-circuit line. Japanese Patent Application Publication No. 2004-178854-A describes a light-emitting tube array display device. The light-emitting tube array display device includes an array of light-emitting tubes forming a display screen, supports which support the array of light-emitting tubes on the display surface side and the back surface side and have a plurality of stripe electrodes for applying voltage to the light-emitting tubes formed on the sides facing the light-emitting tube array, a terminal electrode lead-out part provided on the support outside the display area of the display screen, a relay electrode lead-out part provided on the support inside the display area of the display screen, a first driver for applying voltage to the terminal electrode lead-out part, and a second driver for applying voltage to the relay electrode lead-out part. According to this arrangement, a display device with a large size screen has an electrode structure for preventing voltage drop to thereby improve unevenness of brightness of the display device.
In one PDP, the luminosity is typically controlled in the aggregate by luminosity control in accordance with the entire load rate. When the display load ratio is higher, i.e. when the luminosity of the entire screen is higher, the luminosity of the display screen as a whole is controlled to be relatively lower. On the other hand, when the display load ratio is lower, i.e. when the luminosity of the display screen as a whole is lower, the luminosity of the screen as a whole is made to be relatively higher. Thus, when one picture is displayed with a plurality of display units, there may be variations in luminosity among the units. It is known to control a plurality of driver circuits for a PDP composed of a plurality of display units, by means of software implemented on a control circuit, to reduce variations in luminosity among the display units.
In a large-sized display device composed of adjacently disposed plural units of plasma tube arrays with respective driver circuits, components of resistance, inductance and/or capacitance of display electrodes may affect the driving by the driver circuits. In particular, when a driving voltage is applied to a display device including electrodes longer than a specific length, the impedance of the electrodes may hamper application of a sufficient voltage for driving the display device to the electrodes over their entire length. Thus, there is a limit to the length of display electrodes driven by a driver circuit connected to ends of the electrodes. When the display electrodes of the plural units are driven by one driver circuit, the total length of the display electrodes is too long for potential distribution along the length of the display electrodes to be uniform, and, particularly, the voltage applied in the end portion of the display screen opposite to the end where the driver circuit is connected cannot be sufficiently high. This may cause luminosity unevenness, or may cause picture regions, e.g. white picture regions, of the plural units, which should have the same luminosity, to have different luminosities due to the luminosity control made for different load ratios of the units by the respective driver circuits. Difference in luminosity between picture regions of the plural units, which should have the same luminosity, cannot be sufficiently decreased by controlling the respective driver circuits for the plural units by means of software.
The inventors have recognized that, in a large-sized display device including plasma tube array units disposed adjacent to each other having respective drive circuits therefor, unevenness in luminosity among the units can be significantly reduced by advantageously designing the disposition and connections of the plural display driver circuits for the plural plasma tube array units.
An object of the invention is to reduce unevenness in luminosity in a large-sized display device including plural display units.
Another object of the invention is to reduce unevenness in luminosity between display units of a large-sized display device including such display units.
A further object of the invention is to reduce unevenness in luminosity in each of display units of a large-sized display device including such display units.
In accordance with an aspect of the present invention, a display device includes a plurality of units, each unit including a plurality of gas discharge tubes disposed adjacent to each other. Each of the gas discharge tube has a phosphor layer formed therein and is filled with discharge gas. Each of the gas discharge tubes further has a plurality of light emitting points along a longitudinal direction thereof. Each of the units further includes a plurality of pairs of display electrodes disposed on display surface sides of the plurality of gas discharge tubes, and a plurality of signal electrodes disposed on rear surfaces of the plurality of gas discharge tubes. The display device further includes at least one scan driver circuit which applies a scan voltage to corresponding display electrodes of the respective pairs of display electrodes of the plurality of units during a first period of time, and applies a sustain voltage pulse to the corresponding display electrodes during a second period of time. The one scan driver circuit applies the scan voltage to one display electrode of each of the pairs of display electrodes of adjacent two of the plurality of units, and applies the sustain voltage pulse to the one display electrode during the second period of time. The display device further includes at least two sustain voltage circuits which apply a potential for a sustain voltage pulse to the other display electrodes of the respective pairs of display electrodes of the plurality of units during the second period of time. At least one of the at least two sustain voltage circuits applies the potential for a sustain voltage pulse to the other display electrode of each of the pairs of display electrodes of at least one of outermost ones of the plurality of units.
The at least two sustain voltage circuits and the at least one scan drive circuit may be alternately disposed in the vicinity of corresponding ones from a group comprised of one of two outermost sides of the plurality of units, borders between adjacent ones of the plurality of units, and the other of the two outermost sides. The number of the plurality of units may be even, and the number of the at least one scan drive circuit may be smaller than the number of the at least two sustain voltage circuits.
The other corresponding display electrodes of the pairs of display electrodes of ones of the plurality of units may be electrically connected together via a conductor.
According to the invention, unevenness in luminosity in a large-sized display device including display units can be reduced, and unevenness in luminosity between display units and in each display unit of a large-sized display device including such units can be reduced.
The embodiments of the invention will be described with reference to the accompanying drawings. Throughout the drawings, similar symbols and numerals indicate similar items and functions.
A thin elongated tube 20 for the thin elongated plasma tubes 11R, 11G and 11B is formed of a transparent, insulating material, e.g. borosilicate glass, Pyrex®, soda-lime glass, silica glass, or Zerodur. Typically, the tube 20 has cross-section dimensions of a tube diameter of 2 mm or smaller, for example a 0.55 mm high and 1 mm wide cross section, and a tube length of 300 mm or larger, and a tube wall thickness of about 0.1 mm.
Phosphor support members having respective red, green and blue (R, G, B) phosphor layers 4 formed or deposited thereon are inserted into the interior rear spaces of the plasma tubes 11R, 11G and 11B, respectively. Discharge gas is introduced into the interior space of each plasma tube, and the plasma tube is sealed at its opposite ends. An electron emissive film 5 of MgO is formed on the inner surface of the plasma tube 11R, 11G, 11B. The phosphor layers R, G and B typically have a thickness within a range of from about 10 μm to about 30 μm.
Similarly to the gas discharge tubes 11R, 11G and, 11B, the support member is formed of a insulating material, e.g. borosilicate glass, Pyrex®, silica glass, soda-lime glass, or lead glass, and has the phosphor layer 4 formed thereon. The support member can be disposed within the glass tube by applying a paste of phosphor over the support member outside the glass tube and then baking the phosphor paste to form the phosphor layer 4 on the support member, before inserting the support member into the glass tube. As the phosphor paste, a desired one of various phosphor pastes known in this technical field may be employed.
The electron emissive film 5 emits charged particles, when it is bombarded with the discharge gas. When a voltage is applied between the pair of display electrodes 2, the discharge gas contained in the tube is excited. The phosphor layer 4 emits visible light by converting thereinto vacuum ultraviolet radiation generated in the de-excitation process of the excited discharge gas.
The signal electrodes 3 are formed on the front-side surface, or inner surface, of the rear support plate 32, and extend along the longitudinal direction of the plasma tubes 11R, 11G and 11B. The pitch, between adjacent ones of the signal electrodes 3, is substantially equal to the width of each of the plasma tubes 11R, 11G and 11B, which may be, for example, 1 mm. The pairs of display electrodes 2 are formed on the rear-side surface, or inner surface, of the front support plate 31 in a well-known manner, and are disposed so as to extend perpendicularly to the signal electrodes 3. The width of the display electrode 2 may be, for example, 0.75 mm, and the distance between the edges of the display electrodes 2 in each pair may be, for example, 0.4 mm. A distance providing a non-discharging region, or non-discharging gap, is secured between one display electrode pair 2 and the adjacent display electrode pairs 2, and the distance may be, for example, 1.1 mm.
The signal electrodes 3 and the pairs of display electrodes 2 are brought into intimately contact respectively with the lower and upper peripheral surface portions of the plasma tubes 11R, 11G and 11B, when the display device 10 is assembled. In order to provide better contact, an electrically conductive adhesive may be placed between the display electrodes and the plasma tube surface portions.
In plan view of the display device 10 seen from the front side, the intersections of the signal electrodes 3 and the pairs of display electrodes 2 provide unit light-emitting regions. Display is provided by using either one electrode of each pair of display electrodes 2 as a scan electrode Y, generating a selection discharge at the intersection of the scan electrode Y with the signal electrode 3 to thereby select a light-emitting region, and generating a display discharge between the pair of display electrodes 2 using the wall charge formed by the selection discharge on the region of the inner tube surface at the selected region, which, in turn, causes the associated phosphor layer to emit light. The selection discharge is an opposed discharge generated within each plasma tube 11R, 11G, 11B between the vertically opposite scan electrode Y and signal electrode 3. The display discharge is a surface discharge generated within each plasma tube 11R, 11G and 11B between the two display electrodes of each pair of display electrodes disposed in parallel in a plane.
The pair of display electrodes 2 and the signal electrode 3 can generate discharges in the discharge gas within the tube by applying voltages between them. The electrode structure of the plasma tubes 11R, 11G and 11B illustrated in
In
Now, one exemplary method for driving an AC gas discharge display device of the plasma tube array type is described. One picture typically has one frame period of approximately 16.7 ms. One frame consists of two fields in the interlaced scanning scheme, and one frame consists of one field in the progressive scanning scheme. For displaying a moving picture in a conventional television system, thirty frames per second must be displayed. In displaying on the display device 10 of this type of AC gas discharge display device, for reproducing colors by the binary control of light emission, one field F is typically divided into or replaced with a set of q subfields SF's. Often, the number of times of discharging for display for each subfield SF is set by weighting these subfields SF's with respective weighting factors of 20, 21, 22, . . . , 2q-1 in this order. N (=1+21+22+ . . . +2q-1) steps of brightness can be provided for each color of R, G and B in one field by associating light emission or non-emission with each of the subfields in combination. In accordance with such a field structure, a field period Tf, which represents a cycle of transferring field data, is divided into q subfield periods Tsf's, and the subfield periods Tsf's are associated with respective subfields SF's of data. Furthermore, a subfield period Tsf is divided into a reset period TR for initialization, an address period TA for addressing, and a display or sustain period TS for emitting light. Typically, the lengths of the reset period TR and the address period TA are constant independently of the weighting factors for the brightness, while the number of pulses in the display period TS becomes larger as the weighting factor becomes larger, and the length of the display period TS becomes longer as the weighting factor becomes larger. In this case, the length of the subfield period Tsf becomes longer, as the weighting factor of the corresponding subfield SF becomes larger.
The q subfields SF's have the same order of the reset period TR, the address period TA and the sustain period TS in the driving sequence, and this sequence is repeated for each subfield SF. During the reset period TR of each subfield SF, a negative polarity pulse Prx1 and a positive polarity pulse Prx2 are applied in this order to all of the display electrodes X's, and a positive polarity pulse Pry1 and a negative polarity pulse Pry2 are applied in this order to all of the display electrodes Y's. The pulses Prx1, Pry1 and Pry2 have ramping waveforms having the amplitudes which gradually increase at the rates of variation that produce micro-discharge. The first pulses Prx1 and Pry1 are applied to produce, in all of the cells, appropriate wall voltages having the same polarity, regardless of whether the cells have been illuminated or unilluminated during the previous subfield. Subsequently, the second pulses Prx2 and Pry2 are applied to the discharge cells on which an appropriate amount of wall charge is present, which adjusts the wall charge to decrease to a level (blanking state) at which sustain pulses cannot cause re-discharging. The driving voltage applied to the cell is a combined voltage which represents difference between the amplitudes of the pulses applied to the respective display electrodes X and Y.
During the address period TA, wall charges required for sustaining illumination are formed only on the cells to be illuminated. While all of the display electrodes X's and of the display electrodes Y's are biased at the respective predetermined potentials, a negative scan pulse voltage −Vy is applied to a row of a display electrode Y corresponding to a selected row for each row selection interval (a scan interval for one row of the cells). Simultaneously with this row selection, an address pulse voltage Va is applied only to address electrodes A's which correspond to the selected cells to produce address discharges. Thus, the potentials of the address electrodes A1 to Am are binary-controlled in accordance with the subfield data Dsf for m columns in the selected row j. This causes address discharges to occur in the discharge tubes of the selected cells between the display electrode Y's and the address electrode A's, and the display data written by the address discharges is stored in the form of wall charges on the cell inner walls of the discharge tubes. A sustain pulse applied subsequently causes surface discharges between the display electrodes X's and Y's.
During the sustain period TS, a first sustain pulse Ps is applied so that a polarity of the first sustain pulse Ps (i.e., the positive polarity in the illustrated example) is added to the wall charge produced by the previous address discharge to cause a sustain discharge. Then, the sustain pulse Ps is applied alternately to the display electrodes X's and the display electrodes Y's. The amplitude of the sustain pulse Ps corresponds to the sustain voltage Vs. The application of the sustain pulse Ps produces surface discharge in the discharge cells which have a predetermined amount of residual wall charge. The number of applied sustain pulses Ps's corresponds to the weighting factor of the subfield SF as described above. In order to prevent undesired opposite discharge between the opposite electrodes during the entire sustain period TS, the addressing electrodes A's are biased at a voltage Vas having the same polarity as the sustain pulse Ps.
The sustain voltage pulse circuit (SST) 50 includes a bias voltage source Vs to be coupled to X-electrodes X1-Xn via a switch, and ground potential GND to be coupled to X-electrodes X1-Xn via a switch.
The sustain voltage pulse circuit (SST) 60 includes a high pulse voltage source Vs coupled to the scan pulse circuit (SCN) 70 via a switch, and ground potential GND coupled to the scan pulse circuit 70 via a switch. The scan pulse circuit (SCN) 70 couples the pulse voltage source Vs and the ground potential GND to Y-electrodes Y1-Yn. The scan pulse circuit 70 further includes a bias voltage source Vsc to be coupled to the Y-electrodes Y1-Yn via a switch, and a scan pulse source −Vy to be coupled to the Y-electrodes Y1-Yn via a switch.
Referring to
Referring to
In
Referring to
In
The X-electrode portions led out from the left side of the unit 314 are connected to the X-electrode driver device 502 disposed on the rear side of the unit 314. The X-electrode portions led out from the right side of the unit 316 are connected to the X-electrode driver device 504 disposed on the rear side of the unit 316. The sustain voltage output terminals of the X-electrode driver devices 502 and 504 are connected together by a conductor 90, e.g. a copper wire. Alternatively, the conductor 90 may connect the X-electrodes at the left side of the unit 314 to the X-electrodes at the right side of the unit 316. The conductor 90 may be a copper strip or elongated plate having small impedance.
In this manner, current supplied from an X-electrode power supply (i.e. the sustain voltage pulse circuit 50) in the X-electrode driver device 502 can be made substantially equal to the current supplied from an X-electrode power supply (i.e. the sustain voltage pulse circuit 50) in the X-electrode driver device 504. This compensates for the difference between the units 314 and 316. In addition, the luminosity control by the two X-electrode driver devices 502 and 504 with the same circuit configuration allows proper control of the respective unit luminosities in accordance with the sum of the load ratios on the two units 314 and 316, to thereby sufficiently reduce the luminosity difference or luminosity unevenness present between regions of plural units where the luminosity should be equal.
In
With the disposition and connections of the display device 102 of
The X-electrode driver device 504 may be adjusted or adapted so as to have current supply capacity for the X-electrode sustain voltage two times as large as that of the X-electrode driver device 502. The X-electrodes on the left side of the unit 314 are connected to the X-electrodes on the right side of the unit 316 and the X-electrodes on the left side of the unit 318 via the conductor 90 on the rear side of the units 314, 316 and 318. Accordingly, current supplied by the X-electrode power supply (i.e., the sustain voltage pulse circuit 50) of the X-electrode driver device 502 is substantially equal to one-half of the current supplied by the X-electrode power supply (i.e., the sustain voltage pulse circuit 50) of the X-electrode driver device 504. Further, the luminosity control by the X-electrode driver devices 502 and 504 allows proper control of the respective unit luminosities in accordance with the sum of the load ratios of the three units 314, 316 and 318.
The Y-electrodes on the right side of the unit 318 are connected to the X-electrodes on the right side of the unit 314 and to the X-electrodes on the left side of the unit 316, through a conductor 92 on the rear side of the units 314, 316 and 318. The conductor 92 may be a thin copper strip or elongated plate exhibiting low impedance. Further, the luminosity control by the Y-electrode driver devices 702 and 704 allows proper control of the respective unit luminosities in accordance with the sum of the load ratios of the three units 314, 316 and 318. The power supply capacity for all of the X-electrode driver devices 502 and 504 and all of the Y-electrode driver devices 702 and 704 may be required to be sufficient to supply power to all the units 314, 316 and 318 for proper display.
In
With the disposition and connections of the display device 104 of
The sustain voltage output terminals of the sustain voltage pulse circuits SST of the Y-electrode driver devices 702 and 704 are connected together by the conductor 92. This connection allows the current supplied by the Y-electrode power supply (the sustain voltage pulse circuit SST) of the Y-electrode driver device 702 to be substantially equal to the current supplied by the Y-electrode power supply (the sustain voltage pulse circuit SST) of the Y-electrode driver device 704.
The above-described embodiments are only typical examples, and their combination, modifications and variations are apparent to those skilled in the art. It should be noted that those skilled in the art can make various modifications to the above-described embodiments without departing from the principle of the invention and the accompanying claims.
This application is a continuation application of international application PCT/JP2006/305370, filed Mar. 17, 2006.
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Number | Date | Country | |
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20090058768 A1 | Mar 2009 | US |
Number | Date | Country | |
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Parent | PCT/JP2006/305370 | Mar 2006 | US |
Child | 12232464 | US |