Patent Application
20080007544
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention, wherein:
For simplicity of illustrating the embodiments, the liquid crystal display is taken as an example for a display device, and the liquid crystal display panel is taken as an example for a display panel, and the computer system is taken as an example for a system hereinafter.
There are several voltage signals in the display driving device 40, including a logic voltage signal VDDD, a first voltage signal VDDA, a second voltage signal VDDG, a third voltage signal VEEG, and a fourth voltage signal VDDA′, wherein the logic voltage signal VDDD is supplied for providing the power source voltage required by the operations of the single-channel pulse width modulation circuit 41 and the display driver 45, etc. The first voltage signal VDDA is used for providing the operation voltage for the display panel 47 when the pixels are enabled; the second voltage signal VDDG is used for enabling the pixels of the liquid crystal display panel 47; the third voltage signal VEEG is used for disabling the pixels of the liquid crystal display panel 47; and the fourth voltage signal VDDA′ is a delayed form of the first voltage signal VDDA.
In an embodiment, the enabling and disabling of the pixels of the display panel 47 are controlled by a thin film transistor, and thus, the voltage signals VDDG and VEEG are input to the gate of the thin film transistor. When the pixels are enabled (i.e., the thin film transistor is enabled), the voltage signal VDDA is input to the pixel capacitor through the drain/source of the thin film transistor, and the rotation of the liquid crystal molecule is controlled by the voltage signal VDDA with the common voltage as a reference potential.
The single-channel pulse width modulation circuit 41 outputs the voltage signal VDDA to the delay circuit 42 and boost-lowering voltage circuit 43. The delay circuit 42 typically comprises resistors and capacitors, and the delay circuit 42 delays the voltage signal VDDA for a period of time and outputs a voltage signal VDDA′. Additionally, the boost-lowering voltage circuit 43 receives the voltage signal VDDA from the single-channel pulse width modulation circuit 41, and converts it into voltage signals VDDG and VEEG to be output to the display driver 45. Finally, the display driver 45 drives the liquid display panel 47 by the voltage signals VDDG, VEEG, and VDDA′.
After the above operations have been conducted to the voltage signals VDDD, VDDG, VEEG, and VDDA, the voltage signal VDDA is delayed for a period of time and converted to the voltage signal VDDA′, as shown in
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents. And the protected scope of the present invention shall be defined by the following claims.
