Patent Grant
11990097
This application claims priority to Chinese Patent Application No. 202310042518.0, filed Jan. 28, 2023, the entire disclosure of which is incorporated herein by reference.
The present application relates to the technical field of display driving, and more specifically, to a display driving structure, a display driving method and a display device.
Pixel units arrayed in a matrix mode are provided in a display panel, data lines provide grayscale voltages to the pixel units for normal display of the pixel units, and scan lines are configured to provide scanning signals to control the opening or closing of the corresponding pixel units. The grayscale voltages provided by the data lines are switched between high and low grayscale voltages according to the brightness of display screens, and there is a parasitic capacitor on the data line; the switching between the high and low grayscale voltages will lead to a large voltage span for the charge and discharge of the parasitic capacitor, which further leads to an increase in an operating current of a driving chip that provides data signals to the data lines; and the increase in the current of the driving chip will produce unsafe factors.
There are provided a display driving structure, a display driving method and a display device. The technical solution is as below:
According to a first aspect of the present application, there is provided a display driving structure configured to drive a display panel.
The display panel comprising at least one pixel group, and the pixel group comprises N rows and M columns of sub-pixels, N scan lines and M data lines. An m-th column of the sub-pixels in the pixel group is all connected to an m-th data line, and at least part of the sub-pixels in an n-th row in the pixel group are connected to an n-th scan line, where 1≤n≤N, 1≤m≤M, and N≥3.
The display driving structure comprises a drive component and at least one switching component. The drive component is connected to the data lines in the pixel group, and provides a one-to-one corresponding data signal to each of the sub-pixels through the data lines. The switching component is in one-to-one correspondence with the pixel group, and has a control terminal, a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal is configured to receive a p-th row of scanning signals, the second input terminal is configured to receive a (p+1)-th row of scanning signals, the (p+1)-th row of the scanning signals is output after the p-th row of the scanning signals, the first output terminal is connected to a p-th row of the scan lines in the pixel group, and the second output terminal is connected to a (p+1)-th row of the scan lines in the pixel group, where 1≤p <N.
The control terminal of the switching component is configured to control conduction of the first input terminal and the second output terminal, and control conduction of the second input terminal and the first output terminal when the data signals received by adjacent two sub-pixels connected to each column of the data lines are different in polarity. The write time of the data signal of the sub-pixel connected to the (p+1)-th row of the scan lines is prior to that of the data signal of the sub-pixel connected to the p-th row of the scan lines.
The control terminal of the switching component is further configured to control conduction of the first input terminal and the first output terminal, and control conduction of the second input terminal and the second output terminal when the data signals received by adjacent two sub-pixels connected to each column of the data lines are same in polarity. The write time of the data signal of the sub-pixel connected to the p-th row of the scan lines is prior to that of the data signal of the sub-pixel connected to the (p+1)-th row of the scan lines.
According to a second aspect of the present disclosure, there is provided a display driving method applied to the display driving structure above.
The display driving structure is configured to drive a display panel. The display panel comprising at least one pixel group, and the pixel group comprises N rows and M columns of sub-pixels, N scan lines and M data lines. An m-th column of the sub-pixels in the pixel group is all connected to an m-th data line, and at least part of the sub-pixels in an n-th row in the pixel group is connected to an n-th scan line, where 1≤n≤N, 1≤m≤M, and N≥3.
The display driving structure comprises a drive component and at least one switching component. The drive component is connected to the data lines in the pixel group to provide a one-to-one corresponding data signal to each of the sub-pixels through the data lines. The switching component is in one-to-one correspondence with the pixel group, and has a control terminal, a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal is configured to receive a p-th row of scanning signals, the second input terminal is configured to receive a (p+1)-th row of scanning signals, the (p+1)-th row of the scanning signals is output after the p-th row of the scanning signals, the first output terminal is connected to a p-th row of the scan lines in the pixel group, and the second output terminal is connected to a (p+1)-th row of the scan lines in the pixel group, where 1≤p<N.
The display driving method comprises:
According to a third aspect of the present disclosure, there is provided a display device, including a display panel and the display driving structure above, and the display driving structure is configured to drive the display panel.
The above and other features of the present application will become more apparent by describing exemplary embodiments thereof in detail with reference to the drawings.
Although the present application can be embodied in different forms of embodiments readily, only some of the specific embodiments are shown in the drawings and will be described in detail in the description, while it is understood that the description is to be regarded as an exemplary illustration of the principles of the present application and is not intended to limit the present application to those described herein.
Thus, one feature pointed out in the description is intended to illustrate one of the features of one embodiment of the present application and is not intended to imply that each embodiment of the present application must have the illustrated feature. In addition, it should be noted that many features are described in the description. Although certain features may be combined together to illustrate a possible system design, these features may further be used for other unspecified combinations. Therefore, unless otherwise stated, the illustrated combinations are not intended to be limiting.
In the embodiments illustrated in the drawings, indications of direction (such as up, down, left, right, front and back) are used to explain that the structure and movement of the various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the positions of the elements changes, the indications of the directions change accordingly.
The exemplary embodiments will now be described more fully with reference to the drawings. However, the exemplary embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; rather, these embodiments are provided so that the present application will be more comprehensive and complete, and the concept of example embodiments will be fully communicated to those skilled in the art. The accompanying drawings are only schematic illustrations of the present application and are not necessarily drawn to scale. Like reference numerals in the figures denote identical or similar parts and thus repetitive descriptions thereof will be omitted.
Preferred embodiments of the present application will be further elaborated below in conjunction with the drawings of the description.
Referring to
The display driving structure is configured to drive a display panel. The display panel includes at least one pixel group 100, and the pixel group 100 includes a plurality of sub-pixels 110. The plurality of sub-pixels 110 are generally arrayed in a matrix mode, for example, to constitute a N*M sub-pixel 110 matrix including M columns and N rows, where M and N are positive integers greater than zero. The pixel group 100 further includes N scan lines 120 and M data lines 130. An m-th column of the sub-pixels 110 in the pixel group 100 is all connected to an m-th data line 130, and at least part of the sub-pixels 110 in an n-th row in the pixel group 100 are connected to an n-th scan line 120, where 1≤n≤N, 1≤m≤M, and N≥3, and n and m are also positive integers. In this embodiment, there are at least three sub-pixels 110 in a same column in the pixel group 100.
The display driving structure includes a drive component 20. The drive component 20 is connected to the data lines 130 in the pixel group 100 to provide a one-to-one corresponding data signal to each of the sub-pixels 110 through the data lines 130. There are a plurality of data signals provided by the data lines 130, such as a high grayscale voltage, a low grayscale voltage, a high grayscale voltage, etc. One sub-pixel 110 correspondingly receives a data signal, that is, one sub-pixel 110 receives a grayscale voltage, and the sub-pixels 110 perform different brightness displays based on the data signals. Generally, if the grayscale voltage in the data signal is high, the brightness of the sub-pixel 110 becomes high. If the grayscale voltage is low, the sub-pixel 110 is less bright.
The drive component 20 may be understood as a driving chip. When the drive component 20 provides data signals, and the data signals undergo reversed switching between high grayscale voltages and low grayscale voltages, a load current of the drive component 20 may increase. If the load current is high for a long time, the service life of the drive component 20 is easy to be reduced or even burned out.
The display driving structure further includes at least one switching component 30 which is in one-to-one correspondence with the pixel group 100, and one switching component 30 is configured to control switching of the data signals in one pixel group 100. The switching component 30 has a control terminal, a first input terminal M, a second input terminal P, a first output terminal N and a second output terminal Q. The first input terminal M is configured to receive a p-th row of scanning signals, the second input terminal P is configured to receive a (p+1)-th row of scanning signals. The (p+1)-th row of the scanning signals is output after the p-th row of the scanning signals. The first output terminal N is connected to a p-th row of the scan lines in the pixel group 100, the second output terminal Q is connected to a (p+1)-th row of the scan lines in the pixel group 100, where 1≤p<N, and p is a positive integer.
The sub-pixels are correspondingly connected to a row of scan lines. For example, a first row of the sub-pixels is correspondingly connected to a first row of the scan liens, and a second row of the sub-pixel is correspondingly connected to a second row of the scan liens. Alternatively, the first row of the sub-pixel is correspondingly connected to the second row of the scan liens, and the second row of the sub-pixels is correspondingly connected to a third row of the scan liens. In short, one sub-pixel is connected to a row of the scan lines, that is, the sub-pixels in a same row may be connected to a same row of the scan lines, or the sub-pixels in a same row may be connected to the scan lines in different rows.
Write objects of the p-th row of the scanning signals and the (p+1)-row of the scanning signals may be exchanged by means of the switching component 30. The switching component 30 has two operating modes. In a first operating mode, the first input terminal M and the first output terminal N are conducted, and the second input terminal P and the second output terminal Q are conducted. In a second operating mode, the first input terminal M and the second output terminal Q are conducted, and the second input terminal P and the first output terminal N are conducted. The switching component 30 may be switched between the first operating mode and the second operating mode.
The control terminal of the switching component 30 is configured to control conduction between the first input terminal M and the second output terminal Q, and control conduction between the second input terminal P and the first output terminal N when the data signals received by adjacent two sub-pixels 110 connected to each column of the data lines 130 are different in polarity. At the moment, the switching component 30 is switched to the second operating mode. And in the meantime, a write time of the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines is prior to that of the data signal of the sub-pixel 110 connected to the p-th row of the scan lines. The p-th row of the scanning signals and the (p+1)-th row of the scanning signals are input normally, and by means of the switching component 30, the (p+1)-th row of the scanning signals are input into the p-th row of the scan lines and the p-th row of the scanning signals are input into the (p+1)-th row of the scan lines. Synchronously, an input sequence of the grayscale voltages on the data signals is transposed. In such a way, the reversal of two adjacent data signals on the data line 130 is transposed, but the input sequence of corresponding scanning signals is also transposed, which reduces the number of reversals of the data signals on the data lines 130 on the condition that the display brightness of the corresponding sub-pixel 110 remains unchanged. Only a charging sequence of the front and back sub-pixels 110 is changed.
It should be noted that, the polarity difference of the data signals can be interpreted as a polarity difference of positive and negative voltages, as well as a level difference of grayscale voltages. For example, when the display driving structure is applied in a display panel of an OLED, the grayscale voltages in the data signals are 10V and 0V; when the grayscale voltage is 10V, the OLED is completely turned on, and when the grayscale voltage is 0V, the OLED is completely turned off, so 10V and 0V may be interpreted as that the data signals are different in the polarity. For another example, when the display driving structure is applied in a panel of an LCD, the grayscale voltages in the data signals are 10V and −10V, the rotation of liquid crystal molecules in the panel of the LCD is driven at the grayscale voltages of 10V and −10V, 10V corresponds to a time of highest brightness, −10V also corresponds to the time of highest brightness, and through positive and negative switching of the voltages, the solidification of the liquid crystal molecules is avoided, so 10V and −10V may also be interpreted as that the data signals are different in the polarity.
For example, the switching sequence of the grayscale voltages of the data signals on the data line 130 is high, low and high grayscale voltages, these three grayscale voltages are transmitted successively. The voltage outputted by the drive component 20 should be switched twice between high and low voltages. At this time, the switching component 30 is switched from the first operating mode to the second operating mode, and an opening sequence of two adjacent scan lines 120 is changed. An output sequence of the grayscale voltages on the corresponding data line 130 is also changed. Then the sequence of the greyscale voltages on the data line 130 is low, high and high greyscale voltages. Two high grayscale voltages are continuously outputted without being switched therebetween, thus, the data signals on the data line 130 only need a voltage switch, so that the number of reversals can be reduced.
The control terminal of the switching component 30 is further configured to control conduction between the first input terminal M and the first output terminal N, and to control conduction between the second input terminal P and the second output terminal Q when the data signals received by adjacent two sub-pixels 110 connected to each column of the data lines 130 are same in polarity. And in the meantime, the write time of the data signal of the sub-pixel 110 connected to the p-th row of the scan lines is prior to that of the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines. At this time, the polarities are the same, the switching of high and low voltages on the data line 130 is less, the load current is low, and the current operating mode of the switching component 30 is maintained.
In the technical solution of the present application, when the data signals on the data line 130 are reversed, two adjacent data signals may be different in polarity. At this time, the switching component 30 controls conduction between the first input terminal M and the second output terminal Q and controls conduction between the second input terminal P and the first output terminal N so as to transmit the p-th row of scanning signals to the (p+1)-th row of the scan lines and transmit the (p+1)-th row of scanning signals to the p-th row of the scan lines. At this time, a write time of the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines is prior to that of the data signal of the sub-pixel 110 connected to the p-th row of the scan lines. Therefore, the before-after reversed polarities of two adjacent data signals on the data line 130 may be changed, thus reducing the polarity switching frequency of the data signals, and then the load current of the drive component 20 is reduced, that is, an operating current of a driving chip is reduced, thereby improving the safety of use.
In addition, it should be pointed out that switching from the first operating mode to the second operating mode may reduce the polarity reversal of the data signals and reduce the load current. Switching from the second operating mode to the first operating mode may also reduce the polarity reversal of the data signals. In other words, in the second operating mode, there are many polarity reversals, and the load current is high. For example, in the second operating mode, the sequence of the grayscale voltages in the data signals is low, high and low grayscale voltages, switching among low, high and low grayscale voltages is performed twice. In the case of being switched to the first operating mode, an input sequence of the scanning signals and the sequence of corresponding data signals are switched again, so that the sequence of voltages in the data signals is switched to high, low and low grayscale voltages, and two low grayscale voltages are continuously outputted without being switched therebetween, therefore, the number of reversals may be reduced.
In addition, the safety may improved by increasing the power of the drive component 20 or arranging a heat sink into the drive component 20, but these methods will lead to an increase in cost, while in the technical solution of the present application, the safety is improved by changing the switching sequence of high and low grayscale voltages, thereby reducing the increase in cost.
As shown in
The switching component 30 includes a second response switch T2 and a fourth response switch T4. An input terminal of the second response switch T2 is connected to the second input terminal P, an output terminal of the second response switch T2 is connected to the second output terminal Q, an input terminal of the fourth response switch T4 is connected to the second input terminal P, and an output terminal of the fourth response switch T4 is connected to the first output terminal N.
A control terminal of the first response switch T1 is connected to a first signal line 301, a control terminal of the second response switch T2 is connected to a second signal line 302, a control terminal of the third response switch T3 is connected to a third signal line 303, and a control terminal of the fourth response switch T4 is connected to a fourth signal line 304. When the load current of the drive component 20 is large, a first response signal is generated, and the first response signal is transmitted to the control terminal of the first response switch T1 through the first signal line 301. Similarly, a second response signal, a third response signal, and a fourth response signal are also generated. The second response signal is transmitted to the second response switch T2 through the second signal line 302, the third response signal is transmitted to the third response switch T3 through the third signal line 303, and the fourth response signal is transmitted to the fourth response switch T4 through the fourth signal line 304. The response switches mentioned above may be type-N or type-P response switches, the type-N response switches respond to high levels and type-P response switches respond to low levels.
For example, the first response switch T1, the second response switch T2, the third response switch T3, and the fourth response switch T4 are all N-type response switches. A production process of the response switches of the same type is simple, so that the operating efficiency is improved. In the first operating mode, the first response signal and the second response signal are high levels, and the third response signal and the fourth response signal are low levels. The first response switch T1 and the second response switch T2 are turned on, the third response switch T3 and the fourth response switch T4 are turned off, and the p-th row of the scanning signals successively pass through the first input terminal M, the first response switch T1 and the first output terminal N to the p-th row of the scan lines. The (p+1)-th row of the scanning signals pass through the second input terminal P, the second response switch T2 and the second output terminal Q successively to the (p+1)-th row of the scan lines.
In the second operating mode, the first response signal and the second response signal are low levels, and the third response signal and the fourth response signal are high levels. The first response switch T1 and the second response switch T2 are turned off, the third response switch T3 and the fourth response switch T4 are turned on, and the p-th row of the scanning signals successively pass through the first input terminal M, the third response switch T3 and the second output terminal Q to the (p+1)-th row of the scan lines. The (p+1)-th row of the scanning signals pass through the second input terminal P, the fourth response switch T4 and the first output terminal N successively to the p-th row of the scan lines.
In order to reduce circuit layout and improve the accuracy of control of the response switches, the first signal line 301 and the second signal line 302 are connected to a same circuit, and the third signal line 303 and the fourth signal line 304 are connected to a same circuit. In other words, the first response switch T1 and the second response switch T2 can be synchronously controlled, and the third response switch T3 and the fourth response switch T4 can be synchronously controlled. The first response signal and the second response signal are the same response signal and the third response signal and the fourth response signal are the same response signal, one of which is a high level, and the other one is a low level.
As shown in
Each of the pixel groups 100 includes at least four sub-pixels 110, all of which are connected to a same data line 130; and the p-th row of the scan lines and the (p+1)-th row of the scan lines are scan lines 120 corresponding to any two adjacent sub-pixels 110. Control of the four sub-pixels 110 as a pixel group can not only reduce the switching frequency of high and low grayscale voltages, but also effectively realize the effective control of the whole display panel.
For example, the four sub-pixels 110, from top to bottom, are a first sub-pixel 111, a second sub-pixel 112, a third sub-pixel 113 and a fourth sub-pixel 114 respectively. The p-th row of the scan lines 120 corresponds to the first sub-pixel 111, and the (p+1)-th row of the scan line 120 corresponds to the second sub-pixel 112. In the first operating mode, the switching sequence of the grayscale voltages on the data line 130 is high, low, high and low grayscale voltages, and these four grayscale voltages are transmitted successively, wherein, the voltage outputted by the drive component 20 should be switched between high and low greyscale voltages for at least three times. Three times of switching causes an increase in the load current of the drive component 20. And when the increase in the load current of drive component 20 is detected, the switching component 30 performs a switching operation. When the switching component 30 is switched from the first operating mode to the second operating mode, the opening sequence of the p-th row of the scan lines and the (p+1)-th row of the scan lines that are adjacently arranged is changed. The output sequence of the grayscale voltages on the corresponding data line 130 is also changed. In the second operating mode by switching, the sequence of the greyscale voltages on the data line 130 is low, high, high and low greyscale voltages. Two high grayscale voltages are continuously output without being switched therebetween. According to the solution, a next-frame display screen may be compensated based on a load current of a current display screen, and the data line 130 of the next-frame display screen only needs two voltage switches, thus the load current of drive component 20 may be reduced.
In addition, the p-th row of the scan lines 120 may correspond to the second sub-pixel 112, and the (p+1)-th row of the scan line 120 corresponds to the third sub-pixel 113. It could also be that the p-th row of the scan lines 120 corresponds to the third sub-pixel 113, and the (p+1)-th row of the scan line 120 corresponds to the fourth sub-pixel 114.
Furthermore, the display driving structure includes a power supply component 40, a timing control component 50 and a conversion component 60.
The power supply component 40 is connected to the drive component 20. The power supply component 40 is configured to detect a load current change of the drive component 20, and to feed back a detection result. When the polarities of adjacent data signals on the data line 130 are reversed, the load current of the drive component 20 changes. The power supply component 40 provides a load current to the drive component 20, and when the frequency of switching between high and low grayscale voltages of the drive component 20 is high, the load current consumed by the drive component 20 increases, and then the current provided by the power supply component 40 increases accordingly. The power supply component 40 detects the change of the load current and outputs the detection result to the timing control component 50.
The timing control component 50 is connected to the power supply component 40 and the drive component 20 respectively, and is configured to receive the detection result fed back by the power supply component 40. The timing control component 50 is further configured to adjust the write sequence of the data signal of the sub-pixel 110 connected to the p-th row of the scan lines and the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines according to the detection result. When the load current of the drive component 20 increases, the power supply component 40 detects a current increase and transmits the result of the load current increase to the timing control component 50. The timing control component 50 adjusts the write sequence of the data signal of the sub-pixel 110 connected to the p-th row of the scan lines and the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines in the drive component 20 according to the load current increase of the drive component 20. For example, an original output sequence of high, low, high, and low greyscale voltages is adjusted to a sequence of low, high, high, and low greyscale voltages.
The conversion component 60 is connected to the timing control component 50 and the switching component 30, and is configured to provide a p-th row of scanning signals and a (p+1)-th row of scanning signals. The switching component 30 is further configured to transmit a switching instruction or a maintenance instruction to the control terminal of the switching component 30. The switching component 30 controls conduction between the first input terminal M and the second output terminal Q, and controls conduction between the second input terminal P and the first output terminal N according to the switching instruction. Alternatively, The switching component 30 controls conduction between the first input terminal M and the first output terminal N, and controls conduction between the second input terminal P and the second output terminal Q according to the maintenance instruction.
Further, in order to ensure the adjustment of the output sequence of the grayscale voltages of the data signals in the drive component 20, the timing control component 50 includes a latch element 510. When the polarities of the data signals received by two adjacent sub-pixels 110 are different, the latch element 510 is configured to store the data signals of the sub-pixel 110 connected to the p-th row of the scan lines so as to write the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines first and then write the data signal of the sub-pixel 110 connected to the p-th row of the scan lines. Through a latch function of the latch element 510, the data signal of the sub-pixel 110 connected to the p-th row of the scan lines 120, which has a time point ahead, is saved, and the data signal of the sub-pixel 110 connected to the (p+1)-th row of the scan lines 120, which has a time point behind, is outputted first, and then the data signal of the sub-pixel 110 connected to the p-th row of the scan lines, which is saved by the latch element 510, is released, so that the sequence of the grayscale voltages in the data signals is switched.
As shown in
Referring to
The present application further provides a display driving method. The display driving method is applied to the display driving structure disclosed in Embodiment 1 and configured to drive a display panel. The display panel including at least one pixel group 100, each pixel group 100 includes N rows and M columns of sub-pixels 110, N scan lines 120 and M data lines 130, an m-th column of the sub-pixels 110 in the pixel group 100 are all connected to an m-th data line 130, and at least part of the sub-pixels 110 of an n-th row in the pixel group 100 are connected to an n-th scan line 120, where 1≤n≤N, 1≤m≤M, and N≥3. The display driving structure includes a drive component 20 and at least one switching component 30. The drive component 20 is connected to the data lines 130 in the pixel group 100 to provide a one-to-one corresponding data signal to each of the sub-pixels 110 through the data lines 130. The switching component 30 is in one-to-one correspondence with the pixel group 100, and the switching component 30 has a control terminal, a first input terminal M, a second input terminal P, a first output terminal N and a second output terminal Q. The first input terminal M is configured to receive a p-th row of scanning signals, the second input terminal P is configured to receive a (p+1)-th row of scanning signals, and the (p+1)-th row of the scanning signals is outputted after the p-th row of the scanning signals, the first output terminal N is connected to a p-th row of the scan lines in the pixel group 100, the second output terminal Q is connected to a (p+1)-th row of the scan lines in the pixel group 100, where 1≤p<N.
As shown in
As shown in
The step of generating a maintenance instruction when the data signals received by adjacent two sub-pixels connected to each column of the data lines are same in polarity includes:
Therefore, the grayscale voltages on the data line are switched between high grayscale voltages and low grayscale voltages, which will lead to an increase in the load current, the higher the switching frequency is, the greater the load current is. In other words, the load current of the drive component is positively correlated with the high and low switching frequencies of the grayscale voltages on the data line. The switching instruction and the maintenance instruction may be generated by the switching frequency of the grayscale voltages, and also may be generated based on the magnitude of the load current of the drive component.
The present application further provides a display driving method. The display driving method is applied to the display driving structure disclosed in Embodiment 1 and configured to drive a display panel. The display driving structure is configured to drive a display panel. The display panel includes a plurality of sub-pixels 110 and a plurality of scan lines 120, the sub-pixels 110 in a same row are connected to a same scan line 120, and the sub-pixels 110 in a same column are connected to a same data line 130.
The display driving structure comprises a drive component 20 and at least one switching components 30. The data lines 130 are connected to the drive component 20, and the drive component 20 is configured to provide data signals and has a first operating mode and a second operating mode. The drive component 20 generates a load current when the data signals are switched between high and low grayscale voltages. As shown in
The display driving method includes:
Specifically, as shown in
The control instruction includes a switching instruction and a maintenance instruction, and wherein the step of generating a control instruction includes:
Specifically, as shown in
Therefore, the load current of the drive component is positively correlated with the high and low switching frequencies of the grayscale voltages on the data line. The switching instruction and the maintenance instruction may be generated by the switching frequency of the grayscale voltages, and also may be generated based on the magnitude of the load current of the drive component.
As shown in
Although the present application has been described with reference to several exemplary embodiments, it should be understood that the terms used are illustrative and exemplary, and are not restrictive. Since the present application may be embodied in various forms without departing from the spirit or essence of the present application, it should therefore be understood that the foregoing embodiments are not limited to any of the foregoing details, but are to be interpreted broadly within the spirit and scope defined by the appended claims, so that all variations and modifications falling within the scope of the claims or their equivalents are to be covered by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202310042518.0 | Jan 2023 | CN | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 20020033440 | Morita | Mar 2002 | A1 |
| 20030090450 | Inada et al. | May 2003 | A1 |
| 20080246720 | Lee | Oct 2008 | A1 |
| 20080266284 | Shie | Oct 2008 | A1 |
| 20190156725 | Hsu | May 2019 | A1 |
| Number | Date | Country |
|---|---|---|
| 104933997 | Sep 2015 | CN |
| 113409718 | Sep 2021 | CN |
| 115631725 | Jan 2023 | CN |
| Entry |
|---|
| CNIPA, First Office Action for CN Application No. 202310042518.0, dated May 7, 2023. |
