Patent Application
20250046260
The present disclosure relates to the field of display technology, and in particular to a display module, a display device, and a display system.
With the rapid development of internet technology, the application of “internet+” is more and more extensive and rapidly rises in various industries, and various intelligent products capable of being accessed to the internet come out endlessly. In this context, intelligent display products have emerged. The existing intelligent display product not only has a display function, but also serves as an important data input port of the internet of things and has the functions of data acquisition, information release, interaction and the like.
However, the existing intelligent display product has relatively low intelligent degree and does not have a fault self-diagnosis function, operation and maintenance of the intelligent display product can be performed through only manual on-site inspection. With the increasing number and scattered locations of the intelligent display products, it brings great difficulty to the operation and maintenance of the products.
The present disclosure aims to solve at least one technical problem in the prior art and provides a display module, a display device, and a display system.
In a first aspect, embodiments of the present disclosure provide a display module, including a monitoring system, where the monitoring system includes:
In some embodiments, the display module further includes a power component and a display control system component;
In some embodiments, a number of the first power supply channel for supplying power by the power component to the display control system component is one;
In some embodiments, a number of the first power supply channel for supplying power by the power component to the display control system component is greater than or equal to two;
In some embodiments, the first power supply channels for supplying power by the power component to the display control system component include a power supply channel for providing the display control system component with operating voltage required for the display control system component, and a power supply channel for providing the display control system component with the operating voltage required for a display panel.
In some embodiments, the first voltage detection circuit includes a first resistor, a second resistor, a third resistor and a first transistor;
In some embodiments, the display control system component includes a standby power supply module, and the first high level supply terminal is an output terminal of the standby power supply module.
In some embodiments, the first power supply channel is provided with a safety circuit, a first terminal of the safety circuit is electrically connected to the power component, and a second terminal of the safety circuit is electrically connected to the display control system component; and
In some embodiments, the display module further includes a display control system component and a timing control component;
In some embodiments, the second detection unit includes:
In some embodiments, the second power supply channel is provided with a power supply transistor, a first electrode of the power supply transistor is electrically connected to the display control system component, and a second electrode of the power supply transistor is electrically connected to the timing control component; and the second detection unit is electrically connected to the second electrode of the power supply transistor.
In some embodiments, the display module further includes a backlight driving component;
In some embodiments, the display module further includes a backlight driving component and a backlight source;
In some embodiments, the third detection unit includes a third voltage detection circuit;
In some embodiments, the display module further includes a backlight source;
In some embodiments, the fourth detection unit includes:
In some embodiments, the display module further includes a backlight driving component, and a power supply output terminal of the backlight driving component is electrically connected to a first terminal of the backlight source;
In some embodiments, the backlight driving component includes a circuit board fixed with the boost circuit, and the sampling circuit and the boost circuit are fixed on the same circuit board; and
In some embodiments, the display module further includes a backlight source;
In some embodiments, the display module further includes a backlight driving component, the backlight driving component includes an emission control circuit, and a second terminal of the backlight source is electrically connected to a second operating voltage terminal through the emission control circuit;
In some embodiments, the second signal processing subunit includes:
In some embodiments, the backlight driving component further includes:
In some embodiments, the display module further includes a calculation component and a display control system component;
In some embodiments, the sixth detection unit includes:
In some embodiments, the display module further includes a display control system component and a timing control component;
In some embodiments, the seventh detection unit includes:
In some embodiments, the handshake signal include a LOCKN signal.
In some embodiments, the seventh detection unit is integrated in the timing control component; and
In some embodiments, the display module further includes a display control system component and a timing control component;
In some embodiments, the display module further includes a calculation component; and the eighth detection unit includes:
In some embodiments, the timing control component is configured to, in response to control of the second control subunit or the third control subunit, perform luminance feature extraction on the acquired display data signal;
when the difference value is greater than a preset target difference value, it is detected that the performing the screen switching by the display control system component is normal; and when the difference value is less than or equal to the preset target difference value, it is detected that the performing the screen switching by the display control system component is abnormal.
In some embodiments, the first luminance information includes a first luminance function value, and the second luminance information includes a second luminance function value; and
In some embodiments, the display module further includes a power component, a display control system component, a calculation component, a timing control component, and a backlight driving component; and
In a second aspect, an embodiment of the present disclosure further provides a display device, including the display module as provided in the above first aspect.
In a third aspect, an embodiment of the present disclosure further provides a display system, including the display device as provided in the second aspect described above and a receiving device;
where the receiving device is configured to receive the operation state information transmitted by the transmission module.
In order to enable one of ordinary skill in the art to better understand the technical solutions of the present disclosure, a display module, a display device, and a display system provided by the present disclosure will be further described in detail below with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used in the present disclosure shall have the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure belongs. The words “first”, “second”, and the like used in the present disclosure are not intended to indicate any order, quantity, or importance, but rather serve to distinguish one element from another. Also, the word “a”, “an”, “the” or the like does not denote a limitation of quantity, but rather denotes the presence of at least one. The word “including”, “includes”, or the like means that the element or item preceding the word includes the element or item listed after the word and its equivalent, but does not exclude other elements or items. The word “connected”, “coupled” or the like is not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The words “upper”, “lower”, “left”, “right”, and the like are used only to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
An embodiment of the present disclosure provides a display module with a fault self-diagnosis function, which can automatically report an operation state information of a target part, facilitating operation and maintenance personnel to operate and maintain a display product according to the received “operation state information”, and improving operation and maintenance efficiency.
The detection module 11 is configured to detect operation characteristic information of each of at least one target part in the display module during operation of the target part, and determine operation state information of the target part according to the operation characteristic information of the target part. The transmission module 12 is configured to transmit out the operation state information.
In an embodiment of the present disclosure, the detection module 11 and the transmission module 12 may be implemented as software, hardware, or a combination of software and hardware.
The transmission module 12 may transmit the operation state information of the target part to a target object through network. The network may include various types such as wired communication links, wireless communication links (e.g., WIFI, LTE_4G network, NR_5G network), or fiber optic cables. The target object may be a server or a specific terminal (e.g., an electronic apparatus such as a mobile phone, a tablet, or a computer, which is available for the operation and maintenance personnel to refer to the information). The technical solution of the present disclosure does not limit the communication technology employed by the transmission module 12 to transmit the operation state information and the target object to receive the operation state information.
In the embodiment of the present disclosure, through providing the detection module 11 and the transmission module 12 described above, the display module can have the fault self-diagnosis function, and the operation state information of the target part can be transmitted to the operation and maintenance personnel for reference, so that the operation and maintenance personnel are not required to inspect on-site on whether a fault occurs in the display product, which is convenient for the operation and maintenance personnel to perform operation and maintenance on the display product, and favorable to promoting the operation and maintenance efficiency.
In some embodiments, the display module includes a power component 1, a display control system component 2, a calculation component 3, a timing control component 4, a backlight driving component 5 and a backlight source 6. The at least one target part includes at least one of the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, the backlight driving component 5, and the backlight source 6.
The power component 1 is a part for supplying power in the display module, and specifically may directly or indirectly supply power to part of the components in the display module. The display control system component 2 may also be referred to as a motherboard, which is a core part in the display module and generally serves to control coordination of the other components in the display module, and an entity of the display control system component 2 is a circuit board fixed with a display control system on chip, for example, a MST9U01 chip. The calculation component 3 serves as a capture part of the display control system component 2, and is generally configured to capture a display data signal input by an external signal source and transmit the display data signal to the display control system component 2 according to a certain rule. The timing control component 4 serves to provide a control timing, to control coordination of various drivers (e.g., source driver, gate driver, etc.) in the display module. The backlight driving component 5 serves to drive the backlight source 6 to emit light. The backlight source 6 emits light in response to the control of the backlight driving component 5, and the backlight source 6 generally includes a plurality of lamp strips connected in parallel.
It should be noted that, the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, the backlight driving component 5, and the backlight source 6 described above are merely distinguished from each other based on different functions. In an actual product, the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, the backlight driving component 5, and the backlight source 6 may exist in the display module as independent structures, or two or more of them may be integrated and exist in a same structure. The specific implementations of the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, the backlight driving component 5, and the backlight source 6 are not limited by the present disclosure.
The first detection unit 111 is connected to each first power supply channel, and the first detection unit 111 is configured to output, in response to control of a first detection signal and according to a condition of the control system voltage signal loaded on the first power supply channel, first operation state information indicating that supplying power by the power component 1 to the display control system component 2 is normal, or second operation state information indicating that the supplying power by the power component 1 to the display control system component 2 is abnormal.
Optionally, when each first power supply channel is loaded with a corresponding control system voltage signal, it indicates that the supplying power by the power component 1 to the display control system component 2 is normal; and when at least one first power supply channel is not loaded with a corresponding control system voltage signal, it indicates that the supplying power by the power component 1 to the display control system component 2 is abnormal.
A first terminal of the first resistor R1 is electrically connected to an input terminal IN1 of the first voltage detection circuit 1111, and a second terminal of the first resistor R1 is electrically connected to a first terminal of the second resistor R2 and a gate of the first transistor T1.
The first terminal of the second resistor R2 is electrically connected to the gate of the first transistor T1, and a second terminal of the second resistor R2 is electrically connected to a low level supply terminal.
A first electrode of the first transistor T1 is electrically connected to an output terminal OUT1 of the first voltage detection circuit 1111, and a second electrode of the first transistor T1 is electrically connected to the low level supply terminal. The first transistor T1 may be an N-type transistor or a P-type transistor.
A first terminal of the third resistor R3 is electrically connected to a first high level supply terminal, and a second terminal of the third resistor R3 is electrically connected to the output terminal OUT1 of the first voltage detection circuit 1111 and the first electrode of the first transistor T1.
As one example, the first transistor T1 may be an N-type transistor. When the input terminal of the first voltage detection circuit 1111 is input with a corresponding control system voltage signal, the first transistor T1 is turned on, a low level signal provided by the low level supply terminal is written to the output terminal of the first voltage detection circuit 1111 through the first transistor T1, and the output terminal OUT1 of the first voltage detection circuit 1111 outputs the low level signal. When the input terminal IN1 of the first voltage detection circuit 1111 is not input with the corresponding control system voltage signal, the first transistor T1 is turned off, a high level signal provided by the first high level supply terminal is written to the output terminal OUT1 of the first voltage detection circuit 1111 through the third resistor R3, and the output terminal OUT1 of the first voltage detection circuit 1111 outputs the high level signal.
That is, when the input terminal IN1 of the first voltage detection circuit 1111 is input with a corresponding control system voltage signal (that is, the first power supply channel is loaded with the corresponding control system voltage signal), the output terminal OUT1 of the first voltage detection circuit 1111 outputs a low level signal to represent the first operation state information; and when the input terminal IN1 of the first voltage detection circuit 1111 is not input with the corresponding control system voltage signal (that is, the first power supply channel is not loaded with the corresponding control system voltage signal), the output terminal of the first voltage detection circuit 1111 outputs a high level signal to represent the second operation state information.
In the case shown in
where V1 is a voltage of the control system voltage signal, which should be provided by the first power supply channel connected to the first voltage detection circuit 1111, VL is a low level voltage provided by the low level supply terminal, and Vth_T1_N is a threshold voltage of the first transistor T1.
When the input terminal IN1 of the first voltage detection circuit 1111 is input with a corresponding control system voltage signal, the first transistor T1 is turned off, a high level signal provided by the first high level supply terminal is written to the output terminal of the first voltage detection circuit 1111 through the third resistor R3, and the output terminal OUT1 of the first voltage detection circuit 1111 outputs the high level signal. When the input terminal IN1 of the first voltage detection circuit 1111 is not input with the corresponding control system voltage signal, a low level signal provided by the low level supply terminal is written to the gate of the P-type transistor through the second resistor R2, the first transistor T1 is turned on, the low level signal provided by the low level supply terminal is written to the output terminal OUT1 of the first voltage detection circuit 1111 through the first transistor T1, and the output terminal OUT1 of the first voltage detection circuit 1111 outputs the low level signal.
That is, when the input terminal IN1 of the first voltage detection circuit 1111 is input with a corresponding control system voltage signal (that is, the first power supply channel is loaded with the corresponding control system voltage signal), the output terminal OUT1 of the first voltage detection circuit 1111 outputs a high level signal to represent the first operation state information; and when the input terminal IN1 of the first voltage detection circuit 1111 is not input with the corresponding control system voltage signal (that is, the first power supply channel is not input with the corresponding control system voltage signal), the output terminal OUT1 of the first voltage detection circuit 1111 outputs a low level signal to represent the second operation state information.
In the case shown in
where V1 is a voltage of the control system voltage signal, which should be provided by the first power supply channel connected to the first voltage detection circuit 1111, VL is a low level voltage provided by the low level supply terminal, and Vth_T1_P is a threshold voltage of the first transistor T1.
In the cases shown in
A cathode of the first zener diode ZD1 is electrically connected to the input terminal of the first voltage detection circuit 1111, an anode of the first zener diode ZD1 is electrically connected to a first terminal of the first resistor R1, and a breakdown voltage of the first zener diode ZD1 is less than the voltage of the control system voltage signal, which should be provided by the first power supply channel connected to the first voltage detection circuit 1111.
A second terminal of the first resistor R1 is electrically connected to a gate of the first transistor T1.
A first electrode of the first transistor T1 is electrically connected to an output terminal of the first voltage detection circuit 1111, a second electrode of the first transistor T1 is electrically connected to a low level supply terminal, and the first transistor T1 is an N-type transistor.
A first terminal of the third resistor R3 is electrically connected to a first high level supply terminal, and a second terminal of the third resistor R3 is electrically connected to the output terminal of the first voltage detection circuit 1111 and the first electrode of the first transistor T1.
In some embodiments, the first voltage detection circuit 1111 further includes a second resistor R2. A first terminal of the second resistor R2 is electrically connected to the anode of the first zener diode ZD1 and the first terminal of the first resistor R1, and a second terminal of the second resistor R2 is electrically connected to the low level supply terminal.
The operation principle of the first voltage detection circuit 1111 shown in
It should to be noted that the first voltage detection circuit 1111 may have another circuit structure in an embodiment of the present disclosure, but any detection circuit that can detect whether or not a certain signal is present may be used as the first voltage detection circuit 1111 in the present disclosure. Examples will not be listed for description in the present disclosure.
In some embodiments, the at least two first power supply channels for supplying power by the power component 1 to the display control system component 2 may include a power supply channel for supplying a display control system component operating voltage (generally 5V) to the display control system component, and a power supply channel for supplying a display panel operating voltage (generally 12V) to the display control system component (the corresponding operating voltage is subsequently output to the display panel by the display control system component). Apparently, in an embodiment of the present disclosure, another first power supply channel is established between the power component 1 and the display control system component 2, for the power component 1 to supply a required voltage to the display control system component 2.
In this case, the first detection unit 111 includes a logic processing circuit 1112 and at least two first voltage detection circuits 1111 in one-to-one correspondence with the at least two first power supply channels. An input terminal of each of the first voltage detection circuits 1111 is electrically connected to a corresponding first power supply channel, and the output terminal of the first voltage detection circuit 1111 is electrically connected to an input terminal of the logic processing circuit 1112.
The first voltage detection circuit 1111 is configured to output a first level signal when the corresponding first power supply channel is loaded with a control system voltage signal, and output a second level signal when the corresponding first power supply channel is not loaded with the control system voltage signal. One of the first level signal and the second level signal is a high level signal, and the other of the first level signal and the second level signal is a low level signal.
The logic processing circuit 1112 is configured to output the first operation state information when each of the electrically connected first voltage detection circuits 1111 outputs a first level signal, and to output the second operation state information when at least one of the first voltage detection circuits 1111 outputs a second level signal.
It should be noted that any one of the first voltage detection circuits 1111 in the first detection unit 111 shown in
As an alternative embodiment, in
The OR gate circuit has a plurality of input terminals and one output terminal. The output terminal is at a high level (logic “1”) as long as one of the input terminals is at a high level (logic “1”); and the output terminal is at a low level (logic “0”) only if each of the input terminals is at a low level (logic “0”).
As another alternative, in
The AND gate circuit has a plurality of input terminals and an output terminal. When each of the input terminals is at a high level (logic “1”) at the same time, the output terminal is at a high level; otherwise, the output terminal is at a low level (logic “0)”).
It should be noted that the specific circuit structures of the AND gate circuit and the OR gate circuit are not limited by the technical solution of the present disclosure.
In some embodiments, a safety circuit is disposed in the first power supply channel, a first terminal of the safety circuit is electrically connected to the power component 1, and a second terminal of the safety circuit is electrically connected to the display control system component 2. The first detection unit 111 is electrically connected to the second terminal of the safety circuit.
The safety circuit is arranged in the power component 1, and specifically includes a fuse. The safety circuit is configured to open (cut off) the corresponding first power supply channel when a current in the corresponding first power supply channel exceeds a set rated current, to prevent electrical devices in the power component 1 and/or the display control system component 2 from being damaged due to the excessive current in the first power supply channel.
In some embodiments, the first detection unit 111 is integrated in the display control system component 2. Specifically, each electrical device (for example, a resistor, a capacitor, a transistor, etc.) in the first detection unit 111 may be integrated on a circuit board in the display control system component 2 and located at a periphery of a display control system chip, and electrically connected to a part of external terminals of the display control system chip according to actual needs, so that a signal can be transmitted between the first detection unit 111 and the display control system component 2.
It should be noted that, since the display control system component 2 is generally provided with a standby power supply module, even when the supplying power by the power component 1 to the display control system component 2 is abnormal, the display control system component 2 can be maintained to operate for a certain period of time by the power supplied from the standby power supply module. When the first detection unit 111 is integrated in the display control system component 2, an output terminal of the standby power supply module built in the display control system component 2 can be used as the first high level supply terminal.
Based on the foregoing, it can be seen that, through the first detection unit 111, whether a fault occurs in supplying power by the power component 1 to the display control system component 2 can be effectively detected, and the first operation state information for representing that the supplying power by the power component 1 to the display control system component 2 is normal, or the second operation state information for representing that the supplying power by the power component 1 to the display control system component 2 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The second detection unit 112 is connected to the second power supply channel, and the second detection unit 112 is configured to output, in response to control of a second detection signal and according to a condition of the timing controller voltage signal loaded in the second power supply channel, third operation state information for indicating that supplying power by the display control system component 2 to the timing control component 4 is normal, or fourth operation state information for indicating that the supplying power by the display control system component 2 to the timing control component 4 is abnormal.
Optionally, when the second power supply channel is loaded with a timing controller voltage signal, it indicates that the supplying power by the display control system component 2 to the timing control component 4 is normal; and when the second power supply channel is not loaded with the timing controller voltage signal, it indicates that the supplying power by the display control system component 2 to the timing control component 4 is abnormal.
In some embodiments, the second voltage detection circuit includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and an eleventh transistor T11.
A first terminal of the eleventh resistor R11 is electrically connected to the input terminal IN2 of the second voltage detection circuit, and a second terminal of the eleventh resistor R11 is electrically connected to a first terminal of the twelfth resistor R12 and a gate of the eleventh transistor T11.
A first terminal of the twelfth resistor R12 is electrically connected to the gate of the eleventh transistor T11, and a second terminal of the twelfth resistor R12 is electrically connected to a low level supply terminal.
A first electrode of the eleventh transistor T11 is electrically connected to an output terminal OUT2 of the second voltage detection circuit, and a second electrode of the eleventh transistor T11 is electrically connected to the low level supply terminal.
A first terminal of the thirteenth resistor R13 is electrically connected to a first high level supply terminal, and a second terminal of the thirteenth resistor R13 is electrically connected to the output terminal OUT2 of the second voltage detection circuit and the first electrode of the eleventh transistor T11.
As one example, the eleventh transistor T11 may be an N-type transistor. When the input terminal IN2 of the second voltage detection circuit is input with a corresponding timing controller voltage signal, the eleventh transistor T11 is turned on, a low level signal provided by the low level supply terminal is written to the output terminal OUT2 of the second voltage detection circuit through the eleventh transistor T11, and the output terminal OUT2 of the second voltage detection circuit outputs the low level signal. When the input terminal IN2 of the second voltage detection circuit is not input with the corresponding timing controller voltage signal, the eleventh transistor T11 is turned off, a high level signal provided by the first high level supply terminal is written to the output terminal OUT2 of the second voltage detection circuit through the thirteenth resistor R13, and the output terminal OUT2 of the second voltage detection circuit outputs the high level signal.
That is, when the input terminal IN2 of the second voltage detection circuit is input with a corresponding timing controller voltage signal (that is, the second power supply channel is loaded with the corresponding timing controller voltage signal), the output terminal OUT2 of the second voltage detection circuit outputs a low level signal to represent the third operation state information; and when the input terminal IN2 of the second voltage detection circuit is not input with the corresponding timing controller voltage signal (that is, the second power supply channel is not loaded with the corresponding timing controller voltage signal), the output terminal OUT2 of the second voltage detection circuit outputs a high level signal to represent the fourth operation state information.
In the case shown in
where V2 is a voltage of the timing controller voltage signal, which should be provided by the second power supply channel connected to the second voltage detection circuit, VL is a low level voltage provided by the low level supply terminal, and Vth_T11_N is a threshold voltage of the eleventh transistor T11.
When the input terminal IN2 of the second voltage detection circuit is input with a corresponding timing controller voltage signal, the eleventh transistor T11 is turned off, a high level signal provided by the first high level supply terminal is written to the output terminal OUT2 of the second voltage detection circuit through the thirteenth resistor R13, and the output terminal OUT2 of the second voltage detection circuit outputs the high level signal. When the input terminal IN2 of the second voltage detection circuit is not input with the corresponding timing controller voltage signal, a low level signal provided by the low level supply terminal is written to the gate of the P-type transistor through the twelfth resistor R12, the eleventh transistor T11 is turned on, the low level signal provided by the low level supply terminal is written to the output terminal OUT2 of the second voltage detection circuit through the eleventh transistor T11, and the output terminal OUT2 of the second voltage detection circuit outputs the low level signal.
That is, when the input terminal IN2 of the second voltage detection circuit is input with a corresponding timing controller voltage signal (that is, the second power supply channel is loaded with the corresponding timing controller voltage signal), the output terminal OUT2 of the second voltage detection circuit outputs a high level signal to represent the third operation state information; and when the input terminal IN2 of the second voltage detection circuit is not input with the corresponding timing controller voltage signal (that is, the second power supply channel is not loaded with the corresponding timing controller voltage signal), the output terminal OUT2 of the second voltage detection circuit outputs a low level signal to represent the fourth operation state information.
In the case shown in
where V2 is a voltage of the timing controller voltage signal, which should be provided by the second power supply channel connected to the second voltage detection circuit, VL is a low level voltage provided by the low level supply terminal, and Vth_T11_P is a threshold voltage of the eleventh transistor T11.
In the cases shown in
A cathode of the eleventh zener diode ZD11 is electrically connected to the input terminal IN2 of the second voltage detection circuit, an anode of the eleventh zener diode ZD11 is electrically connected to a first terminal of the eleventh resistor R11, and a breakdown voltage of the eleventh zener diode ZD11 is less than a voltage of the timing controller voltage signal, which should be provided by the second power supply channel connected to the second voltage detection circuit.
A second terminal of the eleventh resistor R11 is electrically connected to a gate of the eleventh transistor T11.
A first electrode of the eleventh transistor T11 is electrically connected to an output terminal OUT2 of the second voltage detection circuit, a second electrode of the eleventh transistor T11 is electrically connected to a low level supply terminal, and the eleventh transistor T11 is an N-type transistor.
A first terminal of the thirteenth resistor R13 is electrically connected to a first high level supply terminal, and a second terminal of the thirteenth resistor R13 is electrically connected to the output terminal OUT2 of the second voltage detection circuit and the first electrode of the eleventh transistor T11.
In some embodiments, the second voltage detection circuit further includes a twelfth resistor R12. A first terminal of the twelfth resistor R12 is electrically connected to the anode of the eleventh zener diode ZD11 and the first terminal of the eleventh resistor R11, and a second terminal of the twelfth resistor R12 is electrically connected to the low level supply terminal.
The operation principle of the second voltage detection circuit shown in
It should be noted that the second voltage detection circuit may have another circuit structure in an embodiment of the present disclosure, but any detection circuit that can detect whether or not a certain signal is present may be used as the second voltage detection circuit in the present disclosure. Examples will not be listed for description in the present disclosure.
In some embodiments, a power supply transistor (not shown) is disposed in the second power supply channel. A first electrode of the power supply transistor is electrically connected to the display control system component 2, and a second electrode of the power supply transistor is electrically connected to the timing control component 4. The second detection unit 112 is electrically connected to the second electrode of the power supply transistor.
In some embodiments, the second detection unit 112 is integrated in the display control system component 2. Specifically, each electrical device in the second detection unit 112 may be integrated on a circuit board in the display control system component 2 and located at a periphery of a display control system chip, and electrically connected to a part of external terminals of the display control system chip according to actual needs, so that a signal can be transmitted between the second detection unit 112 and the display control system component 2.
Based on the foregoing, it can be seen that, through the second detection unit 112, whether a fault occurs in supplying power by the display control system component 2 to the timing control component 4 can be effectively detected, and the third operation state information for representing that the supplying power by the display control system component 2 to the timing control component 4 is normal, or the fourth operation state information for representing that the supplying power by the display control system component 2 to the timing control component 4 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The third detection unit 113 is connected to the I2C data reading interface for the backlight driving component 5, and is configured to output, in response to control of a third detection signal and according to a voltage value of the backlight source voltage signal at the power supply output terminal read by the I2C data reading interface for the backlight driving component 5, fifth operation state information for indicating that supplying power by the backlight driving component 5 to the backlight source 6 is normal, or sixth operation state information for indicating that the supplying power by the backlight driving component 5 to the backlight source 6 is abnormal.
In some embodiments, the third detection unit 113 is specifically configured to output the fifth operation state information when the voltage value of the backlight source voltage signal is within a first preset voltage range, and output the sixth operation state information when the voltage value of the backlight source voltage signal is outside the first preset voltage range.
In some embodiments, the third detection unit 113 is integrated in the display control system component 2. Specifically, the third detection unit 113 is integrated, as software, in the display control system chip of the display control system component 2, and is capable of reading the voltage value of the backlight source voltage signal at the power supply output terminal of the backlight driving component 5 through the I2C data reading interface for the backlight driving component 5.
The third detection unit 113 is electrically connected to the power supply output terminal OUT_V. and the third detection unit 113 is configured to output, in response to control of a third detection signal and according to a condition of a backlight source voltage signal loaded at the power supply output terminal OUT_V, fifth operation state information indicating that supplying power by the backlight driving component 5 to the backlight source 6 is normal, or sixth operation state information indicating that the supplying power by the backlight driving component 5 to the backlight source 6 is abnormal.
Optionally, when the power supply output terminal OUT_V of the backlight driving component 5 is loaded with a backlight source voltage signal, it indicates that the supplying power by the backlight driving component 5 to the backlight source 6 is normal; and when the power supply output terminal OUT_V of the backlight driving component 5 is not loaded with the backlight source voltage signal, it indicates that the supplying power by the backlight driving component 5 to the backlight source 6 is abnormal.
In some embodiments, the third voltage detection circuit includes a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, and a twenty-first transistor T21.
A first terminal of the twenty-first resistor R21 is electrically connected to the input terminal IN3 of the third voltage detection circuit, and a second terminal of the twenty-first resistor R21 is electrically connected to a first terminal of the twenty-second resistor R22 and a gate of the twenty-first transistor T21.
The first terminal of the twenty-second resistor R22 is electrically connected to the gate of the twenty-first transistor T21, and a second terminal of the twenty-second resistor R22 is electrically connected to a low level supply terminal.
A first electrode of the twenty-first transistor T21 is electrically connected to an output terminal OUT3 of the third voltage detection circuit, and a second electrode of the twenty-first transistor T21 is electrically connected to the low level supply terminal.
A first terminal of the twenty-third resistor R23 is electrically connected to a second high level supply terminal, and a second terminal of the twenty-third resistor R23 is electrically connected to the output terminal OUT3 of the second voltage detection circuit and the first electrode of the twenty-first transistor T21.
As one example, the twenty-first transistor T21 may be an N-type transistor. When the input terminal IN3 of the third voltage detection circuit is input with a corresponding backlight source voltage signal, the twenty-first transistor T21 is turned on, a low level signal provided by the low level supply terminal is written to the output terminal OUT3 of the third voltage detection circuit through the twenty-first transistor T21, and the output terminal OUT3 of the third voltage detection circuit outputs the low level signal. When the input terminal IN3 of the third voltage detection circuit is not input with the corresponding backlight source voltage signal, the twenty-first transistor T21 is turned off, a high level signal provided by the second high level supply terminal is written to the output terminal OUT3 of the third voltage detection circuit through the twenty-third resistor R23, and the output terminal OUT3 of the third voltage detection circuit outputs the high level signal.
That is, when the input terminal of the third voltage detection circuit is input with a corresponding backlight source voltage signal (that is, the power supply output terminal OUT_V of the backlight driving component 5 is loaded with the corresponding backlight source voltage signal), the output terminal OUT3 of the third voltage detection circuit outputs a low level signal to represent the fifth operation state information; and when the input terminal IN3 of the third voltage detection circuit is not input with the corresponding backlight source voltage signal (that is, the power supply output terminal OUT_V of the backlight driving component 5 is not loaded with the corresponding backlight source voltage signal), the output terminal OUT3 of the third voltage detection circuit outputs a high level signal to represent the sixth operation state information.
In the case shown in
where V3 is a voltage of the backlight source voltage signal, which should be provided by the power output terminal OUT_V of the backlight driving component 5 connected to the third voltage detection circuit, VL is a low level voltage provided by the low level supply terminal, and Vth_T21_N is a threshold voltage of the twenty-first transistor T21.
When the input terminal IN3 of the third voltage detection circuit is input with a corresponding backlight source voltage signal, the twenty-first transistor T21 is turned off, a high level signal provided by the second high level supply terminal is written to the output terminal OUT3 of the third voltage detection circuit through the twenty-third resistor R23, and the output terminal OUT3 of the third voltage detection circuit outputs the high level signal. When the input terminal IN3 of the third voltage detection circuit is not input with the corresponding backlight source voltage signal, a low level signal provided by the low level supply terminal is written to the gate of the P-type transistor through the twenty-second resistor R22, the twenty-first transistor T21 is turned on, the low level signal provided by the low level supply terminal is written to the output terminal OUT3 of the third voltage detection circuit through the twenty-first transistor T21, and the output terminal OUT3 of the third voltage detection circuit outputs the low level signal.
That is, when the input terminal IN3 of the third voltage detection circuit is input with a corresponding backlight source voltage signal (that is, the power supply output terminal OUT_V of the backlight driving component 5 is loaded with the corresponding backlight source voltage signal), the output terminal OUT3 of the third voltage detection circuit outputs a high level signal to represent the fifth operation state information; and when the input terminal IN3 of the third voltage detection circuit is not input with the corresponding backlight source voltage signal (that is, the power supply output terminal OUT_V of the backlight driving component 5 is not loaded with the corresponding backlight source voltage signal), the output terminal OUT3 of the third voltage detection circuit outputs a low level signal to represent the sixth operation state information.
In the case shown in
where V3 is a voltage of the backlight source voltage signal, which should be provided by the power supply output terminal OUT_V connected to the third voltage detection circuit, VL is a low level voltage provided by the low level supply terminal, and Vth_T21_P is a threshold voltage of the twenty-first transistor T21.
In the cases shown in
A cathode of the twenty-second zener diode ZD22 is electrically connected to an input terminal IN3 of the third voltage detection circuit, an anode of the twenty-second zener diode ZD22 is electrically connected to a first terminal of the twenty-first resistor R21, and a breakdown voltage of the twenty-second zener diode ZD22 is less than a voltage of the backlight source voltage signal, which should be provided by the power supply output terminal OUT_V of the backlight driving component 5 connected to the third voltage detection circuit.
A second terminal of the twenty-first resistor R21 is electrically connected to a gate of the twenty-first transistor T21.
A first electrode of the twenty-first transistor T21 is electrically connected to an output terminal OUT3 of the third voltage detection circuit, a second electrode of the twenty-first transistor T21 is electrically connected to a low level supply terminal, and the twenty-first transistor T21 is an N-type transistor.
A first terminal of the twenty-third resistor R23 is electrically connected to a second high level supply terminal, and a second terminal of the twenty-third resistor R23 is electrically connected to the output terminal OUT3 of the third voltage detection circuit and the first electrode of the twenty-first transistor T21.
In some embodiments, the third voltage detection circuit further includes a twenty-second resistor R22. A first terminal of the twenty-second resistor R22 is electrically connected to the anode of the twenty-second zener diode ZD22 and the first terminal of the twenty-first resistor R21, and a second terminal of the twenty-second resistor R22 is electrically connected to the low level supply terminal.
The operation principle of the third voltage detection circuit shown in
It should be noted that the third voltage detection circuit may have another circuit structure in an embodiment of the present disclosure, but any detection circuit that can detect whether or not a certain signal is present may be used as the third voltage detection circuit in the present disclosure. Examples will not be listed for description in the present disclosure.
In some embodiments, the third detection unit 113 is integrated in the backlight driving component 5. Specifically, the backlight driving component 5 includes a circuit board fixed with various electrical devices for implementing the backlight driving function, and each electrical device in the third detection unit 113 may be integrated on the circuit board in the backlight driving component 5, and electrically connected to a part of external terminals existing in the backlight driving component 5 according to actual needs, so that a signal can be transmitted between the third detection unit 113 and the backlight driving component 5. In addition, the output terminal of the third detection unit 113 is further connected to the display control system component 2, so that a signal can be transmitted between the third detection unit 113 and the display control system component 2 (for example, the fifth operation state information/sixth operation state information is transmitted to the display control system component 2).
Based on the foregoing, it can be seen that, through the third detection unit 113, whether a fault occurs in supplying power by the backlight driving component 5 to the backlight source 6 can be effectively detected, and the fifth operation state information for representing that the supplying power by the backlight driving component 5 to the backlight source 6 is normal, or the sixth operation state information for representing that the supplying power by the backlight driving component 5 to the backlight source 6 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The fourth detection unit 114 is configured to output, in response to control of a fourth detection signal and according to the operating current signal of the backlight source 6 during operation of the backlight source 6, seventh operation state information indicating that the operating current of the backlight source 6 is normal, or eighth operation state information indicating that the operating current of the backlight source 6 is abnormal.
Optionally, the fourth detection unit 114 is specifically configured to output the seventh operation state information when a current value of the operating current signal of the backlight source 6 is within a first preset current range, and output the eighth operation state information when the current value of the operating current signal of the backlight source 6 is outside the first preset current range.
In some embodiments, the backlight driving component 5 is provided with an I2C data reading interface. The fourth detection unit 114 is connected to the I2C data reading interface of the backlight driving component 5, and the fourth detection unit 114 is further configured to read, in response to the control of the fourth detection signal, the current value of the operating current signal of the backlight source 6 through the I2C data reading interface of the backlight driving component 5.
In some embodiments, the fourth detection unit 114 is integrated in the display control system component 2. Specifically, the fourth detection unit 114 is integrated, as software, in the display control system chip in the display control system component 2, and is capable of reading the current value of the operating current signal of the backlight source 6 (that is, the current value at the power supply output terminal OUT_V where the backlight driving component 5 supplies power to the backlight source 6) through the I2C data reading interface for the backlight driving component 5.
An input terminal of the sampling circuit 1141 is electrically connected to the backlight source 6, the sampling circuit 1141 is connected in series to the backlight source 6, and the sampling circuit 1141 is configured to acquire an analog sampling voltage signal corresponding to the operating current signal of the backlight source 6. The first signal processing subunit 1142 is configured to perform an analog-to-digital conversion on the analog sampling voltage signal to obtain a corresponding digital sampling voltage signal, and detect, according to a voltage value of the digital sampling voltage signal, whether a current value of the operating current signal of the backlight source 6 is within a first preset current range.
If the voltage value of the digital sampling voltage signal is within a second preset voltage range, it indicates that, the first signal processing subunit 1142 detects that the current value of the operating current signal of the backlight source 6 is within the first preset current range, and the seventh operation state information is output. If the voltage value of the digital sampling voltage signal is outside the second preset voltage range, it indicates that, the first signal processing subunit 1142 detects that the current value of the operating current signal of the backlight source 6 is outside the first preset current range, and the eighth operation state information is output.
In some embodiments, the backlight driving component 5 includes a boost circuit and a boost control module. An output terminal of the boost circuit is a power supply output terminal OUT_V of the backlight driving component 5 for providing the backlight source voltage signal to the backlight source 6, and the boost circuit serves to generate and output the backlight source voltage signal.
The boost circuit includes an inductor L, a boost control transistor Tr, a rectifier diode D, and a thirtieth resistor R30. A first terminal of the inductor L is electrically connected to an input terminal IN_V of the boost circuit, and a second terminal of the inductor L is electrically connected to an anode of the rectifier diode D. A gate of the boost control transistor Tr is electrically connected to the boost control module, a first electrode of the boost control transistor Tr is electrically connected to the anode of the rectifier diode D. and a second electrode of the boost control transistor Tr is electrically connected to a first terminal of the thirtieth resistor R30. A second terminal of the thirtieth resistor R30 is grounded. A cathode of the rectifier diode D is electrically connected to the power supply output terminal OUT_V of the backlight driving component 5. An input terminal of the sampling circuit 1141 is electrically connected to the first terminal of the thirtieth resistor R30.
In practical applications, the boost control transistor Tr is controlled to be turned on or off by a signal output by the boost control module, so that a voltage of the backlight source voltage signal output by the boost circuit can be controlled.
In an embodiment of the present disclosure, the thirtieth resistor R30 in the boost circuit also serves as a sampling resistor. That is, a detection of the operating current signal of the backlight source 6 is converted into a detection of a voltage signal at the first terminal of the thirtieth resistor R30. Under the condition that a resistance value of the thirtieth resistor R30 is fixed, a magnitude of the voltage at the first terminal of the thirtieth resistor R30 is proportional to the operating current signal of the backlight source 6.
In some embodiments, the sampling circuit 1141 includes a thirty-first resistor R31, a thirty-second resistor R32, a thirty-third resistor R33, and an operational amplifier OP. A first terminal of the thirty-first resistor R31 is electrically connected to the input terminal of the sampling circuit 1141, and a second terminal of the thirty-first resistor R31 is electrically connected to a non-inverting input terminal of the operational amplifier OP. A first terminal of the thirty-second resistor R32 is electrically connected to an inverting input terminal of the operational amplifier OP, and a second terminal of the thirty-second resistor R32 is grounded. A first terminal of the thirty-third resistor R33 is electrically connected to the inverting input terminal of the operational amplifier OP, and a second terminal of the thirty-third resistor R33 is electrically connected to an output terminal of the operational amplifier OP. The output terminal of the operational amplifier OP is electrically connected to an output terminal of the sampling circuit 1141.
In an embodiment of the present disclosure, the sampling circuit 1141 may sample and amplify the voltage signal at the first terminal of the thirty-third resistor R30, where a specific amplification factor is determined by a ratio of a resistance value of the thirty-third resistor R33 to a resistance value of the thirty-second resistor R32.
In some embodiments, the sampling circuit 1141 further includes an anti-interference capacitor C31. A first terminal of the anti-interference capacitor C31 is electrically connected to the non-inverting input terminal, and a second terminal of the anti-interference capacitor C31 is grounded. A capacitance value of the anti-interference capacitor C31 is in a range of 330 P to 2200 P.
It should be noted that, in an embodiment of the present disclosure, a special sampling resistor (the thirtieth resistor R30 does not serve as a sampling resistor) may alternatively be disposed in the sampling circuit 1141, and the analog sampling voltage signal corresponding to the operating current signal of the backlight source 6 is obtained by detecting a voltage signal formed by the operating current signal of the backlight source 6 flowing through the sampling resistor. Such a case should also fall within the protection scope of the present disclosure.
In some embodiments, the sampling circuit 1141 is integrated in the backlight driving component 5. Specifically, the backlight driving component 5 includes a circuit board fixed with various electrical devices for implementing the backlight driving function, and each electrical device in the sampling circuit 1141 may be integrated on the circuit board of the backlight driving component 5. That is, the electrical devices in the sampling circuit and the electrical devices in the voltage boost circuit are fixed on the same circuit board.
The first signal processing subunit 1142 is integrated in the display control system component 2. Specifically, the first signal processing subunit 1142 is integrated, as software, in a display control system chip in the display control system component 2.
Based on the foregoing, it can be seen that, through the fourth detection unit 114, whether a fault occurs in the operating current signal of the backlight source 6 during operation of the backlight source 6 can be effectively detected (for example, when the operating current of the backlight source 6 is too large, it indicates that a problem of short circuit in a lamp strip exists in the backlight source 6, and when the operating current of the backlight source 6 is too small, it indicates that a problem of open circuit in a lamp strip exists in the backlight source 6), and the seventh operation state information for representing that the operating current of the backlight source 6 is normal, or the eighth operation state information for indicating that the operating current of the backlight source 6 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The fifth detection unit 115 is configured to output, in response to control of a fifth detection signal and according to the current emission luminance of the backlight source 6 during operation thereof, ninth operation state information for indicating that emission of the backlight source 6 is normal, or tenth operation state information for indicating that the emission of the backlight source 6 is abnormal.
Optionally, the backlight driving component 5 includes an emission control circuit (generally including an emission control transistor Tb). A second terminal of the backlight source 6 is electrically connected to a second operating voltage terminal (generally supplied with a Vss voltage) through the emission control circuit. The emission control circuit is configured to be controlled by an emission luminance control signal, so that a conductive path is formed between the second terminal of the backlight source 6 and the second operating voltage terminal when the emission luminance control signal is in an active level state, and an open circuit is formed between the second terminal of the backlight source 6 and the second operating voltage terminal when the emission luminance control signal is in a non-active level state.
In an embodiment of the present disclosure, a lighting time of the backlight source 6 per unit time can be controlled by the emission control circuit, so that an equivalent emission luminance of the backlight source 6 per unit time can be controlled. The shorter the lighting time of the backlight source 6 per unit time is, the darker the equivalent emission luminance of the backlight source 6 is.
In some embodiments, the fifth detection unit 115 includes a photosensor circuit 1151 and a second signal processing subunit 1152. The photosensor circuit 1151 is configured to acquire light emitted by the backlight source 6 during operation thereof and output a corresponding photosensitive electrical signal. The second signal processing subunit 1152 is configured to determine, according to the photosensitive electrical signal output by the photosensor, the current emission luminance of the backlight source 6 during operation thereof, and detect, according to the current emission luminance and a duty ratio of the emission luminance control signal currently received by the emission control circuit, whether the emission of the backlight source 6 is normal or abnormal.
The power supply circuit 11512 is configured to provide required various operating voltages to the photosensor 11511. The photosensor 11511 serves to acquire light, generate a corresponding photosensitive electrical signal and transmit the corresponding photosensitive electrical signal to the output module 11513. The output module 11513 serves to output the photosensitive electrical signal. Data transmission may be performed between the photosensor 11511 and the output module 11513 through an SCL\SDA signal line (i.e., Serial Clock Line\Serial Data Line).
It should be noted that the specific circuit structure of the power supply circuit 11512 shown in the drawings is only an alternative implementation in the present disclosure, which does not limit the technical solution of the present disclosure. In an embodiment of the present disclosure, the specific circuit structure of the power supply circuit 11512 may be designed and adjusted according to the selected photosensor 11511.
In some embodiments, the output module 11513 is connected to an I2C bus interface of the display control system component 2, so that the photosensitive electrical signal can be transmitted to the display control system component 2.
In practical applications, the backlight source 6 is generally disposed on a front surface of the back plate BL, and other optical structures, such as a light guide plate and optical films (e.g., a prism film, a diffuser sheet, or the like) are disposed on the front surface of the back plate BL. In an embodiment of the present disclosure, a via penetrating through the back plate BL may be formed in the back plate BL, and then the photosensor 11511 is disposed in the via, so that the photosensor can acquire light emitted by the backlight source 6.
The luminance determining subunit is configured to determine, according to the photosensitive electrical signal, the current emission luminance of the backlight source 6 during operation of the backlight source 6.
The first judging subunit is configured to judge whether the current emission luminance is less than a first preset target luminance.
The calculation subunit is configured to, when the first judging subunit judges that the current emission luminance is less than the first preset target luminance, calculate, according to the current emission luminance and a duty ratio of the emission luminance control signal currently received by the emission control circuit, a duty ratio required for the emission luminance control signal when the backlight source 6 presents a second preset target luminance, where the second preset target luminance is greater than or equal to the first preset target luminance.
The second judging subunit is configured to judge whether the duty ratio required for the emission luminance control signal when the backlight source 6 presents the second preset target luminance is within a first preset duty ratio range.
The first fault detection subunit is configured to detect that the emission of the backlight source 6 is normal when the second judging subunit judges that the duty ratio required for the emission luminance control signal when the backlight source 6 presents the second preset target luminance is within the first preset duty ratio range; detect that the emission of the backlight source 6 is abnormal when the second judging subunit judges that the duty ratio required for the emission luminance control signal when the backlight source 6 presents the second preset target luminance is outside the first preset duty ratio range; and detect that the emission of the backlight source 6 is normal when the first judging subunit judges that the current emission luminance is greater than or equal to the first preset target luminance.
The duty ratio of the emission luminance control signal is a ratio of a duration of the emission luminance control signal in an active level state in a unit period to a duration of the unit period. A larger duty ratio indicates a longer lighting time of the backlight source 6 in the unit period.
In the solutions shown in
The second signal processing subunit 1152 includes a luminance determining subunit, a luminance judging subunit, a duty ratio adjusting subunit, a third judging subunit, a first control subunit, and a first fault detection subunit.
The luminance determining subunit is configured to determine, according to the photosensitive electrical signal, the current emission luminance of the backlight source 6 during operation of the backlight source 6.
The luminance judging subunit is configured to judge whether the current emission luminance is within a preset target luminance range.
The duty ratio adjusting subunit is configured to increase, when the luminance judging subunit judges that the current emission luminance is less than a minimum value of the preset target luminance range, a duty ratio of the emission luminance control signal according to a first preset adjustment algorithm (for example, increase the duty ratio of the emission luminance control signal in a step-wise increase manner); and to reduce, when the luminance judging subunit judges that the current emission luminance is greater than a maximum value of the preset target luminance range, the duty ratio of the emission luminance control signal according to a second preset adjustment algorithm (for example, reduce the duty ratio of the emission luminance control signal in a step-wise reduction manner).
The third judging subunit is configured to judge whether the duty ratio of the emission luminance control signal which has been adjusted by the duty ratio adjusting subunit is within a second preset duty ratio range.
The first control subunit is configured to, when the third judging subunit judges that the duty ratio of the emission luminance control signal which has been adjusted by the duty ratio adjusting subunit is within the second preset duty ratio range, control the luminance control signal supply unit to output the emission luminance control signal with the duty ratio which has been adjusted by the duty ratio adjusting subunit to the emission control circuit, and control the photosensor circuit 1151 to acquire again light emitted by the backlight source 6 during operation of the backlight source 6.
The first fault detection subunit is configured to detect that the emission of the backlight source 6 is abnormal when the third judging subunit judges that the duty ratio of the emission luminance control signal which has been adjusted by the duty ratio adjusting subunit is outside the second preset duty ratio range; and detect that the emission of the backlight source 6 is normal when the luminance judging subunit judges that the current emission luminance is within the preset target luminance range.
In the solutions shown in
In some embodiments, the photosensor circuit is disposed on the back plate of the display module. The second signal processing subunit is integrated in a display control system chip of the display control system component 2. Specifically, the second signal processing subunit is integrated, as software, in the display control system chip of the display control system component 2.
Based on the foregoing, it can be seen that, through the fifth detection unit 115, whether a fault occurs in the emission of the backlight source 6 can be effectively detected, and the ninth operation state information for representing that the emission of the backlight source 6 is normal, or the tenth operation state information for representing that the emission of the backlight source 6 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The sixth detection unit 116 is configured to output, in response to control of a sixth detection signal and according to the horizontal synchronization signal and/or the vertical synchronization signal, eleventh operation state information for indicating that a process of providing the display data signal by the calculation component 3 to the display control system component 2 is normal, or twelfth operation state information for indicating that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is abnormal.
The frequency determining subunit 1161 is configured to determine, according to the horizontal synchronization signal, a line frequency at which the calculation component 3 transmits the display data signal, and determine, according to the vertical synchronization signal, a frame frequency at which the calculation component 3 transmits the display data signal.
The fourth judging subunit 1162 judges whether the line frequency determined by the frequency determining subunit 1161 is within a preset line frequency range, and whether the frame frequency determined by the frequency determining subunit 1161 is within a preset frame frequency range.
The second fault detection subunit 1163 is configured to detect that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is normal, when the fourth judging subunit 1162 judges that the line frequency determined by the frequency determining subunit 1161 is within the preset line frequency range and the frame frequency determined by the frequency determining subunit is within the preset frame frequency range; and to detect that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is abnormal, when the fourth judging subunit 1162 judges that the line frequency determined by the frequency determining subunit 1161 is outside the preset line frequency range and/or the fourth judging subunit 1162 judges that the frame frequency determined by the frequency determining subunit is outside the preset frame frequency range.
In the solutions shown in
In some embodiments, the sixth detection unit 116 is integrated in the display control system component 2. Specifically, the sixth detection unit 116 is integrated, as software, in a display control system chip of the display control system component 2.
Based on the foregoing, it can be seen that, through the sixth detection unit 116, whether a fault occurs in the process of providing the display data signal by the calculation component 3 to the display control system component 2 can be effectively detected, and the eleventh operation state information for representing that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is normal, or the twelfth operation state information for representing that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
The seventh detection unit 117 is configured to output, in response to control of a seventh detection signal and according to a condition of the handshake signal received by the timing control component 4 in a detection period, thirteenth operation state information for indicating that outputting a signal by the display control system component 2 to the timing control component 4 is normal, or fourteenth operation state information for indicating that the outputting a signal by the display control system component 2 to the timing control component 4 is abnormal.
A “handshake” procedure may be performed according to a communication protocol in a process of outputting a signal by the display control system component 2 to the timing control component 4. In the “handshake” procedure, handshake information is transferred. The process of outputting a signal by the display control system component 2 to the timing control component 4 can be determined to be normal or abnormal according to a condition of the handshake signal received by the timing control component 4 in the detection period.
In some embodiments, the display control system component 2 and the timing control component 4 communicate with each other through a high definition digital display (V-BY-ONE) interface. Optionally, the handshake signal includes a LOCKN signal. The LOCKN signal transmitted by the display control system component 2 to the timing control component 4 is a high level signal under a normal condition.
The fifth judging subunit 1171 is configured to judge whether a frequency of receiving the handshake signal by the timing control component 4 in the detection period is within a preset frequency range.
The third fault detection subunit 1172 is configured to detect that the outputting a signal by the display control system component 2 to the timing control component 4 is normal when the fifth judging subunit 1171 judges that the frequency of receiving the handshake signal by the timing control component 4 in the detection period is within the preset frequency range; and detect that the outputting a signal by the display control system component 2 to the timing control component 4 is abnormal when the fifth judging subunit 1171 judges that the frequency of receiving the handshake signal by the timing control component 4 in the detection period is outside the preset frequency range.
In some embodiments, the seventh detection unit 117 is integrated in the timing control component 4. Specifically, the timing control component 4 includes a circuit board fixed with a timing control chip, and the seventh detection unit 117 is integrated, as software, in the timing control chip of the timing control component 4. An output terminal of the seventh detection unit 117 is electrically connected to the display control system component 2, to transmit the thirteenth operation state information or the fourteenth operation state information generated by the seventh detection unit 117 to the display control system component 2.
Based on the foregoing, it can be seen that, through the seventh detection unit 117, whether a fault occurs in the process of outputting a signal by the display control system component 2 to the timing control component 4 can be effectively detected, and the thirteenth operation state information for representing that the outputting a signal by the display control system component 2 to the timing control component 4 is normal, or the fourteenth operation state information for representing that the outputting a signal by the display control system component 2 to the timing control component 4 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
In some embodiments, the eighth detection unit 118 is configured to output, in response to control of an eighth detection signal and according to a display data signal of an image to be displayed before a screen switching and a display data signal of an image to be displayed after the screen switching, acquired by the timing control component 4 from the display control system component 2, fifteenth operation state information for indicating that performing the screen switching by the display control system component 2 is normal, or sixteenth operation state information for indicating that performing the screen switching by the display control system component 2 is abnormal.
The second control subunit 1181 is configured to control the calculation component 3 to transmit a display data signal of a first image to the display control system component 2, and control the timing control component 4 to acquire the display data signal of the image to be displayed from the display control system component 2 and perform feature extraction on the acquired display data signal (extract at least one feature from this acquired display data signal) to obtain first display feature information.
The third control subunit 1182 is configured to control the calculation component 3 to transmit a display data signal of a second image to the display control system component 2, and control the timing control component 4 to acquire the display data signal of the image to be displayed from the display control system component 2 and perform feature extraction on the acquired display data signal (extract at least one feature from this acquired display data signal) to obtain second display feature information. The second image and the first image are two different images.
The fourth fault detection subunit 1183 is configured to detect, according to a difference between the first display feature information and the second display feature information, whether performing the screen switching by the display control system component 2 is normal or abnormal.
In the embodiment of the present disclosure, firstly, the calculation component 3 is controlled to transmit the display data signal of the first image to the display control system component 2, and the timing control component 4 is controlled to acquire the display data signal of the image to be displayed from the display control system component 2 and perform feature extraction to obtain the first display feature information. Then, the calculation component 3 is controlled to transmit the display data signal of the second image to the display control system component 2, so that the display control system component 2 performs screen switching, and the timing control component 4 is controlled to acquire the display data signal of the image to be displayed from the display control system component 2 and perform feature extraction to obtain the second display feature information. Then, whether performing the screen switching by the display control system component 2 is normal or abnormal is judged according to the difference between the first display feature information and the second display feature information. If the difference between the first display feature information and the second display feature information is greater than a set value, it indicates that the performing the screen switching by the display control system component 2 is normal. If the difference between the first display feature information and the second display feature information is less than or equal to the set value, it indicates that the performing the screen switching by the display control system component 2 is abnormal.
In some embodiments, the timing control component 4 is configured to, in response to control of the second control subunit 1181 or the third control subunit 1182, perform luminance feature extraction on the acquired display data signal (extract luminance feature from the acquired display data signal). The first display feature information includes first luminance information, and the second display feature information includes second luminance information. The fourth fault detection subunit is specifically configured to detect, according to a difference value between the first luminance information and the second luminance information, whether performing the screen switching by the display control system component 2 is normal or abnormal. When the difference value is greater than a preset target difference value, it is detected that the performing the screen switching by the display control system component 2 is normal. When the difference value is less than or equal to the preset target difference value, it is detected that the performing the screen switching by the display control system component 2 is abnormal.
In some embodiments, the first luminance information includes a first luminance function value, and the second luminance information includes a second luminance function value. The difference value between the first luminance information and the second luminance information is a quotient of an absolute value of a difference between the second luminance function value and the first luminance function value and a sum of the second luminance function value and the first luminance function value.
A luminance function may also be called a gray scale function, including for example a histogram function. According to an example of the present disclosure, a histogram function value may be extracted from an entire image frame. Alternatively, a partial image region may be determined from the entire image frame, and the histogram function value may be extracted from this partial image region. In addition, the number, areas, and coordinate values of the image regions for extracting the histogram function values may be set in advance, and then the histogram function values may be extracted based on the parameters set in advance.
Apparently, the luminance information obtained based on the luminance feature extraction in the embodiment of the present disclosure refers to luminance feature capable of describing an entire luminance feature of the screen, or luminance feature of one or more regions divided from the screen in advance. The luminance feature may specifically include a maximum value, a minimum value, an average value, a variance, a variation curve, or the like of the luminance (or the gray scale) in the corresponding region. The case of adopting the histogram function to perform luminance feature extraction described above is only an optional implementation in an embodiment of the present disclosure, and does not limit the technical solution of the present disclosure. In an embodiment of the present disclosure, other feature extraction algorithms may alternatively be adopted to perform luminance feature extraction on the display data signal, as long as a same feature extraction algorithm is adopted for both feature extractions.
In some embodiments, the eighth detection unit 118 is integrated in the display control system component 2. Further optionally, the eighth detection unit 118 is integrated, as software, in a display control system chip of the display control system component 2.
Based on the foregoing, it can be seen that, through the eighth detection unit 118, whether a fault occurs in performing the screen switching by the display control system component 2 can be effectively detected, and the fifteenth operation state information for indicating that the performing the screen switching by the display control system component 2 is normal, or the sixteenth operation state information for indicating that the performing the screen switching by the display control system component 2 is abnormal can be output, facilitating the operation and maintenance personnel to operate and maintain the display product according to the received “operation state information”, and improving the operation and maintenance efficiency.
It should be noted that, in practical applications, the detection module 11 may selectively include at least one of the first detection unit 111, the second detection unit 112, the third detection unit 113, the fourth detection unit 114, the fifth detection unit 115, the sixth detection unit 116, the seventh detection unit 117, and the eighth detection unit 118 in the above embodiments according to actual needs, so that at least one of the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, the backlight driving component 5, and the backlight source 6 is monitored. A new technical solution obtained by combining the above technical means also belongs to the protection scope of the present disclosure.
Based on the foregoing, it can be seen that, the “operation state information” outputted by the first detection unit 111 to the eighth detection unit 118 may be transmitted to the display control system component 2. Therefore, as an optional implementation, for various faults, a fault flag and meanings of different values taken by the fault flag may be designed in advance. In an actual operating process, the display control system component 2 may determine a current value of the fault flag according to the received various operation state information.
As one example, the first detection unit 111 may be designed with a fault flag “PG” for indicating whether the supplying power by the power component 1 to the display control system component 2 is normal or abnormal. “PG” has two values, “1” or “0”, where a value of “1” indicates that the supplying power by the power component 1 to the display control system component 2 is normal, and a value of “0” indicates that the supplying power by the power component 1 to the display control system component 2 is abnormal.
The second detection unit 112 may be designed with a fault flag “TPG” for indicating whether the supplying power by the display control system component 2 to the timing control component 4 is normal or abnormal. “TPG” has two values, “1” or “0”, where a value of “1” indicates that the supplying power by the display control system component 2 to the timing control component 4 is normal, and a value of “0” indicates that the supplying power by the display control system component 2 to the timing control component 4 is abnormal.
The third detection unit 113 may be designed with a fault flag “LDV” for indicating whether the supplying power by the backlight driving component 5 to the backlight source 6 is normal or abnormal. “LDV” has two values, “1” or “0”, where a value of “1” indicates that the supplying power by the backlight driving component 5 to the backlight source 6 is normal, and a value of “0” indicates that the supplying power by the backlight driving component 5 to the backlight source 6 is abnormal.
The fourth detection unit 114 may be designed with a fault flag “LDI” for indicating whether the operating current of the backlight source 6 is normal or abnormal. “LDI” has two values, “1” or “0”, where a value of “1” indicates that the operating current of the backlight source 6 is normal, and a value of “0” indicates that the operating current of the backlight source 6 is abnormal.
The fifth detection unit 115 may be designed with a fault flag “BRI” for indicating whether the emission of the backlight source 6 is normal or abnormal. “BRI” has two values, “1” or “0”, where a value of “1” indicates that the emission of the backlight source 6 is normal, and a value of “0” indicates that the emission of the backlight source 6 is abnormal.
The sixth detection unit 116 may be designed with a fault flag “CP” for indicating whether the process of providing the display data signal by the calculation component 3 to the display control system component 2 is normal or abnormal. “CP” has two values, “1” or “0”, where a value of “1” indicates that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is normal, and a value of “0” indicates that the process of providing the display data signal by the calculation component 3 to the display control system component 2 is abnormal.
The seventh detection unit 117 may be designed with a fault flag “LK” for indicating whether the process of outputting a signal by the display control system component 2 to the timing control component 4 is normal or abnormal. “LK” has two values, “1” or “0”, where a value of “1” indicates that the process of outputting a signal by the display control system component 2 to the timing control component 4 is normal, and a value of “0” indicates that the process of outputting a signal by the display control system component 2 to the timing control component 4 is abnormal.
The eighth detection unit 118 may be designed with a fault flag “PCLK” for indicating whether performing the screen switching by the display control system component 2 is normal or abnormal. “PCLK” has two values, “1” or “0”, where a value of “1” indicates that the performing the screen switching by the display control system component 2 is normal, and a value of “0” indicates that the performing the screen switching by the display control system component 2 is abnormal.
Based on the above setting, in an actual operating process, if the display control system component 2 receives the first operation state information output by the first detection unit 111, the display control system component 2 assigns “1” to the fault flag “PG”; and if the display control system component 2 receives the second operation state information output by the first detection unit 111, the display control system component 2 assigns “0” to the fault flag “PG”.
If the display control system component 2 receives the third operation state information output by the second detection unit 112, the display control system component 2 assigns “1” to the fault flag “TPG”; and if the display control system component 2 receives the fourth operation state information output by the second detection unit 112, the display control system component 2 assigns “0” to the fault flag “TPG”.
If the display control system component 2 receives the fifth operation state information output by the third detection unit 113, the display control system component 2 assigns “1” to the fault flag “LDV”; and if the display control system component 2 receives the sixth operation state information output by the third detection unit 113, the display control system component 2 assigns “0” to the fault flag “LDV”.
If the display control system component 2 receives the seventh operation state information output by the fourth detection unit 114, the display control system component 2 assigns “1” to the fault flag “LDI”; and if the display control system component 2 receives the eighth operation state information output by the fourth detection unit 114, the display control system component 2 assigns “0” to the fault flag “LDI”.
If the display control system component 2 receives the ninth operation state information output by the fifth detection unit 115, the display control system component 2 assigns “1” to the fault flag “BRI”; and if the display control system component 2 receives the tenth operation state information output by the fifth detection unit 115, the display control system component 2 assigns “0” to the fault flag “BRI”.
If the display control system component 2 receives the eleventh operation state information output by the sixth detection unit 116, the display control system component 2 assigns “1” to the fault flag “CP”; and if the display control system component 2 receives the twelfth operation state information output by the sixth detection unit 116, the display control system component 2 assigns “0” to the fault flag “CP”.
If the display control system component 2 receives the thirteenth operation state information output by the seventh detection unit 117, the display control system component 2 assigns “1” to the fault flag “LK”; and if the display control system component 2 receives the fourteenth operation state information output by the seventh detection unit 117, the display control system component 2 assigns “0” to the fault flag “LK”.
If the display control system component 2 receives the fifteenth operation state information output by the eighth detection unit 118, the display control system component 2 assigns “1” to the fault flag “PCLK”; and if the display control system component 2 receives the sixteenth operation state information output by the eighth detection unit 118, the display control system component 2 assigns “0” to the fault flag “PCLK”.
In some embodiments, any at least two of the power component 1, the display control system component 2, the calculation component 3, the timing control component 4, and the backlight driving component 5 are located on a same circuit board.
In some embodiments, the power component 1, the display control system component 2, the calculation component 3, the timing control component 4 and the backlight driving component 5 are integrated on a same circuit board, which can increase the integration of the display module and reduce the cost.
In some embodiments, the transmission module 12 is integrated in the calculation component 3. The transmission module 12 may be a wired communication module or a wireless communication module (e.g., a WIFI communication module, a 4G communication module, a 5G communication module, or the like).
The display control system component 2 may transmit the operation state information (specifically, the fault flag and its corresponding assignment) to the calculation component 3 through an existing IC2 interface or an extended data interface (for example, an AUX interface), and the transmission module 12 in the calculation component 3 may transmit the received operation state information to the target object.
Based on the monitoring system in the display module, the display module can have the fault self-diagnosis function, and the operation state information of the target part in the display module can be transmitted to the operation and maintenance personnel for reference, so that the operation and maintenance personnel are not required to inspect on-site on whether a fault occurs in the display product, which is convenient for the operation and maintenance personnel to perform operation and maintenance on the display product, and favorable to promoting the operation and maintenance efficiency.
Based on the same inventive concept, an embodiment of the present disclosure further provides a display device, which includes the display module provided in the foregoing embodiments. For specific description of the display module, reference may be made to corresponding contents in the foregoing embodiments.
In an embodiment of the present disclosure, the display device may include one or more display modules. As one example, the display device is a splicing screen, and the plurality of display modules may be combined into the splicing screen according to a predetermined sequence (e.g., spliced in an array).
The display device in an embodiment of the present disclosure may be specifically a display product or part with a display function, such as an electronic tag, a tablet computer, a notebook computer, a palm computer, a vehicle-mounted electronic apparatus, a Mobile Internet Device (MID), an Augmented Reality (AR)/Virtual Reality (VR) apparatus, a robot, a wearable apparatus, an Ultra Mobile Personal Computer (UMPC), a netbook, a Personal Digital Assistant (PDA), a Personal Computer (PC), a television (TV), a teller machine, or a self-service machine.
In an embodiment of the present disclosure, the receiving device may be a server or a specific terminal (e.g., an electronic apparatus such as a mobile phone, a tablet, or a computer, which is available for the operation and maintenance personnel to refer to the information).
In some embodiments, the display device screens all the operation state information before transmitting the operation state information, and the display device finally transmits only operation state information for representing that an operation of a target part is abnormal. In this case, the receiving device may receive and display only the operation state information for representing that the operation of the target part is abnormal.
In some embodiments, the display device transmits all the operation state information (including the operation state information for indicating that the operation of the target part is normal and the operation state information for indicating that the operation of the target part is abnormal) generated by the detection module, and the receiving device may receive all the operation state information accordingly. However, the receiving device may selectively display part or all of the operation state information. For example, only the operation state information for representing that the operation of the target part is abnormal is displayed, or only the operation state information for representing that the operation of the target part is normal is displayed, or all the operation state information is indiscriminately displayed, or only the operation state information corresponding to a certain specific target part is displayed while the operation state information corresponding to other target parts is not displayed.
One or more display devices and one or more receiving devices may be included in the embodiment of the present disclosure. Each display device may transmit the generated operation state information to one or more receiving devices, and each receiving device may receive the operation state information transmitted from one or more display devices.
As some examples of the display device in the display system in an embodiment of the present disclosure, the display device may specifically be a display for presenting an advertisement, an electronic tag for displaying commodity information, a self-service machine for a user to query commodity information/store information/navigation lines, a navigation/stop board for displaying traffic information, or a display screen disposed in an electrical appliance (for example, a refrigerator, a washing machine, a purifier, a vending machine, or the like) for displaying relevant information of the electrical appliance.
It will be understood by one of ordinary skill in the art that all or part of the functional modules, units, subunits in the systems disclosed above may be implemented as software, firmware, hardware, or a suitable combination thereof. In a hardware implementation, the division between functional modules mentioned in the above description does not necessarily correspond to a division of physical components. For example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer readable medium, which may include a computer storage medium (also referred as non-transitory medium) and a communication medium (also referred as a transitory medium). As is well known to one of ordinary skill in the art, the term “computer storage medium” includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. The computer storage medium includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and can be accessed by a computer. In addition, as is well known to one of ordinary skill in the art, the communication medium typically includes computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery medium.
Exemplary embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some instances, it is obvious to one of ordinary skill in the art that, unless expressly stated otherwise, a feature, a characteristic and/or an element described in connection with a particular embodiment may be used alone or in combination with a feature, a characteristic and/or an element described in connection with other embodiments. Therefore, it will be understood by one of ordinary skill in the art that various changes in form and details may be made without departing from the scope of the present disclosure as set forth in the appended claims.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2022/121757 | 9/27/2022 | WO |
