Patent Application
20240206245
The present application claims the benefit of Chinese Patent Application under the application number 202110347557.2 filed on Mar. 31, 2021, the entire disclosure of which is incorporated herein by reference.
The present disclosure relates to the field of display technologies, especially to a display panel and a display device.
With the rapid development of AMOLEDs (active-matrix organic light-emitting diode), the development of mobile phones has entered a full-screen, narrow-bezel era. In order to bring users a better experience, full screen, narrow bezel, high resolution, curly wearing, folding, and the like will definitely become important development directions for AMOLEDs in the future. In order to achieve lighter and thinner display panels and products with higher integration, an FMLOC (flexible multi-layer on cell) technology came into being.
The present disclosure provides a display panel and a display device. By decreasing the step difference of the first insulating layer within the bonding region, the risk of peeling of the first insulating layer is reduced.
According to an aspect of the present disclosure, there is provided a display panel. The display panel comprises: a functional circuit region and a bonding region on a side of the functional circuit region; wherein the bonding region comprises a substrate, a first conductive pattern on a first surface of the substrate, and a first insulating layer; wherein the first conductive pattern comprises a first portion and a second portion; a distance between a top surface of the first portion and the first surface is larger than a distance between a top surface of the second portion and the first surface; the first insulating layer exposes the first portion and a boundary of the first insulating layer penetrates the second portion.
Optionally, in some embodiments, the first insulating layer at least partially exposes the second portion.
Optionally, in some embodiments, the second portion is located between the first portion and the functional circuit region.
Optionally, in some embodiments, the display panel further comprises: a second conductive pattern between the substrate and the first conductive pattern; an orthographic projection of the first portion on the substrate overlapping an orthographic projection of the second conductive pattern on the substrate.
Optionally, in some embodiments, a bottom portion of the first portion is electrically connected to a top portion of the second conductive pattern.
Optionally, in some embodiments, the second conductive pattern comprises a plurality of conductive layers stacked on each other.
Optionally, in some embodiments, the first conductive pattern is a pad.
Optionally, in some embodiments, the display panel further comprises: a wiring extending from the functional circuit region to the bonding region; one end of the wiring being electrically connected to the second portion.
Optionally, in some embodiments, the functional circuit region comprises a touch electrode pattern; the touch electrode pattern and the first conductive pattern are located in a same layer; the other end of the wiring is electrically connected to the touch electrode pattern.
Optionally, in some embodiments, the touch electrode pattern comprises a first electrode layer and a second electrode layer, the second electrode layer is located on a side of the first electrode layer away from the substrate, and the first conductive pattern is disposed in a same layer as at least one of the first electrode layer and the second electrode layer.
Optionally, in some embodiments, the first insulating layer is located on a side of the second electrode layer away from the substrate, and the first insulating layer overlaps the touch electrode pattern and the wiring.
Optionally, in some embodiments, the display panel further comprises a second insulating layer between the first conductive pattern and the second conductive pattern.
Optionally, in some embodiments, the second insulating layer comprises a through hole, and the first conductive pattern is electrically connected to the second conductive pattern via the through hole.
According to another aspect of the present disclosure, there is provided a display device. The display device comprises the display panel according to any one of the foregoing embodiments and a flexible circuit board; wherein the flexible circuit board comprises a pin, and the pin is electrically connected to the first conductive pattern.
In order to more clearly illustrate embodiments of the present disclosure or technical solutions in the prior art, the drawings to be used for description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. A person having an ordinary skill in the art may also obtain other drawings based on these drawings without spending inventive efforts.
The technical solutions in embodiments of the present disclosure will be described clearly and comprehensively below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of them. All other embodiments obtained by a person having an ordinary skill in the art based on the embodiments of the present disclosure without spending inventive efforts fall within the protection scope of the present disclosure.
The inventors noticed that the FMLOC technology fabricates metal mesh wirings between openings of the PDL (pixel defining layer) so as to form Tx and Rx channels of the FMLOC technology to realize the touch function. The same metal layer is used to form Tx and Rx signal channels, then another metal layer is used at an overlap of the Tx and Rx channels to form bridging so as to realize communication between the Tx and Rx signal channels, and finally an OC planarization layer (i.e., optically clear adhesive layer) is covered on the touch array unit. The top OC planarization layer of an FMLOC product is an organic material. The OC planarization layer needs to be removed from the position where the FMLOC product is bonded to an FPC (flexible printed circuit board), because the metal pad at that position needs to be exposed for bonding the FPC. In an actual process, if a large step difference occurs at the boundary of the OC planarization layer, it will cause peeling at the boundary of the OC planarization layer, resulting in disconnection of the touch panel and a touch failure.
According to an aspect of the present disclosure, there is provided a display panel.
In the context of the present disclosure, “a distance between a top surface of the first portion and the first surface” refers to the distance between the top surface of the first portion and the first surface in a direction perpendicular to the first surface (or in a direction parallel to the normal of the first surface). Similarly, “a distance between a top surface of the second portion and the first surface” refers to the distance between the top surface of the second portion and the first surface in a direction perpendicular to the first surface (or in a direction parallel to the normal to the first surface).
In the embodiments of the present disclosure, the first conductive pattern 203 in the bonding region 20 comprises a first portion 205 and a second portion 206; a distance a between a top surface 207 of the first portion 205 and the first surface 202 is greater than a distance b between a top surface 208 of the second portion 206 and the first surface 202; the first insulating layer 204 exposes the first portion 205 and a boundary 209 of the first insulating layer 204 penetrates the second portion 206. With the above arrangement, the step difference of the first insulating layer 204 within the bonding region 20 is decreased, thus reducing the risk of peeling of the first insulating layer 204. In addition, since the first insulating layer 204 covers a local region of the second portion 206, an end of the first conductive pattern 203 is also effectively protected (i.e., an end of the second portion 206 facing away from the first portion 205), reducing the risk of corrosion of the first conductive pattern 203.
The first insulating layer 204 may be an organic insulating layer, such as an optically clear adhesive layer.
Optionally, in some embodiments, as shown in
The first insulating layer 204 covers at least a part of the second portion 206 and can effectively protect an end of the first conductive pattern 203 (i.e., an end of the second portion 206 facing away from the first portion 205), reducing the risk of corrosion of the first conductive pattern 203.
Optionally, in some embodiments, as shown in
The second portion 206 may be arranged between the first portion 205 and the functional circuit region 10. Thus, the first portion 205 can be used as a pad of the display panel to connect the display panel to an external circuit.
Optionally, in some embodiments, as shown in
In some embodiments, the display panel 1 may further comprise a second conductive pattern 210 between the substrate 201 and the first conductive pattern 203. The second conductive pattern 210 may be a conductive film layer used to fabricate the functional circuit region 10 of the display panel. The functional circuit region 10 may, for example, include a circuit structure such as a touch circuit, a display circuit, and the like. The second conductive pattern 210 may be a metal pattern and/or a conductive metal oxide pattern. Therefore, the film layer of the second conductive pattern 210 can not only be used to fabricate the circuit structure of the functional circuit region 10, but also can form the second conductive pattern 210, thereby further reducing the impedance between the circuit structure of the functional circuit region 10 and the external circuit.
Optionally, in some embodiments, as shown in
The first portion 205 may cover the top surface of the second conductive pattern 210 and be in direct contact with the top surface of the second conductive pattern 210. Alternatively, the first portion 205 may also be electrically connected to the second conductive pattern 210 via a through hole (as shown in
Optionally, in some embodiments, as shown in
At the time of fabricating the functional circuit region 10 of the display panel, a plurality of conductive layers is generally used to form various structures of the circuit. Therefore, a portion of each conductive layer corresponding to the second conductive pattern 210 may be retained during the fabrication process, thereby achieving a good electrical contact of the bonding region.
Optionally, in some embodiments, the first conductive pattern 203 is a pad.
The first conductive pattern 203 may be used as a pad to connect the display panel 1 to an external circuit.
Optionally, in some embodiments, as shown in
Using the wiring 211, signals can be input to the display panel 1 via the first conductive pattern 203 and the wiring 211, and the display panel 1 can also output signals to an external circuit via the first conductive pattern 203 and the wiring 211. In addition, the wiring 211 may also be arranged in the same layer as the second conductive pattern 210, that is, the wiring 211 and the second conductive pattern 210 may be fabricated using the same material in the same patterning process (e.g., photolithography process). Alternatively, the wiring 211 and the first conductive pattern 203 may also be fabricated using the same material in the same patterning process (e.g., photolithography process), and the present disclosure is not limited thereto.
Optionally, in some embodiments, as shown in
With the above arrangement, a touch display panel with an FMLOC structure can be obtained.
Optionally, in some embodiments, as shown in
In some embodiments, as shown in
Optionally, in some embodiments, as shown in
In some embodiments, as shown in
Optionally, in some embodiments, as shown in
The second insulating layer 213 may be arranged between the first conductive pattern 203 and the second conductive pattern 210, so that the second conductive pattern 210 is covered with the second insulating layer 213 to prevent the sides of the second conductive pattern from being corroded.
Optionally, in some embodiments, as shown in
In the embodiments of the present disclosure, using the through hole 214, the first conductive pattern 203 may be electrically connected to the second conductive pattern 210 via the through hole 214. As a result, not only the sides of the second conductive pattern 210 can be prevented from being corroded, but also a good electrical contact of the bonding region can be ensured.
According to another aspect of the present disclosure, there is provided a display device. As shown in
In the embodiments of the present disclosure, the first conductive pattern 203 in the bonding region 20 comprises a first portion 205 and a second portion 206; the distance a between the top surface 207 of the first portion 205 and the first surface 202 is greater than the distance b between the top surface 208 of the second portion 206 and the first surface 202; the first insulating layer 204 exposes the first portion 205 and a boundary 209 of the first insulating layer 204 penetrates the second portion 206. With the above arrangement, the step difference of the first insulating layer 204 within the bonding region 20 is decreased, thus reducing the risk of peeling of the first insulating layer 204. In addition, since the first insulating layer 204 covers a local region of the second portion 206, an end of the first conductive pattern 203 is also effectively protected (i.e., an end of the second portion 206 facing away from the first portion 205), reducing the risk of corrosion of the first conductive pattern 203.
According to a further aspect of the present disclosure, there is provided a manufacturing method of a display panel.
In the embodiments of the present disclosure, the process for patterning the first insulating layer 204 may be a photolithography process. For example, after step S702 is completed, a layer of photoresist may be coated on the first insulating layer 204 shown in
According to the manufacturing method of a display panel provided by the embodiments of the present disclosure, the step difference of the first insulating layer 204 within the bonding region 20 is decreased, thus reducing the risk of peeling of the first insulating layer 204. In addition, since the first insulating layer 204 covers a local region of the second portion 206, an end of the first conductive pattern 203 is also effectively protected (i.e., an end of the second portion 206 facing away from the first portion 205), reducing the risk of corrosion of the first conductive pattern 203.
In the description of the present disclosure, the orientations or positional relationships indicated by the terms such as “upper” and “lower” are based on orientations or positional relationships shown in the drawings, which are only for facilitating description of the present disclosure, rather than requiring that the present disclosure must be constructed and operated in a particular orientation, thus they cannot be construed as limitations to the present disclosure.
In the description of this specification, the description with reference to the terms “an embodiment”, “another embodiment”, etc. means that a specific feature, structure, material or characteristic described in conjunction with said embodiment is included in at least one embodiment of the present disclosure. In this specification, the schematic representations of the above-mentioned terms do not necessarily refer to the same embodiment or example. Moreover, the described specific feature, structure, material or characteristic may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine different embodiments or examples and the features of the different embodiments or examples described in this specification in the case of causing no conflict. In addition, it is to be noted that in this specification, the terms “first” and “second” are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
What have been stated above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art familiar with this technical field within the technical scope revealed by the present disclosure should be encompassed within the protection scope of the present disclosure. Thus, the protection scope of the present disclosure should be based on the protection scope of the claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202110347557.2 | Mar 2021 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2021/125618 | 10/22/2021 | WO |
