Patent Grant
12205525
Embodiments of the present application relate to the field of display technologies and, in particular, to a display panel and a display device.
At present, the display panel is developed towards a full screen. In the full screen, a light-transmissive region with relatively higher transmittance needs to be disposed in a display region and is used for placing structures such as a camera. In this case, pixel circuits in the light-transmissive region may be disposed in the peripheral region of the light-transmissive region, thereby ensuring the transmittance of the light-transmissive region. When the pixel circuits are disposed in the peripheral region of the light-transmissive region, the pixels per inch (PPI) in the light-transmissive region may be reduced so that the number of pixel circuits disposed in the peripheral region is reduced, thereby reducing the area occupied by the peripheral region. In this way, the PPI in the light-transmissive region is different from the PPI in the display region, which adversely affect the display effect of the display panel.
The present application provides a display panel and a display device to improve the display effect of the display panel.
In a first aspect, embodiments of the present application provide a display panel including a first display region, a second display region, and a non-display region, where transmittance of the first display region is higher than transmittance of the second display region.
The display panel also includes at least one first display unit disposed in the first display region, at least one first gate drive circuit disposed in the non-display region and at least one first pixel circuit disposed in the non-display region, where the at least one first pixel circuit is connected to the at least one first display unit and configured to provide a drive current for the at least one first display unit, and the at least one first gate drive circuit is connected to the at least one first pixel circuit and configured to provide a drive signal for the at least one first pixel circuit.
In a second aspect, embodiments of the present application further provide a display device including the display panel provided in any embodiment of the present application.
According to technical solutions in the embodiments of the present disclosure, the first pixel circuit and the first gate drive circuit are disposed in the non-display region, the first pixel circuit is connected to the first display unit in the first display region, and the first gate drive circuit is connected to the first pixel circuit. Since the first pixel circuit is disposed in the non-display region, the case can be avoided where the first pixel circuit is placed in a transition region additionally disposed between the first display region and the second display region. In addition, the number of first display units in the first display region can be set according to requirements so that the first display region and the second display region can have the display effect as same as possible, improving the overall display effect of the display panel. Moreover, the first pixel circuit may be disposed in a blank region of the non-display region so that the first pixel circuit can be prevented from being disposed in the same region as other circuit structures, reducing the complexity of a circuit structure on the display panel. In addition, the first gate drive circuit can independently control the first pixel circuit to drive the first display unit to emit light, reducing the requirement of the display panel for a drive capability and reducing the cost of the display panel.
The present application is further described in detail below in conjunction with the drawings and the embodiments. It is to be understood that the embodiments described herein are only intended to illustrate and not to limit the present application. Additionally, it is to be noted that for ease of description, only part, not all, of structures related to the present application are illustrated in the drawings.
The embodiments of the present application provide a display panel.
In some embodiments, the first display region 110 has relatively higher transmittance and may be used as a photosensitive region of the display panel, for example, a region where a camera is disposed. The shape of the first display region 110 is not limited, and it is exemplarily shown in
It is to be noted that it is exemplarily shown in
In some embodiments, the first display units 111 may be light-emitting elements, the first pixel circuits 132 may be connected to the anodes of the light-emitting elements via the transparent conductive lines 121 to provide the drive current for the light-emitting elements. The transparent conductive lines 121 are disposed in the second display region 120 so that when the first pixel circuits 132 are connected to the first display units 111, wound wires can be prevented. The transparent conductive lines 121 has relatively higher transmittance, and when the transparent conductive lines 121 are connected to the anodes of the light-emitting elements, part of the transparent conductive lines 121 in the first display region 110 can be prevented from lowering the transmittance of the first display region 110, ensuring the transmittance of the first display region 110.
It is to be noted that when the transparent conductive lines 121 are disposed in the second display region 120, the transparent conductive lines 121 are insulated from other conductive structures in the second display region 120 so that signal crosstalk can be avoided. For example, a transparent conductive line layer may be disposed separately and the transparent conductive lines 121 are formed in the transparent conductive line layer, and an insulating layer may be disposed for insulating a film where the transparent conductive lines 121 are disposed from a film where the other conductive structures are disposed.
Based on the preceding embodiments, first pixel circuits are arranged in n rows and each first gate drive circuit includes n first gate driving units which are cascaded. A first scan signal output terminal of each first gate driving unit is connected to first scan signal input terminals of first pixel circuits in a same row via a first scan signal line to provide a first scan signal for the first pixel circuits in the same row. A first light emission control signal output terminal of each first gate driving unit is connected to first light emission control signal input terminals of first pixel circuits in at least one row via a first light emission control signal line to provide a first light emission control signal for the first pixel circuits in the at least one row. Herein, n is an integer greater than or equal to 1.
In some embodiments, the first pixel circuits may be arranged in one row or in multiple rows, which may be adaptively adjusted according to the dimension of the space of the non-display region 130. When the first pixel circuits are disposed in one row, each first gate drive circuit may include one first gate driving unit, where each first gate driving unit includes a first scan signal output terminal SCAN1 and a first light emission control signal output terminal EM1. The first scan signal output terminal SCAN1 is connected to first scan signal input terminals of the first pixel circuits in the one row via a first scan signal line 51 to provide a scan signal for the first pixel circuits in the one row. In addition, the first light emission control signal output terminal EM1 is connected to the first light emission control signal input terminals of the first pixel circuits in the one row via a first light emission control signal line E1 to provide a light emission control signal for the first pixel circuits in the one row so that the at least one first pixel circuit can normally drive the at least one first display units 111 to emit light. When the first pixel circuits are arranged in n rows, each first gate drive circuit may include n first gate driving units, and each first gate driving unit further includes a start signal input terminal (not shown in
For example, with continued reference to
In addition, it is exemplarily shown in
In some embodiments, each first pixel circuit 132 includes a first data signal input terminal, when the first scan signal provided by the first scan signal input terminal of the first pixel circuit 132 is an effective level, a data signal provided by the first data signal line 122 is written into the first pixel circuit 132 via the first data signal input terminal, and in a light emission stage, the first pixel circuit 132 drives, according to the data signal, the first display unit 111 to emit light. In addition, when each first pixel circuit 132 includes the multiple sub-pixel-circuits, each column of sub-pixel-circuits separately correspond to one first data signal line 122 so that different data signals can be written into different sub-pixel-circuits. Thus, the light-emitting elements corresponding to the different sub-pixel-circuits emit light of different grayscales according to the data signals. For example, referring to
In some embodiments, the second display region 120 may be a normal display region of the display panel, that is, the second display region 120 includes pixel units in multiple rows and multiple columns, and each pixel unit includes at least one second display unit 123 and at least one second pixel circuit 124. A pixel circuit layer is disposed in the second display region 120 and used for forming the at least one second pixel circuit 124, and at least one light-emitting element is disposed on the pixel circuit layer as the at least one second display unit 123. When the second display unit 123 is a light-emitting element, each second display unit 123 may include a first electrode, a light-emitting layer, and a second electrode which are laminated. The second display unit 123 may include one light-emitting element or multiple light-emitting elements, and correspondingly, the second pixel circuit 124 may include one sub-pixel-circuit or multiple sub-pixel-circuits, where each sub-pixel-circuit is connected to a respective light-emitting element. The second gate drive circuit 133 is disposed in the non-display region 130 and connected to the second pixel circuit 124 via a second scan signal line S2 and a second light emission control signal line E2 to provide a scan signal and a light emission control signal for the second pixel circuit 124 such that the second pixel circuit 124 is controlled to generate a drive current according to a data signal to drive the second display unit 123 to emit light. In this case, the first gate drive circuit 131 independently controls the first pixel circuit 132 to drive the first display unit 111 to emit light, and the second gate drive circuit 133 independently controls the second pixel circuit 124 to drive the second display unit 123 to emit light, which can reduce the requirement of the display panel for the drive capability and is conducive to reducing the cost of the display panel.
It is to be noted that the first pixel circuit 132 and the second pixel circuit 124 may have the same specific pixel circuit structure or different specific pixel circuit structures. In this embodiment, the first pixel circuit 132 and the second pixel circuit 124 may be provided with the same pixel circuit structure. For example, the first pixel circuit 132 and the second pixel circuit 124 may be each a 7T1C pixel circuit so that the formation of the first pixel circuit 132 and the second pixel circuit 124 via the same technique in the manufacturing process of the display panel is facilitated, thereby simplifying a manufacturing technique of the display panel. In addition, it is exemplarily shown in
With continued reference to
When m rows of second pixel circuits are disposed, each second gate drive circuit may include m second gate driving units, and each second gate driving unit further includes a start signal input terminal to provide a start signal for the second gate driving unit. In this case, a second scan signal output terminal SCAN2 of an i-th second gate driving unit is connected to a start signal input terminal of an (i+1)-th second gate driving unit, and the (i+1)-th second gate driving unit is started by a second scan signal output by the i-th second gate driving unit such that the second gate driving units are cascaded and the m second gate driving units output second scan signals one by one, where i is an integer greater than or equal to 1 and less than or equal to m−1. In some embodiments, each second gate driving unit 1331 is connected to respective second pixel circuits 124, that is, a second scan signal output terminal SCAN2 of a p-th second gate driving unit 1331 is connected to second scan signal input terminals of second pixel circuits 124 in a p-th row to provide the scan signal for the second pixel circuits 124 in the p-th row such that data signals are written into the second pixel circuits 124 in the p-th row. A second light emission control signal output terminal EM2 of the p-th second gate driving unit 1331 may be connected to second light emission control signal input terminals of the second pixel circuits 124 in the p-th row to provide the light emission control signal for the second pixel circuits 124 in the p-th row such that the second pixel circuits 124 in the p-th row may drive, according to the data signals, second display units 123 connected thereto to emit light. Here, p is an integer greater than or equal to 1 and less than or equal to m. When the cascaded second gate driving units 1331 sequentially output scan signals and light emission control signals, the second display units 123 in the second display region 120 emit light row by row for displaying. In addition, the timing of the effective level of the first scan signal is ahead of the timing of the effective level of the second scan signal so that the first display units 111 in the first display region 110 and the second display units 123 in the second display region 120 can be driven to emit light at different times.
For example, when transistors in the first pixel circuit 132 and the second pixel circuit 124 are P-type transistors, the effective level of the first scan signal and the effective level of the second scan signal are low levels.
In a first stage t1, s11 is a low level, the first one of the first gate driving units provides an effective scan signal for the first row of first pixel circuits, the data signals are written into the first row of first pixel circuits, and when the first light emission control signal is the effective level, the first row of first pixel circuits drive, according to the data signals, the first display units connected thereto to emit light.
In a second stage t2, s12 is the low level, the second one of the first gate driving units provides the effective scan signal for the second row of first pixel circuits, the data signals are written into the second row of first pixel circuits, and when the first light emission control signal is the effective level, the second row of first pixel circuits drive, according to the data signals, the first display units connected thereto to emit light.
In a third stage t3, s21 is the low level, the first one of the second gate driving units provides the effective scan signal for a first row of second pixel circuits, the data signals are written into the first row of second pixel circuits, and when the second light emission control signal is the effective level, the first row of second pixel circuits drive, according to the data signals, second display units connected thereto to emit light, where the data signals for the first pixel circuits are different from the data signals for the second pixel circuits.
In a fourth stage t4, s22 is the low level, the second one of the second gate driving units provides the effective scan signal for a second row of second pixel circuits, the data signals are written into the second row of second pixel circuits, and when the second light emission control signal is the effective level, the second row of second pixel circuits drive, according to the data signals, second display units connected thereto to emit light.
In a subsequent stage of a frame, the cascaded second gate driving units sequentially provide effective scan signals for the second pixel circuits correspondingly connected to the cascaded second gate driving units such that the data signals are written into the second pixel circuits row by row and then the second display units are controlled by second light emission control signals to emit light.
It is to be noted that first light emission control signal for each row of first pixel circuits may be effective level row by row and all the rows of the first display units do not emit light simultaneously, or the first light emission control signals for each row of first pixel circuits may be effective level simultaneously, and all the rows of first display units emit light simultaneously. Similarly, the second light emission control signal for each row of second pixel circuits may be effective level row by row and all the rows of the second display units emit light row by row, or the second light emission control signal for each of multiple rows of second pixel circuits may be effective level simultaneously, and the second display units in all the multiple rows emit light simultaneously.
In some embodiments, each second pixel circuit 124 includes a second data signal input terminal. When the second scan signal provided by the second scan signal input terminal of the second pixel circuit 124 is the effective level, the data signal provided by the second data signal line 125 is written into the second pixel circuit 124 via the second data signal input terminal. In the light emission stage, the second pixel circuit 124 drives, according to the data signal, the second display unit 111 to emit light. When the second pixel circuit 124 includes multiple sub-pixel-circuits, each column of sub-pixel-circuits correspond to one second data signal line 125 separately so that different data signals can be written into different sub-pixel-circuits.
With continued reference to
In some embodiments, when the display panel includes multiple columns of first pixel circuits 132, the first pixel circuit 132 may be disposed in the same column as the second pixel circuit 124. For example, when the first pixel circuits 132 are disposed in 16 columns and each first pixel circuit 132 includes three sub-pixel-circuits, 48 first data signal lines 122 are required. In this case, 48 second data signal lines 125 may also serve as the first data signal lines 122, where the 48 second data signal lines 125 are connected to each column of sub-pixel-circuits separately to provide the data signals for each column of sub-pixel-circuits. For example, when a first column of sub-pixel-circuits are connected to a q-th second data signal line 125, the q-th second data signal line 125 to a (q+47)-th second data signal line 125 may be sequentially connected to 48 columns of sub-pixel-circuits separately. In a driving process of the display panel, the effective level of the first scan signal is ahead of the effective level of the second scan signal. When the first scan signal provided from the first scan signal input terminal of the first pixel circuit 132 is the effective level, the second data signal lines 125 also serving as the first data signal lines provide the data signals corresponding to the first display units 111; and in the light emission stage, the first pixel circuit 132 drives, according to the data signal corresponding to the first display unit 111, the first display unit 111 to emit light. When the second scan signal provided by the second scan signal input terminal of the second pixel circuit 124 is effective level, the second data signal line 125 also serving as the first data signal line provides the data signal corresponding to the second display unit 123, and in the light emission stage, the second pixel circuit 124 drives, according to the data signal corresponding to the second display unit 123, the second display unit 123 to emit light. Thus, it may be implemented that when the second data signal line 125 also serves as the first data signal line, the first display unit 111 and the second display unit 123 emit light normally. In the preceding process, the data signals on the second data signal line 125 also serving as the first data signal line in different stages may be converted by a driver chip in the display panel, and the data signals can be transmitted by the driver chip to the second data signal line 125 also serving as the first data signal line.
In some embodiments, the first clock signal provided by the first clock signal line CLK1 and the second clock signal provided by the second clock signal line CLK2 are signals of opposite levels, that is, a phase of the first clock signal and a phase of the second clock signal are opposite to each other. When the first gate drive circuit 131 includes the cascaded first gate driving units, a first signal input terminal of an odd-th first gate driving unit and a second signal input terminal of an even-th first gate driving unit as first clock signal input terminals of the first gate drive circuit 131 are connected to the first clock signal line CLK1, and a second signal input terminal of the odd-th first gate driving unit and a first signal input terminal of the even-th first gate driving unit as second clock signal input terminals of the first gate drive circuit 131 are connected to the second clock signal line CLK2. Similarly, when the second gate drive circuit 133 includes the cascaded second gate driving units, a first signal input terminal of an odd-th second gate driving unit and a second signal input terminal of an even-th second gate driving unit as third clock signal input terminals of the second gate drive circuit 133 are connected to the first clock signal line CLK1, and a second signal input terminal of the odd-th second gate driving unit and a first signal input terminal of the even-th second gate driving unit as fourth clock signal input terminals of the second gate drive circuit 133 are connected to the second clock signal line CLK2. The first gate drive circuit 131 and the second gate drive circuit 133 share the first clock signal line CLK1 and the second clock signal line CLK2 so that signal lines on the display panel can be reduced, which is conducive to arranging the signal lines on the display panel and reducing the manufacturing difficulty of the display panel.
Embodiments of the present application further provide a display device.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202011504869.1 | Dec 2020 | CN | national |
This application is a continuation of the international patent application No. PCT/CN2021/120985 filed on Sep. 27, 2021, which claims priority to Chinese Patent Application No. 202011504869.1 filed with the China National Intellectual Property Administration (CNIPA) on Dec. 18, 2020, the disclosures of which are incorporated herein by reference in their entireties.
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| Number | Date | Country | |
|---|---|---|---|
| 20230401992 A1 | Dec 2023 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/CN2021/120985 | Sep 2021 | WO |
| Child | 17990067 | US |
