This application is based on and claims priority under 35 U.S.C. §119 with respect to Japanese Patent Application No. 2002-188940 filed on Jun. 28, 2002, the entire content of which is incorporated herein by reference.
The present invention relates to a display panel such as a plasma display panel and a method of producing the display panel.
A display such as a plasma display panel (hereinafter called the PDP) using glass substrates is formed by putting two sheets of glass substrates on top of each other with a predetermined space formed therebetween in order to seal predetermined structural components inside. The structure of a display area (display cell structure) where an image is displayed will be described hereunder by reference to one example already proposed by the present applicant.
As shown in
Like the line electrode Y, each line electrode Y is formed with a transparent electrode Ya such as a T-shaped transparent conductive film of ITO (Indium Tin Oxide) and a bus electrode Yb of a metal film extended in the line direction of the front substrate 10 and connected to the narrow base end portion of the transparent electrode Ya.
The line electrodes X and Y are arranged alternately in the column direction (vertical direction of
The bus electrodes Xb and Yb are formed into a two-layer structure having black conductive layers Xb1 and Yb1 on the display surface side and main conductive layers Xb2 and Yb2 on the back side. On the back of the front substrate 10, a black light-absorption layer (shield layer) 30 extending in the line direction along the bus electrodes Xb and Yb is formed between the bus electrodes Xb and Yb sitting back to back with respect to the adjoining line electrode pair (X and Y) arranged in a row direction. Further, a light absorption layer (shield layer) 31 is formed in a portion opposite to the vertical wall 35a of each partition wall 35.
On the back of the front substrate 10, a dielectric layer 11 is formed so as to cover the line electrode pairs (X and Y) and on the back of the dielectric layer 11, a bulked dielectric layer 11A protruding from the back of the dielectric layer 11 is formed so as to extend in parallel to the bus electrodes Xb and Yb in a position opposite to the bus electrodes Xb and Yb adjacent to the adjoining line electrode pair (X and Y) and in a position opposite to the area between the bus electrode Xb and the bus electrode Yb adjacent to each other.
A protective layer 12 of MgO is formed on the back side of the dielectric layer 11 and the bulked dielectric layers 11A. On the other hand, column electrodes D are arranged in parallel at predetermined intervals on the display-side surface of a back substrate 13 arranged in parallel to the front substrate 10 so that each column electrode D is extended in a direction perpendicularly crossing the line electrode pair (X and Y) (in the column direction) in a position opposite to the pair of transparent electrodes Xa and Ya of the line electrode pair (X and Y). On the display-side surface of the back substrate 13, further, a white dielectric layer 14 for covering the column electrodes D is formed and the partition walls 35 are formed on the dielectric layers 14.
The partition walls 35 are formed into the shape of a lattice by the vertical wall 35a extending in the column direction in a position between the column electrodes D arranged in parallel to each other and the horizontal wall 35b extending in the line direction in a position opposite to the bulked dielectric layer 11A. With the lattice like partition walls 35, the space between the front substrate 10 and the back substrate 13 is formed into sections, in each of which the transparent electrodes Xa and Ya are placed opposite to each other in the line electrode pair (X and Y) to form a discharge space S.
The display-side face of the vertical wall 35a of each partition wall 35 is not in contact with the protective layer 12 (see
A phosphor layer 16 is formed on the vertical walls 35a and the sides of the horizontal walls 35b of the partition walls 35 facing each discharge space S and the surface of the dielectric layer 14 in such a manner as to cover all of these five sides in due order.
The color of the dielectric layers 16 is set R, G and B in the line direction successively in the respective discharge spaces S (see
More specifically, the partition walls 35 are formed into the shape of a lattice along the display lines L and arranged in parallel to each other via the space SL extending along the display lines L in the column direction. The width of the space SL is set so that the width of the portions 35b1 and 35b2 of the horizontal wall 35b separated from each other by the space SL provided between the display lines L becomes substantially equal to the width of the vertical wall 35a.
In the PDP above, the line electrode pair (X and Y) forms one display line (line) L of a matrix display screen and each of the discharge spaces S separated from each other by the latticelike partition wall 35 is used to determine one subdivided discharge cell C.
The PDP above is produced by laying the front substrate formed with the line electrode pairs, the dielectric layer, the bulked dielectric layers and the protective layer upon the back substrate formed with the column electrodes, the protective layer of the column electrodes, the partition walls and the phosphor layers; by sealing the surrounding of the combination of the substrates; forming a vacuum in the interior space therebetween; and enclosing a discharge gas therein.
However, in case where the structural components formed on both the front and back substrates cause a relative deviation in position when the substrates are stuck together, a normal electric discharge is impeded and good display quality is unavailable. Consequently, positioning marks have been formed outside the display area of the PDP on the substrates whereby to carry out the positioning of both the substrates relatively.
As shown in
Heretofore, the bus marks Mb and the address marks Ma have been used as positioning marks. As the bus marks Mb and the address marks Ma are formed of metal films, the relative positions of the marks are made detectable by the use of transmissive illumination, so that it is possible to carry out the positioning of the bus electrodes Xb and Yb and the column electrodes D that are formed in the respective mark-positioning layers.
With respect to influence over the performance of the PDP affected by relative deviation in position as mentioned above, importance is directed to the positional accuracy of the transparent electrodes Xa and Ya projected opposite to each other via the discharge gap on a cell basis against the partition wall (especially the vertical wall 35a) or the positional accuracy of the bulked dielectric layer 11A against the partition wall (especially the horizontal wall 35b).
The transparent electrodes Xa and Ya and the bulked dielectric layers 11A are formed on the front substrate 10 with the bus marks Mb as a reference, whereas the partition walls 35 are formed on the back substrate 13 with the address marks Ma as a reference. Therefore, deviation in position caused at the step of formation or deviation in position caused at the step of calcination under the influence of reduction in the size of the substrate tends to occur against each of the marks.
In the PDP formed by carrying out the positioning of both the substrates relatively based on the bus marks Mb and the address marks Ma and sticking the front substrate 10 and the back substrate 13 together, such deviation in position is liable to occur between the transparent electrodes Xa and Ya and the partition wall (vertical wall 35a) or the bulked dielectric layer 11A and the partition wall (horizontal wall 35b).
Further, the influence of deviation in position increases when the display cells are reduced in size so as to cope with sophistication of the PDP, the problem is that the performance of the PDP lowers.
An object of the invention made to solve the foregoing problems is to provide a display panel designed to improve accuracy in putting substrates on top of each other and to prevent performance from lowering because of deviation in position.
In order to accomplish the object, according to one aspect of the invention, there is provided a display panel including a first substrate with transparent display electrodes disposed for forming display cells within a display area, a second substrate disposed separately from and opposite to the first substrate and formed with partition walls for forming sections of the display cells within the display area, a first positioning mark disposed in at least two or more positions outside the display area of the first substrate, and a second positioning mark disposed in at least two or more positions outside the display area of the second substrate, wherein the first positioning marks and the second positioning marks are disposed so that the positional relation between the transparent electrodes and the partition walls can directly be recognized.
In addition, according to a second aspect of the invention, there is provided a display panel including a first substrate with first partition walls disposed for forming sections of transparent display electrodes for forming display cells and the display cells in an at least first direction, a second substrate disposed separately from and opposite to the first substrate with second partition walls disposed for forming sections of the display cells in the at least first direction within a display area, a first positioning mark disposed in at least two or more positions outside the display area of the first substrate, and a second positioning mark disposed in at least two or more positions outside the display area of the second substrate, wherein the first positioning marks and the second positioning marks are disposed so that the positional relation between the first partition walls and the second partition walls can directly be recognized.
In addition, according to a third aspect of the invention, there is provided a method of producing a display panel comprising the steps of putting a first substrate and a second substrate on top of each other, the first substrate being formed with transparent display electrodes disposed for forming display cells within a display area, the second substrate being formed with partition walls for forming sections of the display cells within the display area, and forming pairs of first positioning marks and second positioning marks for use in verifying the positioning of the transparent electrodes and the partition walls in at least two or more positions outside the display areas of the first substrate and the second substrate before the step of putting the substrates on top of each other.
In addition, according to a fourth aspect of the invention, there is provided a method of producing a display panel comprising the step of putting a first substrate and a second substrate on top of each other, the first substrate being formed with first partition walls disposed for forming sections of transparent display electrodes for forming display cells within the display area and the display cells in an at least first direction, the second substrate being formed with second partition walls disposed for forming sections of the display cells within the display area, and forming pairs of first positioning marks and second positioning marks for use in verifying the positioning of the first partition walls and the second partition walls in at least two positions outside the display areas of the first substrate and the second substrate before the step of putting the substrates on top of each other.
These and other objects and advantages of this invention will become more fully apparent from the following detailed description taken with the accompanying drawings in which:
A description will now be given of embodiments of the invention with reference to the drawings.
A display panel according to a first embodiment of the invention is similar in structure to the PDP shown in
The structure of the positioning marks for use at the step of putting the substrates on top of each other concerning the display panel according to the first embodiment of the invention will be described hereunder by reference to
In the display panel according to the first embodiment of the invention, the first positioning marks Ml are formed on the outer side 10b of the display area of the front substrate and in the same layer as a layer in which the transparent display electrodes Xa and Ya are formed within the display area 10a as shown in
Positions where the first positioning marks and the second positioning marks are formed will now be described.
As shown in
As shown in
As described above, the combination of the ITO mark M1 and the rib mark M2 placed opposite to each other has a common center of gravity or a common center as shown in
As shown in
As described above, the display panel according to the first embodiment of the invention has the ITO mark M1 (first positioning mark) disposed in at least two or more positions on the outer side 10b of the display area of the front substrate and the rib mark M2 (second positioning mark) disposed in at least two or more positions on the outer side 13b of the display area of the back substrate.
With the ITO marks M1 (first positioning marks) and the rib marks M2 (second positioning marks) thus structured and disposed as shown in
Steps of putting the substrates on top of each other in a method of producing the display panel according to the first embodiment of the invention will now be described by reference to
As shown in
As the ITO marks M1 are transparent marks, the ITO marks are then irradiated with falling illumination, that is, monochromatic rays of light and as shown in
When an ITO mark M1 having a film thickness of t and a refractive index of n is irradiated with monochromatic rays of light having a wavelength of λ as falling illumination 37, for example, there exits reflected light including reflected light 37A and reflected light 37B. When the falling illumination 37 is given to the front substrate 10, the reflected light 37A and the reflected light 37B intensify the strength of each other when the film thickness t of the ITO mark M1 is λ/2n and the ITO mark M1 looks bright but weaken the strength of each other when the film thickness t of the ITO mark M1 is λ/4n and the ITO mark M1 looks dim. Thus, the position of the ITO mark is recognizable, whereby its coordinates can be measured.
On the other hand, as the rib mark M2 is a mark low in transmittance, it is recognized by transmissive illumination in order to measure its coordinates (Step S3). When the rib mark M2 is irradiated with transmissible rays of light 38 from below the back substrate 13 as shown in
The positions of the ITO marks M1 can be recognized by the falling illumination 37 and their coordinates can also be measured. On the other hand, the positions of the rib marks M2 can be recognized by the transmissive illumination 38 and their coordinates can also be measured. Therefore, as shown in
With the failing illumination 37 and the transmissive illumination 38 given simultaneously or alternately, a monitor camera 36 is employed, for example, for detecting a contrast between light and shade regarding the transmitted light and the reflected light so as to make the mark recognition and measure the coordinates of the marks.
More specifically, the monitor camera 36 is installed on the side of the front substrate 10 and the ITO marks M1 are recognized by coaxial falling rays of light 37 from the monitor camera 36. The rib marks M2 are recognized by the transmissive illumination 38 from the side of the back substrate 13. The mark recognition is conducted by switching these different types of illumination. For example, the mode of measuring the coordinates of the positions of the marks is controlled by using the coordinates within the viewing field of the monitor camera 36. At this time, it is needed to predetermine the position of the monitor camera 36 and the positions of the substrates (the front substrate 10 and the back substrate 13) through robot teaching so that the presence of a mark within the viewing field of the monitor camera 36 is ensured. Or absolute coordinates of the position of the monitor camera 36 are determined by reducing the position of the mark within the viewing field of the monitor camera 36 to such absolute coordinates.
Incidentally, since the mark recognition is achieved by utilizing the interference of light, the use of monochromatic light is desirable for the falling illumination 37 and the transmissive illumination 38. Further, the optimum wavelength of the monochromatic light depends on the film thickness t of the ITO mark M1.
In case that the distance between the ITO mark M1 of the front substrate 10 and the rib mark M2 of the back substrate 13 exceeds the depth of focus of the monitor camera 36 (see
The positional deviation of the coordinates of the ITO marks M1 at four corners at Step S2 from the coordinates of the rib marks M2 at four corners at Step S3 is obtained by relatively moving the front substrate 10 and the back substrate 13 whereby to optimize the positioning of the ITO marks M1 and the rib marks M2 so that the positional deviation is minimized and uniformized (Step S4).
As shown in
In case where one or two of the ITO marks M1 and the rib marks M2 at the four corners remain unrecognizable, the rest of two or three recognizable marks may be used to place the substrates on top of each other.
As described above in detail, according to the first embodiment of the invention, the transparent electrodes Xa and Ya projecting opposite to each other via the discharge gap in each cell for use in forming the display electrodes can be put upon the partition wall (vertical wall 35a in particular) with excellent positional accuracy when the front substrate and the back substrate are stuck together. Thus, the performance of the PDP is prevented from being affected by the positional deviations and good display quality becomes obtainable.
A display panel according to a second embodiment of the invention is similar in structure to the PDP shown in
The structure of the positioning marks for use at the step of putting the substrates on top of each other concerning the display panel according to the second embodiment of the invention will be described hereunder by reference to
In the display panel according to the second embodiment of the invention, bulked marks M3 (first positioning marks) are formed on the outer side 10b of the display area of the front substrate and in the same layer as a layer (e.g., a glass layer) in which the bulked dielectric layers 11A are formed within the display area 10a as shown in
Positions where the bulked marks M3 and the rib marks M2 are formed will now be described. The positions where the bulked marks M3 are formed are similar to those described in the first embodiment of the invention and as shown in
Further, positions where the rib marks M2 are formed are similar to those described in the first embodiment of the invention and as shown in
A method of producing the display panel according to the second embodiment of the invention is similar to the method according to the first embodiment thereof and Steps S1–S4 of putting the substrates on top of each other as described above are followed with the bulked marks M3 as the first positioning marks. Then the rib marks M2 forming counterparts to the bulked marks M3 are formed on the side of the back substrate 13 and when both the substrates are put on top of each other, the bulked dielectric layers 11A (first partition walls) and the horizontal walls 35b (second partition walls) are properly positioned.
In this case, since the bulked marks M3 are transparent marks like the ITO marks M1, the bulked mark M3 are made recognizable by the falling illumination as in the case of the ITO marks M1.
Moreover, the ITO marks M1 and the rib marks M2 as the counterparts thereto according to the first embodiment of the invention may be formed separately when the positioning of the transparent display electrodes Xa and Ya and the partition walls 35 is carried out.
As set forth above in detail, according to the second embodiment of the invention, the bulked dielectric layers 11A (first partition walls) can be put upon the partition walls 35 (second partition walls) with excellent positional accuracy when the front substrate 10 and the back substrate 13 are stuck together. Thus, the performance of the PDP is prevented from being affected by the positional deviations and good display quality becomes obtainable.
Number | Date | Country | Kind |
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P2002-188940 | Jun 2002 | JP | national |
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4626741 | Morimoto et al. | Dec 1986 | A |
5209688 | Nishigaki et al. | May 1993 | A |
5777610 | Sugimoto et al. | Jul 1998 | A |
5876884 | Maeda et al. | Mar 1999 | A |
5897414 | Bergeron et al. | Apr 1999 | A |
Number | Date | Country | |
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20040000872 A1 | Jan 2004 | US |