Patent Application
20240420632
The present application related the field of display technology, and in particular to a display panel, a display device and a method for compensating signals.
Silicon-based organic light-emitting diode (OLED) micro display is a display product that integrates OLED with silicon-based circuitry, which is often applied in the fields of virtual reality (VR) and augmented reality (AR).
Embodiments of the present application provide a display panel, a display device and a method for compensating signals. The technical solutions are as follows.
According to some embodiments of the present disclosure, a display panel is provided. The display panel includes:
In some embodiments, the temperature sensing circuit includes: a plurality of temperature sensing sub-circuits;
In some embodiments, each of the temperature sensing sub-circuits includes: a first switch transistor and a second switch transistor;
In some embodiments, the display region is rectangular, the non-display region encloses at least a first side and a second side opposite to each other in the first direction of the display region; wherein
In some embodiments, a quantity of the one portion of the temperature sensing sub-circuits is equal to a quantity of the other portion of the temperature sensing sub-circuits; and
In some embodiments, the first direction is perpendicular to the second direction.
In some embodiments, the trim circuit includes: a plurality of trim sub-circuits;
In some embodiments, the display region is rectangular, the non-display region encloses at least a first side, a second side and a third side of the display region, and the trim circuit includes two trim sub-circuits;
In some embodiments, each of the trim sub-circuits includes: a plurality of trim units;
In some embodiments, each of the trim units includes: a third switch transistor and a fourth switch transistor;
In some embodiments, each of the trim sub-circuit includes: four trim units.
In some embodiments, the temperature sensing circuit and the trim circuit are coupled to a same output node, the output node being coupled to the drive circuit.
In some embodiments, the pixel includes: a pixel circuit disposed in the display region and the non-display region, and a light-emitting element disposed in the display region;
In some embodiments, the pixel circuit includes: a light-emitting control sub-circuit disposed in the non-display region, and a data write sub-circuit, a storage sub-circuit and a drive sub-circuit disposed in the display region;
In some embodiments, the light-emitting control sub-circuit includes a first light-emitting control transistor and a second light-emitting control transistor, the data write sub-circuit includes a data write transistor, the storage sub-circuit includes a storage capacitor, and the drive sub-circuit includes a drive transistor;
In some embodiments, the plurality of pixels are arranged in arrays, and the plurality of pixels disposed in one row share one light-emitting control sub-circuit.
In some embodiments, the display panel is silicon-based organic light-emitting diode micro display panel.
According to some embodiments of the present disclosure, a display device is provided. The display device includes: a drive circuit and the display panel as described in the above aspect; wherein
According to some embodiments of the present disclosure, a method for compensating signals is provided. The method is applicable to a drive circuit including the display device as described the above aspect, and the method including:
In some embodiments, compensating the common supply voltage based on the target temperature sensing current and the target trim current includes:
In order to describe the technical solutions in the embodiments of the present disclosure more clearly, the following briefly describes the accompanying drawings required for describing the embodiments. Apparently, the accompanying drawings in the following description show merely some embodiments of the present disclosure, and those of ordinary skill in the art can still derive other drawings from these accompanying drawings without creative efforts.
Currently, silicon-based OLED micro display generally includes: a silicon-based OLED micro display panel and a drive circuit. The silicon-based OLED micro display panel generally includes a silicon-based substrate, and a plurality of pixel circuits and a plurality of OLEDs disposed on the silicon-based substrate. The drive circuit is coupled to the pixel circuits and is configured to transmit drive signals to the pixel circuits. The pixel circuits are coupled to the OLEDs and are configured to control the OLEDs to emit light based on the drive signals.
Marks in the drawing are illustrated as:
By means of the accompanying drawings above, definite embodiments of the present application have been illustrated and will be described in detail later. These accompanying drawings and text description are not intended to limit the scope of the present application conception by any means, but rather to illustrate the concepts of the present application for those skilled in the art by reference to particular embodiments.
For clearer descriptions of the objectives, technical solutions, and advantages of the present disclosure, the following further describes implementations of the present disclosure in detail with reference to the accompanying drawings.
For example, referring to
It should be noted that the area of display region A1 is generally much larger than the area of non-display region B1, and the accompanying drawings are merely schematic and do not limit the area of display region A1 and non-display region B1.
As can be seen with reference to
The plurality of pixels 02 are coupled to a drive circuit (not shown in the figure) and are configured to emit light based on a common supply voltage transmitted by the drive circuit. The drive circuit is referred to as a driver integrated circuit (Driver IC). The drive circuit is generally disposed at the periphery of the display panel (i.e., not on substrate 01) and is tied to the structure coupled on the display panel. The drive circuit is considered to be disposed in the binding region. Alternatively, coupling in embodiments of the disclosure refers to “electrical connection”.
The temperature sensing circuit 03 is coupled to the first reference power supply terminal Vref1, the second reference power supply terminal Vref2, and the first power supply terminal Gnd, and is also coupled to the drive circuit (not shown in the figure). The temperature sensing circuit 03 is configured to transmit a target temperature sensing current to the drive circuit based on the temperature of the display region A1, under driving of the first reference power supply signal provided by the first reference power supply terminal Vref1, the second reference power supply signal provided by the second reference power supply terminal Vref2, and the first power supply signal provided by the first power supply terminal Gnd.
Optionally, in some embodiments of the present disclosure, the temperature sensing circuit 03 includes a switch transistor (which may also be referred to as a switching transistor). The output characteristics of the switch transistor varies with the temperature of the display region A1. The temperature sensing circuit 03 transmits a target temperature sensing current I1, which is positively correlated with the temperature, to the drive circuit based on the temperature of the display region A1, under driving of the first reference power supply signal, the second reference power supply signal, and the first power supply signal, thereby enabling sensing of the temperature of the display region A1. That is, the higher the temperature is, the larger the target temperature sensing current I1 is. Conversely, the lower the temperature is, the smaller the target temperature sensing current I1 is.
The temperature of the display region A1 includes: a temperature of the substrate 01 and a temperature of the plurality of pixels 02 disposed in the display region A1, and the temperature is influenced by the ambient temperature. In general, the higher the ambient temperature is, the higher the temperature of the substrate 01 is, the higher the temperature of the plurality of pixels 02 is, and the higher the luminance of the plurality of pixels 02 is. The higher luminance further leads to a higher temperature of the plurality of pixels 02.
Optionally, in embodiments of the present disclosure, the potential of the first reference power signal and the potential of the second reference power signal are a first potential, and the potential of the first reference power signal is less than the potential of the second reference power signal. For example, the potential of the first reference power signal is about 1.5 V, and the potential of the second reference power signal is about 2.5 V. The potential of the first power signal is a second potential, and the second potential is less than the first potential. For example, the potential of the first power supply signal is 0 in the case that the first power supply terminal is the ground terminal Gnd. In some other embodiments, the potential of the first power supply signal is less than 0, in the case that the first power supply terminal is the pull-down power supply terminal VSS.
The trim circuit 04 is coupled to the first reference power supply terminal Vref1, the plurality of trim control terminals Trim 1 . . . . Trim n, and the first power supply terminal Gnd, and is also coupled to the drive circuit. The trim circuit 04 is configured to transmit a target trim current to the drive circuit, under driving of the trim control signal, the first reference power supply signal and the first power supply signal provided by the at least one trim control terminal, and n is an integer greater than 1.
For example, the trim circuit 04 transmits a target trim current I2 to the drive circuit based on the at least one trim control signal, the first reference power supply signal, and the first power supply signal in the case that the potential of the at least one trim control signal provided by the at least one trim control terminal is a first potential. The target trim current I2 is configured to correct the target temperature sensing current I1, such that the current finally transmitted to the drive circuit can provide more accurate feedback of the temperature of the display region A1 in the display panel.
Optionally, in the plurality of trim control terminals Trim 1 . . . . Trim n in the embodiments of the present disclosure, the potential of the trim control signal provided by each trim control terminal is a first potential. Alternatively, the potential of the trim control signal provided by one portion of the trim control terminals is a first potential, and the potential of the trim control signal provided by the other portion of the trim control terminals is a second potential. The more the trim control signals of the first potential are, the larger the target trim current I2 transmitted by the trim circuit 04 is, and conversely, the less the trim control signals of the first potential are, the smaller the target trim current I2 transmitted by the trim circuit 04 is. Based on this, the correction accuracy of the target temperature sensing current I1 is improved by flexibly controlling the trim control signals provided by each trim control terminal.
Optionally, in the embodiment of the present disclosure, the first potential of the trim control signal is about 2.5V and the second potential of the trim control signal is 0. For the temperature sensing circuit 03 and the trim circuit 04, the first potential is an effective potential and the second potential is an ineffective potential.
The target temperature sensing current I1 and the target trim current I2 are supplied to the drive circuit to compensate the common supply voltage. For example, the drive circuit may accumulate the target temperature sensing current I1 and the target trim current I2 to acquire a compensation current IPTAT, convert the compensation current IPTAT to a compensation voltage ΔV, and compensate the to-be-compensated common supply voltage based on the compensation voltage ΔV (e.g., by accumulating both). Pixel 02 under driving of the compensated common supply voltage has better luminance and better luminance stability.
In some other embodiments, the compensation current IPTAT is converted to the compensation voltage ΔV by a voltage conversion circuit independent of the drive circuit and then transmitted to the drive circuit, and the drive circuit need not perform the current conversion voltage operation. In addition, the first reference power supply terminal Vref1, the second reference power supply terminal Vref2 and the trim control terminal in the above embodiment is also coupled to the drive circuit, that is, the drive circuit provides the required signal to each signal terminal. That is, in the embodiment of the present disclosure, a current or voltage proportional to the absolute temperature of the display region A1 is transmitted back to the drive circuit by the trim circuit 04 in conjunction with the temperature sensing circuit 03, under driving of the above signals provided by the drive circuit, and the common supply voltage can be compensated by the drive circuit using an algorithm related to compensation to ensure a better luminance stability of the pixel 02.
It is noted that a display panel is typically cut from a large substrate including a plurality of display panels, and the plurality of display panels is considered as a batch of display panels. Depending on the cutting process and the manufacturing process, the display panels finally acquired from cutting have differences, such as different aspect ratios of the transistors included in the temperature sensing circuit 03 or the transistors included in the pixel 02. The target temperature sensing currents I1 output by the temperature sensing circuit 03 based on the same temperature sensed are different in different display panels. Based on this, it is possible to set the trim control signals provided by a plurality of trim control terminals and store the trim control signals in the drive circuit during the testing stage before the display panel leaves factory, with reference to the target common supply voltage that can normally light up pixel 02 at different temperatures, such that the drive circuit can directly recall the stored trim control signals and provide corresponding trim control signals to each trim control terminal after the display panel leaves factory, the compensated common supply voltage is as close to (e.g., equal to) the target common supply voltage as possible, and the display panel of one batch has good uniformity of luminance under the same temperature, i.e., the display effect is approximate or consistent.
In summary, embodiments of the present disclosure provide a display panel including a substrate having a display region and a non-display region, pixels disposed in the display region, and a temperature sensing circuit and a trim circuit disposed in the non-display region. The temperature sensing circuit can transmit a target temperature sensing current to the drive circuit based on the temperature of the display region, and the trim circuit can transmit a target trim current to the drive circuit. The target temperature sensing current and the target trim current can be used by the drive circuit to compensate the common supply voltage and transmit the compensated common supply voltage to the pixel to drive the pixel to emit light, i.e., the drive circuit can flexibly adjust the common supply voltage transmitted to the pixel based on the temperature of the display region. In this way, the effect of temperature on the luminance of the pixel can be reduced, ensuring that the pixel can emit light normally even in the case that more heat is gathered in the display region. The display panel provided by the embodiments of present disclosure has a better display effect.
Optionally, the display panel documented in embodiments of the present disclosure is a silicon-based OLED micro display panel. That is, substrate 01 is a silicon-based substrate, and pixel 02 includes an OLED light-emitting device. For a silicon-based OLED micro display panel, a display panel is considered as a chip, and the trim circuit 04 is provided to reduce the difference between the chips (i.e., chip difference).
Optionally, the size of the silicon-based OLED micro display panel generally is about 1 inch. Because the silicon-based OLED micro display panels integrate the dual advantages of silicon-based materials and OLED light-emitting materials, ultra-high pixels per inch (PPI) can be achieved. OLED micro displays are widely applied in the field of VR and/or AR. For example, it can be applied in camera viewfinders or scopes in the field of VR.
Optionally,
As can be seen in conjunction with
In the embodiments of present disclosure, the target temperature sensing current I1 transmitted by the temperature sensing circuit 03 to the drive circuit is the sum of the temperature sensing currents I01 transmitted by the plurality of temperature sensing sub-circuits 031. That is, I1 equals to a quantity of temperature sensing sub-circuits 031 multiply I01. For example, assuming that the display panel includes 30 temperature sensing sub-circuits 031 as shown in
By setting a plurality of temperature sensing sub-circuits 031, the temperature at different locations of display region A1 can be reliably collected, and the target temperature sensing current I1 output to the drive circuit can more accurately reflect the temperature at various locations of display region A1.
Optionally, with continued reference to
The first direction X1 and the second direction X2 are intersected with each other, e.g., the first direction X1 and the second direction X2 illustrated in
As can be seen in conjunction with
On the basis that the quantity of the one portion of the temperature sensing sub-circuits 031 is the same as the quantity of the other portion of the temperature sensing sub-circuits 031, and that both the one portion of the temperature sensing sub-circuits 031 and the other portion of the temperature sensing sub-circuits 031 are equally spaced apart, it is considered that the plurality of temperature sensing sub-circuits 031 included in the display panel are uniformly arranged around the periphery of the display region A1. In this way, the temperature at each location of display region A1 can be sensed effectively and uniformly, such that the target temperature sensing current I1 output by temperature sensing circuit 03 to the drive circuit can more accurately characterize the temperature at each location of display region A1, and the temperature reflected by the target temperature sensing current I1 can be equal to the average temperature of display region A1. It is possible to ensure reliable compensation of the common supply voltage by the drive circuit, and make the display effect of the display panel better.
Exemplarily, the temperature sensing circuit 03 illustrated in
Optionally,
In conjunction with
Further, in some embodiments of the present disclosure, the target trim current I2 transmitted by the trim circuit 04 to the drive circuit is the sum of the trim currents I02 transmitted by the plurality of trim sub-circuits 041. That is, I2 equals to a quantity of trim sub-circuits 041 multiply I02. Assuming that the display panel includes 2 trim units 0411 as shown in
Optionally, as can be seen in conjunction with
In the two trim sub-circuits 041, one trim sub-circuit 041 is disposed at the intersection of the third side a13 and the first side a11 of the display region A1, and the other trim sub-circuit 041 is disposed at the intersection of the third side a13 and the second side a12 of the display region A1. In this way, not only correction of the temperature sensing current output by each temperature sensing sub-circuit 031 disposed at the first side a11 can be achieved, but also correction of the temperature sensing current output by each temperature sensing sub-circuit 031 disposed at the second side a12 can be achieved, thereby ensuring a better correction effect.
The plurality of trim units 0411 are coupled to the plurality of trim control terminals Trim 1 . . . . Trim n, and each trim unit 0411 is coupled to the first reference power supply terminal Vref1 and the first power supply terminal Gnd, and all of the trim units 0411 are be coupled to the drive circuit. Each of the trim units 0411 is configured to transmit a trim current to the drive circuit, under driving of the trim control signal, the first reference power supply signal, and the first power supply signal provided by one of the coupled trim control terminals.
Exemplarily, each of the trim sub-circuits 041 illustrated in
In some embodiments of the present disclosure, the trim current I02 transmitted by the trim sub-circuit 041 to the drive circuit is the sum of the trim sub-currents I03 transmitted by a plurality of trim units 0411. That is, I02 equals to a quantity of trim units 0411 multiply I03. Assuming that the display panel includes four trim units 0411 shown in
In combination with the above embodiments, it can be seen 15 trim manners based on including four trim units 0411, i.e., including four trim control terminals Trim 1, Trim2, Trim3, and Trim4. For example, in the case that the first potential of the trim control signal is 2.5V and the second potential is 0V, and the potential of the first reference power supply signal is 1.5V and the potential of the second reference power supply signal is 2.5V, Table 1 below shows the values of the compensation current IPTAT in microamps (μA) determined by the drive circuit during testing in the 15 trim manners.
As can be seen from Table 1 above, in the case that the potential of the trim control signal provided by the trim control terminal Trim 1, the potential of the trim control signal provided by the trim control terminal Trim2 and the potential of the trim control signal provided by the trim control terminal Trim3 are the second potentials, and the potential of the trim control signal provided by the trim control terminal Trim4 is the first potential, the compensation current IPTAT is 165.3242 μA. As can be further seen from Table 1 above, the greater the quantity of trim control signals with the first potential is, the greater the compensation current IPTAT is.
It should be noted that, as can be seen with reference to the above embodiments, the specific trim manner to be used, i.e., which mode in the above Table 1 the potentials of the trim control signals provided by each trim control terminal satisfy, can be determined and stored in the drive circuit at pre-test stage prior to leaving factory to reduce the chip difference.
In some other embodiments, the above Table 1 may also be stored in the drive circuit in the form of a table or curve, and the target common supply voltage for driving the pixel 02 to emit light properly may be stored in the drive circuit. Then, the required compensation current IPTAT is determined by the drive circuit based on the common supply voltage prior to compensation and the target common supply voltage, and the potential of the trim control signal provided by each trim control terminal is looked up from the above Table 1 based on the determined compensation current IPTAT to further transmit the looked-up trim control signal to the trim control terminal to realize control of the trim control terminal.
Taking the structure shown in any of
The gate electrode of the first switch transistor K1 is coupled to the first reference power supply terminal Vref1, the first electrode of the first switch transistor K1 is coupled to the first power supply terminal Gnd, and the second electrode of the first switch transistor K1 is coupled to the first electrode of the second switch transistor K2.
The gate electrode of the second switch transistor K2 is coupled to the second reference power supply terminal Vref2, and the second electrode of the second switch transistor K2 is configured to be coupled to the drive circuit.
Combined with the above embodiments, it can be seen that in the case that the temperature of display region A1 changes, the output performance of the first switch transistor K1 and the second switch transistor K2 changes, and the output temperature sensing current I01 changes, and generally the temperature sensing current I01 is absolutely positively correlated with the temperature. In this way, the purpose of reliably sensing the temperature of display region A1 can be achieved.
The gate electrode of the third switch transistor K3 is coupled to the first reference power supply terminal Vref1, the first electrode of the third switch transistor K3 is coupled to the first power supply terminal Gnd, and the second electrode of the third switch transistor K3 is coupled to the first electrode of the fourth switch transistor K4.
The gate electrode of the fourth switch transistor K4 is coupled to the trim control terminal, and the second electrode of the fourth switch transistor K4 is configured to be coupled to the drive circuit. For example, in
Optionally, as can be seen in conjunction with
Of course, in some other embodiments, the temperature sensing circuit 03 and the trim circuit 04 are separately coupled to the drive circuit, and accordingly, the operation of accumulating the target temperature sensing current I1 and the target trim current I2 is performed by the drive circuit to acquire the desired compensation current IPTAT.
Further, as can be seen in conjunction with the above embodiments and
Optionally, in some embodiments of the present disclosure, the switch transistors included in the temperature sensing sub-circuit 031 and the switch transistors included in the trim unit 0411, i.e., the first switch transistor K1, the second switch transistor K2, the third switch transistor K3, and the fourth switch transistor K4 illustrated in
By setting the switch transistor included in the temperature sensing sub-circuit 031 and the switch transistor included in the trim unit 0411 to be NMOS transistors, the gate electrodes is driven biased with the constant voltage in the above embodiments, and using its operating saturation region, a compensation current IPTAT proportional to the absolute temperature is output. The compensation current IPTAT is transmitted back (i.e., feedback) to the drive circuit, which can achieve the purpose of real-time monitoring of the temperature of display region A1 by the drive circuit, thus realizing the function related to the temperature compensation of the common supply voltage based on display region A1. Moreover, only NMOS transistors are arranged in the non-display region B1, which can facilitate circuit distribution and better detection of the temperature of the display region A1.
In some other embodiments, the switch transistors included in the temperature sensing sub-circuit 031. and/or, the individual switch transistors included in the trim unit 0411 are PMOS transistors, or a combination of PMOS transistors and NMOS transistors.
The pixel circuit P1 is coupled to the scan control terminal Scan, the data signal terminal Data, the first light-emitting control terminal EM1, the second light-emitting control terminal EM2, the second power supply terminal Elvdd, the first power supply terminal Gnd, and the first electrode of the light-emitting element L1. The pixel circuit P1 is configured to transmit a light-emitting drive signal (e.g., a drive current) to the first electrode of the light-emitting element L1 based on the scan signal provided by the scan control terminal Scan, the first light-emitting control signal provided by the first light-emitting control terminal EM1, the second light-emitting control signal provided by the second light-emitting control terminal EM2, the second power supply signal provided by the second power supply terminal Elvdd, and the first power supply signal.
The second electrode of the light-emitting element L1 is coupled to the common power supply terminal Vcom, and the common power supply terminal Vcom is configured to be coupled to the drive circuit and receive the common supply voltage provided by the drive circuit. The light-emitting element L1 is configured to emit light based on the common supply voltage and the light-emitting drive signal. For example, the light emitting element L1 emits light based on a voltage difference between the common supply voltage and the light-emitting drive signal. The common supply voltage provided by the drive circuit is a common supply voltage compensated by the drive circuit.
For example, assuming that the pixel circuit P1 transmits to the first electrode of the light-emitting element L1 with a potential of Vdata, a compensation voltage is ΔV, and the to-be-compensated public supply voltage is Vcom1, the compensation for the public supply voltage can be: accumulating the to-be-compensated public supply voltage Vcom1 with the compensation voltage ΔV. Then, the voltage difference between the first electrode and the second electrode of the light-emitting element L1 Voled=Vdata−(Vcom1+ΔV). After testing, the luminance stability of the light-emitting element L1 under the action of the pressure difference is good.
Optionally, combined with
The light-emitting control sub-circuit P11 is coupled to the first light-emitting control terminal EM1, the second light-emitting control terminal EM2, the first power supply terminal Gnd, the second power supply terminal Elvdd, and the first node N1. The light-emitting control sub-circuit P11 is configured to control an on/off between the second power supply terminal Elvdd and the first node N1 in response to the first light-emitting control signal, and to control an on/off between the first power supply terminal Gnd and the first node N1 in response to the second light-emitting control signal.
For example, the light-emitting control sub-circuit P11 controls the second power supply terminal Elvdd conduct with the first node N1 in the case that the potential of the first light-emitting control signal is a first potential. The second power supply terminal Elvdd then transmits the second power supply signal with the first potential to the first node N1 to charge the first node N1. The light-emitting control sub-circuit P11 controls the second power supply terminal Elvdd to be disconnected with the first node N1 in the case that the potential of the first light-emitting control signal is a second potential. The second power supply terminal Elvdd cannot transmit the second power supply signal with the first potential to the first node N1.
Similarly, the light-emitting control sub-circuit P11 controls the first power supply terminal Gnd to conduct with the first node N1 in the case that the potential of the second light-emitting control signal is the first potential. The first power supply terminal Gnd transmits the first power supply signal with the second potential to the first node N1 to discharge the first node N1. The light-emitting control sub-circuit P11 controls the first power supply terminal Gnd to be disconnected with the first node N1 in the case that the potential of the second light-emitting control signal is the second potential. The first power supply terminal Gnd cannot transmit the first power supply signal of the second potential to the first node N1.
It should be noted that for each sub-circuit in the pixel circuit P1, the first potential is a valid potential and the second potential is an invalid potential.
The data write sub-circuit P12 is coupled to the scan control terminal Scan, the data signal terminal Data, and the second node N2. The data write sub-circuit P12 is configured to control the on and off between the data signal terminal Data and the second node N2 in response to the scan signal.
For example, the data write sub-circuit P12 controls the data signal terminal Data to conduct with the second node N2 in the case that the potential of the scan signal is a first potential. The data signal terminal Data then transmits a data signal to the second node N2 to enable charging of the second node N2. The data write sub-circuit P12 controls the data signal terminal Data to be disconnected with the second node N2 in the case that the potential of the scan signal is the second potential. The data signal terminal Data cannot transmit the data signal to the second node N2.
The storage sub-circuit P13 is coupled to the second node N2 and the first power supply terminal Gnd. The memory sub-circuit P13 is configured to store the potential of the second node N2 based on the first power supply signal.
The drive sub-circuit P14 is coupled to the first node N1, the second node N2, and the first electrode of the light-emitting element L1, and is configured to transmit a light-emitting drive signal to the first electrode of the light-emitting element L1 to drive the light-emitting element L1 to emit light based on the potential of the first node N1 and the potential of the second node N2.
The gate electrode of the first light-emitting control transistor T1 is coupled to the first light-emitting control terminal EM1, the first electrode of the first light-emitting control transistor T1 is coupled to the second power supply terminal Elvdd, and the second electrode of the first light-emitting control transistor T1 is coupled to the first node N1.
The gate electrode of the second light-emitting control transistor T2 is coupled to the second light-emitting control terminal EM2, the first electrode of the second light-emitting control transistor T2 is coupled to the first power supply terminal Gnd, and the second electrode of the second light-emitting control transistor T2 is coupled to the first node N1.
The gate electrode terminal of the data write transistor T3 is coupled to the scan control terminal Scan, the first electrode of the data write transistor T3 is coupled to the data signal terminal Data, and the second electrode of the data write transistor T3 is coupled to the second node N2.
The first terminal of the storage capacitor C1 is coupled to the second node N2, and the second terminal of the storage capacitor C1 is coupled to the first power supply terminal Gnd.
The gate electrode of the drive transistor T4 is coupled to the second node N2, the first terminal of the drive transistor T4 is coupled to the first node N1, and the second terminal of the drive transistor T4 is coupled to the first terminal of the light emitting element L1 (e.g., the anode shown in, 8).
Optionally, in the embodiment of the present disclosure, the plurality of pixels 02 are arranged in an array, i.e., the plurality of pixels 02 are arranged in rows and columns, and the display panel includes a plurality of rows and columns of pixels. Based on this, the plurality of pixels 02 disposed in one row share one light-emitting control sub-circuit P11, i.e., they share the first light-emitting control transistor T1 and the second light-emitting control transistor T2 disposed in the non-display region B1. In other words, for each row of pixels 02, the display region A1 includes only the 2T1C circuit structure described in the above embodiment, and the non-display region B1 includes only a first light-emitting control transistor T1 and a second light-emitting control transistor T2, such that the PPI of the display panel can be effectively improved.
Optionally, in the embodiment of the present disclosure, the transistors included in each sub-circuit of the pixel circuit P1, i.e., the first light-emitting control transistor T1, the second light-emitting control transistor T2, the data write transistor T3, and the driving transistor T4 shown in
Currently, in silicon-based OLED micro displays, the display panel includes a pixel circuit that generally includes both NMOS transistors and PMOS transistors, i.e., it is made by a CMOS process that combines an NMOS process and a PMOS process. However, it has been tested that in the case that CMOS processes are used to form the pixel circuits, a variety of problems inevitably arise as follows.
Constrained by the design rule of CMOS process, the output uniformity of NMOS transistor and PMOS transistor is poor, based on which the channel width (W) and channel length (L) of transistor need to be adjusted, such as increasing W and L. In this way, it is not conducive to the design of high PPI of display panel, i.e., it constrains the high PPI design.
The film layer included in NMOS transistors and the film layer included in PMOS transistors need to be disposed on different sides and made of different masks. In this way, it not only causes the thickness of the display panel to be larger, but also more layers of masks need to be used in the case that the foundry of manufacturing the display panel manufactures the wafer, which is costly and complicated. The wafer is a display panel.
In the coexistence of NMOS transistors and PMOS transistors, in the case that a short circuit occurs between the cathode and anode of a light-emitting element L1, a latchup effect is brought, causing the light-emitting element L1 to fail to emit light under driving of the pixel circuit P1, i.e., the light-emitting element L1 does not emit light. The location of the light-emitting element L1 is shown as a black spot. The black spot causes the light-emitting element L1 disposed in the same column as the light-emitting element L1 to emit light abnormally, that is, spot-band line display anomaly occurs.
The general data write transistor T3 includes NMOS transistors and PMOS transistors, and the N-type substrate of the PMOS transistor is prone to leakage, causing the data signal to be mistakenly transmitted to the gate electrode of the drive transistor T4 and stored in the storage capacitor C1, which causes a bright spot to appear in the case that the display panel displays a low grayscale screen.
Therefore, manufacturing the pixel circuit P1 only by the NMOS process makes each of the transistors in the pixel circuit P1 is an N-type transistor, and the above plurality of problems of the conventional pixel circuit can be effectively solved. For example, it can not only facilitate the design of high PPI, reduce the quantity of mask layers of wafer made by the foundry, reduce the cost and simplify the process, but also prevent the problem of spot-band line and low grayscale bright spot brought by the short circuit of cathode and anode of light-emitting element L1, and ensure a better display effect of the display panel. In some other embodiments, the transistors included in each sub-circuit of the pixel circuit P1 are PMOS transistors.
Taking the pixel circuit P1 shown in
In the reset phase t1, the potential of the scan control signal provided by the scan control terminal Scan, the potential of the second power supply signal provided by the second power supply terminal Elvdd, the potential of the data signal provided by the data signal terminal Data and the potential of the first light emitting control signal provided by the first light emitting control terminal EM1 are the second potential (i.e., low potential). Only the potential of the second light-emitting control signal provided by EM2 is the first potential (i.e., high potential). Moreover, the storage capacitor C1 holds the potential of the second node N2 in the phase to a high potential. Accordingly, the data write transistor T3 and the first light-emitting control transistor T1 are turned off, and the driving transistor T4 and the second light-emitting control transistor T2 are turned on. The first power signal with a low potential provided by the first power supply terminal Gnd is transmitted to the anode of the light-emitting element L1 via the turned-on second light-emitting control transistor T2 and the drive transistor T4, thereby enabling a reset of the anode.
In the data write phase t2, the potential of the scan control signal, the potential of the data signal and the potential of the second light-emitting control signal are high potentials, and the potential of the first light-emitting control signal and the potential of the second power supply signal are low potentials. Accordingly, the data write transistor T3, the second light-emitting control transistor T2 and the drive transistor T4 are turned on, and the first light-emitting control transistor T1 is turned off. The data signal is transmitted to the second node N2 via the turned-on data write transistor T3, thereby enabling data write.
In the light-emitting phase t3, the potential of the scan control signal, the potential of the data signal and the potential of the second light-emitting control signal are low potentials, and the potential of the second power supply signal and the potential of the first light-emitting control signal are high potentials. The potential of the second node N2 is held at a high potential under the storage effect of the storage capacitor C1. Accordingly, the data write transistor T3 and the second light-emitting control transistor T2 are turned off, and the first light-emitting control transistor T1 and the driving transistor T4 are turned on. The high potential second power signal is transmitted to the first node N1 via the turned-on first light-emitting control transistor T1. The drive transistor T4 transmits a drive current to the anode of the light-emitting element L1 based on the potential of this first node N1 and the potential of the second node N2 to illuminate the light-emitting element.
That is, in the embodiments of the present disclosure, data transmission is performed by the data write transistor T3 which is an NMOS transistor. By flexible design of the voltage magnitude (VGH) of the scan control signal provided by the scan control terminal Scan, the data write transistor T3 can transmit the highest grayscale voltage of VGH-Vth to the storage capacitor C1 (i.e., the second node N2) compared to a conventional CMOS transmission gate (i.e., including NMOS transistors and PMOS transistors), and Vth is the threshold voltage of the data write transistor T3. The data signal (i.e., the grayscale signal) transmitted to the storage capacitor C1 controls the gate potential of the drive transistor T4. The change of the gate potential of the drive transistor T4 further realizes the control of the anode potential of light-emitting element L1, such that the writing of data signals of different grayscales is realized, and the light-emitting element L1 emits light with the luminance corresponding to the grayscale.
Furthermore, the first light-emitting control transistor T1 and the second light-emitting control transistor T2 enable charging and discharging of the first node N1, and enable control of the anode potential of the light-emitting element L1. And at the same time, only one light-emitting control transistor is turned on. For example, in the case that the first light-emitting control transistor T1 is turned off and the second light-emitting control transistor T2 is turned on, the anode potential is discharged to the second potential of the first power signal, and the first power signal works with the common supply voltage to ensure that the light-emitting element L1 to achieve the luminance of 0 grayscale. In the case that the first light-emitting control transistor T1 is turned on and the second light-emitting control transistor T2 is turned off, the first node N1 is charged to the first potential of the second power signal. Further, the drive transistor T4 controls the anode potential of the light emitting element L1 by the grayscale signal written at its gate electrode and the second power supply signal written at its first electrode, which makes the light emitting element L1 reliably emit light.
It should be noted that in the first electrode and the second electrode of the transistor in the embodiments of present disclosure, one electrode refers to the source and the other electrode refers to the drain.
In summary, embodiments of the present disclosure provide a display panel including a substrate having a display region and a non-display region, pixels disposed in the display region, and a temperature sensing circuit and a trim circuit disposed in the non-display region. The temperature sensing circuit can transmit a target temperature sensing current to the drive circuit based on the temperature of the display region, and the trim circuit can transmit a target trim current to the drive circuit. The target temperature sensing current and the target trim current can be used by the drive circuit to compensate the common supply voltage and transmit the compensated common supply voltage to the pixel to drive the pixel to emit light, i.e., the drive circuit can flexibly adjust the common supply voltage transmitted to the pixel based on the temperature of the display region. In this way, the effect of temperature on the luminance of the pixel can be reduced, ensuring that the pixel can emit light normally even in the case that more heat is gathered in the display region. The display panel provided by the embodiments of present disclosure has a better display effect.
In conjunction with
Further, the drive circuit 10 is coupled to the temperature sensing circuit 03 and the trim circuit 04 in the display panel 00. The drive circuit 10 is configured to compensate the common supply voltage based on the target temperature sensing current transmitted by the temperature sensing circuit 03 and the target trim current transmitted by the trim circuit 04.
That is, the circuit that provides a signal to the signal terminal coupled to the circuit in the display panel and the circuit that compensates for the common supply voltage is one circuit. In some other embodiments, the operation of providing the signal and the compensation are performed by two circuits separately.
The COMP has a positive input (+) and a negative input (−). The voltage converter is grounded and is coupled to the positive input (+) of the COMP. The negative input (−) of the COMP is coupled to the output of the DAC, and the output of the COMP is coupled to the input of the ADC. The output of the ADC is coupled to the input of the DAC and to the common power supply Vcom. In conjunction with
The voltage converter is configured to convert the compensation current IPTAT to a compensation voltage ΔV and transmit the compensation voltage ΔV to the positive input of the comparator COMP. The comparator COMP is configured to receive an analog voltage (which may be referred to as a reference voltage) from the digital-to-analog converter DAC and is configured to compare the compensation voltage ΔV at the positive input (+) with the reference voltage at the negative input (−) and to transfer the comparison result to the analog-to-digital converter ADC. The analog-to-digital converter ADC is configured to convert the comparison result from an analog signal to a digital signal. The digital-to-analog converter DAC is configured to convert the digital signal into an analog signal and then transmit the analog signal to the negative input (−) of the comparator COMP, that is, the digital signal output from the analog-to-digital converter ADC is fed back to the negative input (−) of the comparator COMP via the digital-to-analog converter DAC. Ultimately, the output of the output of the ADC of the analog-to-digital converter converges to an absolute positive correlation with the temperature. The drive circuit 10 then compensates the to-be-compensated common supply voltage based on the compensation algorithm Voled=Vdata−(Vcom1+ΔV) as shown in
The Voled is the voltage difference between the anode and cathode of the light-emitting element L1 and Vdata is the potential of the data signal, as described in the above embodiment. The top left corner of
Optionally, in some embodiments of the present disclosure, the operation of the voltage comparator is independent of temperature to ensure subsequent reliable compensation of the common supply voltage. For example, the voltage comparator includes two resistors connected in series, and the resistance value of one resistor is positively correlated with temperature and the resistance value of the other resistor is negatively correlated with temperature so as to cancel each other out, such that the final output result of the voltage comparator is independent of temperature.
Optionally, as described in the above embodiments, the display device provided by embodiments of the present disclosure includes: a silicon-based OLED micro display device.
Step 1201, a first reference power signal at a first potential to a first reference power supply terminal is provided. A second reference power signal at the first potential to a second reference power supply terminal is provided, a trim control signal at the first potential to at least one of a plurality of trim control terminals is provided, and a trim control signal with a second potential to other trim control terminals other than the at least one trim control terminal is provided.
Step 1202, the target temperature sensing current transmitted by the temperature sensing circuit is received.
The target temperature sensing current is generated by the temperature sensing circuit based on the temperature of the display region in the display panel, under driving of the first reference power signal of the first potential, the second reference power signal of the first potential, and the first power signal provided by the coupled first power supply terminal.
Step 1203, the target trim current transmitted by the trim circuit is received.
The target trim current is generated by the trim circuit under driving of the first reference power signal of the first potential, the trim control signal of the first potential, and the first power signal provided by the coupled first power supply terminal.
Step 1204, the common supply voltage is compensated based on the target temperature sensing current and the target trim current, and the compensated common supply voltage is transmitted to the plurality of pixels to drive the plurality of pixels to emit light.
Optionally, referring to
Step 12041, a compensation current is determined in response to accumulating the target temperature sensing current and the target trim current.
Optionally, as described in the above embodiments, the temperature sensing circuit and the trim circuit are coupled to the drive circuit via one target node. Based on this, the drive circuit receives the compensation current directly from the target node. Alternatively, in some embodiments, the temperature sensing circuit and the trim circuit transmit the target temperature sensing current and the target trim current to the drive circuit respectively. Based on this, the drive circuit sums the target temperature sensing current and the target trim current to acquire the compensation current.
Step 12042, the compensation current is converted to a compensation voltage.
Optionally, in conjunction with the above embodiments, the drive circuit includes a voltage converter. The drive circuit converts the determined compensation current by the voltage converter to acquire the compensation voltage. In some embodiments, the compensation current is converted to a compensation voltage by a voltage converter circuit independent of the drive circuit and then transmitted to the drive circuit.
Step 12043, the post-compensation common supply voltage is acquired by accumulating the compensation voltage to the common supply voltage prior to compensation.
Optionally, in conjunction with the above embodiments, the drive circuit accumulates the determined compensation voltage to the to-be-compensated common supply voltage to acquire the compensated common supply voltage, such that the voltage difference between the anode and cathode of the light-emitting element=Vdata−(to-be-compensated common supply voltage+compensation voltage), ensuring a better luminance of the light-emitting element. In some other embodiments, depending on the application scenario, the drive circuit determines the difference between the compensation voltage and the to-be-compensated public supply voltage to acquire the compensated public supply voltage.
In summary, embodiments of the present disclosure provide a method for compensating signals. In the method, the drive circuit receives the target temperature sensing current transmitted by the temperature sensing circuit based on the temperature of a display region, receives the target trim current transmitted by the trim circuit, compensates the common supply voltage based on the target temperature sensing current and target trim current, and transmits the compensated common supply voltage to the pixel to drive the pixel to emit light, that is the drive circuit flexibly adjusts the common supply voltage transmitted to the pixel based on the temperature of the display region. In this way, the effect of the temperature on the luminance of light emitted by the pixel is reduced, ensuring that the pixel emits light normally in the case that more heat is gathered in the display region, and ensuring a better display effect of the display panel.
The terms in the embodiments section of the disclosure are used only for the purpose of explaining embodiments of this disclosure and are not intended to limit the disclosure. Unless otherwise defined, technical terms or scientific terms used in embodiments of the present disclosure shall have the ordinary meaning as understood by persons having ordinary skill in the art to which the present disclosure belongs.
For example, the words “first,” “second,” or “third,” and the like, as used in embodiments of the present disclosure, do not indicate any order, number, or importance, but are used only to distinguish the different components. Rather, they are used to distinguish between different components.
Similarly, the words “one” or “a” and the like do not indicate a quantitative limitation, but rather the presence of at least one.
“And/or” indicates that three kinds of relationships can exist, for example, A and/or B can indicate: A alone, both A and B, and B alone. The symbol “/” generally indicates an “or” relationship between the associated objects in front and behind.
The above mentioned are only optional embodiments of the present application and are not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made in the spirit and principles of the present application shall be included in the scope of protection of the present application.
This application is a U.S. national phase application based on PCT/CN2022/083723, filed on Mar. 29, 2022, the disclosure of which is incorporated herein by reference in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2022/083723 | 3/29/2022 | WO |
