Display panel drive apparatus

Abstract

A display panel drive apparatus which reduces noise to thereby prevent malfunction. A first switch connects based on pixel data between one of column electrodes of a display panel and a power supply line to which a pulsed supply voltage is applied. A second switch connects between the one column electrode and a ground line based on the pixel data. The first and second switches are used to apply pixel data pulses based on the pixel data to the one column electrode. In this scheme, the pixel data having a lower frequency in the vertical direction of the screen allows the second switch to send a smaller current to the ground line when compared with a case of the pixel data having a higher frequency.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a view schematically illustrating the configuration of a plasma display device;

FIG. 2 is a view illustrating an exemplary internal configuration of the column electrode drive circuit 20 shown in FIG. 1;

FIG. 3 is a view illustrating the waveform of a pulsed supply voltage produced on the power supply line 2;

FIG. 4 is a view illustrating an exemplary waveform of a pixel data pulse applied to a column electrode Z by the column electrode drive circuit 20 shown in FIG. 1;

FIG. 5 is a view illustrating an exemplary configuration of a plasma display device incorporating a display panel drive apparatus according to the present invention;

FIG. 6 is a view illustrating a light-emission drive sequence based on a sub-field method;

FIG. 7 is a view illustrating an exemplary internal configuration of a column electrode drive circuit 200 shown in FIG. 5;

FIG. 8 is a view illustrating an exemplary internal configuration of each of output buffers BF₁ to BF_m shown in FIG. 7;

FIG. 9 is a view illustrating the internal operation of the power supply circuit 21 and each output buffer BF when an input video signal has a higher frequency in the vertical direction of the screen;

FIG. 10 is a view illustrating the internal operation of the power supply circuit 21 and each output buffer BF when an input video signal has a lower frequency in the vertical direction of the screen;

FIG. 11 is a view illustrating another exemplary internal configuration of each of the output buffers BF₁ to BF_m shown in FIG. 7;

FIG. 12 is a view illustrating another exemplary configuration of a plasma display device incorporating a display panel drive apparatus according to the present invention;

FIG. 13 is a view illustrating still another exemplary configuration of a plasma display device incorporating a display panel drive apparatus according to the present invention; and

FIG. 14 is a view illustrating an exemplary internal configuration of a column electrode drive circuit 200 shown in FIG. 13.

Claims

1. A display panel drive apparatus for driving a display panel on pixel-by-pixel basis in accordance with pixel data derived from an input video signal, the display panel having a capacitive pixel cell at each portion of intersection of a plurality of row electrodes and a plurality of column electrodes, the drive apparatus comprising: a power supply circuit for producing a pulsed supply voltage having a predetermined peak voltage for application to a power supply line; anda pixel data pulse generation circuit for producing a pixel data pulse having a voltage associated with the pixel data in accordance with the pulsed supply voltage for application to the column electrode, the pixel data pulse generation circuit including a first switch for connecting between the power supply line and one of the column electrodes in accordance with the pixel data, and a second switch for connecting the one column electrode to a ground line in accordance with the pixel data, the second switch varying an amount of current to be sent to the ground line in accordance with a drive mode.

2. The display panel drive apparatus according to claim 1, wherein as a frequency of the pixel data in a vertical direction of a screen of the display panel lowers, the power supply circuit reduces the pulsed supply voltage in amplitude with the predetermined peak voltage remaining unchanged.

3. The display panel drive apparatus according to claim 1, further comprising a controller for specifying the drive mode in accordance with the frequency of the pixel data in the vertical direction of the screen of the display panel.

4. The display panel drive apparatus according to claim 3, wherein the pixel data having a lower frequency in the vertical direction of the screen causes the controller to specify the drive mode to send a smaller current than in a case of the pixel data having a higher frequency.

5. The display panel drive apparatus according to claim 1, wherein the second switch is made up of a plurality of transistors connected in parallel to each other between the one column electrode and the ground line, andthose of the transistors capable of switching operation are changed in number in response to the drive mode.

6. The display panel drive apparatus according to claim 5, further comprising a controller for specifying the drive mode such that the pixel data having a lower frequency in the vertical direction of the screen causes a smaller number of transistors to perform switching operation when compared with a case of the pixel data having a higher frequency.

7. The display panel drive apparatus according to claim 1, wherein a unit display period of the input video signal comprises a plurality of sub-fields, each sub-field including an address period and a sustain period, the address period during which a pixel data write operation is performed to set each of the pixel cells to either an ON mode state or an OFF mode state on each display line basis in accordance with the pixel data, the sustain period during which only those of the pixel cells that are placed in the ON mode are allowed to emit light repetitively, andthe display panel drive apparatus further comprises a controller for specifying the drive mode to send a different amount of current during the address period and during the sustain period.

8. The display panel drive apparatus according to claim 7, wherein the controller specifies the drive mode to send a smaller current during the address period than during the sustain period.

9. The display panel drive apparatus according to claim 7, wherein the pixel data having a higher frequency in the vertical screen direction of the display panel causes the controller to specify the drive mode to send a larger high current during the address period when compared with a case of the pixel data having a lower frequency, and during the sustain period, the controller specifies the drive mode to send the high current.

10. The display panel drive apparatus according to claim 7, wherein in the pixel data write operation performed finally during the address period, the controller specifies the drive mode to send a lower current than in any other period of the address period.

11. The display panel drive apparatus according to claim 1, wherein the power supply circuit comprises a capacitor,a first switching current path for allowing charges stored on the capacitor to be discharged and selectively be supplied to the power supply line via a first coil,a second switching current path for selectively applying the same DC voltage as the predetermined peak voltage to the power supply line, anda third switching current path for allowing charges stored on the column electrode to selectively charge the capacitor via the power supply line and a second coil.