Display panel drive-control device and display panel drive-control method

Abstract

A first latch circuit temporarily memorizes a display pixel data by one line. A second latch circuit temporarily memorizes the display pixel data as a preceding display pixel data that precedes the display pixel data by one line. The load judging circuit judges a transition state of the display pixel data based on the display pixel data and the preceding display pixel data and predicts a drive load capacity CL based on a result of the judgment. A drivability adjusting circuit adjusts a signal level of the display pixel data based on a result of the prediction of the drive load capacity CL and adjusts drivability of an output.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

These and other objects as well as advantages of the invention will become clear by the following description of preferred embodiments of the invention. A number of benefits not recited in this specification will come to the attention of those skilled in the art upon the implementation of the present invention.

FIG. 1 is a block diagram showing a constitution of a display panel drive-control device according to a preferred embodiment of the present invention.

FIG. 2 is a schematic diagram showing a structure of electrodes of a conventional AC-type PDP (plasma display panel).

FIG. 3 is a conceptual diagram showing a drive load capacity of a pixel in the AC-type PDP.

FIGS. 4A and 4B are conceptual views of a content assumed in FIG. 3 in the preferred embodiment.

FIG. 5 shows an estimate diagram of a capacitive load in relation to FIGS. 3, 4a and 4B in the preferred embodiment.

FIG. 6 is a circuit diagram showing an exemplified constitution of a drive load transition state judging circuit of the display panel drive-control device according to the preferred embodiment.

FIG. 7 is a block diagram illustrating a constitution of a drivability adjusting circuit of the display panel drive-control device according to the preferred embodiment.

FIG. 8 is a circuit diagram illustrating a constitution of a drivability adjustment output circuit of the display panel drive-control device according to the preferred embodiment.

FIG. 9 is a schematic diagram showing an exemplified constitution in relation to a selective control part when output circuits respectively having two different levels of drivability are selected in accordance with the drive load capacity in case of focusing on the output of a pixel in the constitution of the drivability adjustment output circuit of the display panel drive-control device according to the preferred embodiment.

Claims

1. A display panel drive-control device comprising: a first latch circuit for temporarily memorizing a display pixel data by one line;a second latch circuit for temporarily memorizing a preceding display pixel data that precedes the display pixel data by one line;a load judging circuit for judging a transition state of the display pixel data based on the display pixel data and the preceding display pixel data and predicting a drive load capacity based on a result of the judgment; anda drivability adjusting circuit for adjusting a signal level of the display pixel data based on a result of the prediction of the drive load capacity.

2. The display panel drive-control device as claimed in claim 1, wherein the load judging circuit judges the transition state based on comparison of a group of data in a pixel region comprising a pixel of display target and adjacent pixels on both sides thereof in the display pixel data to a group of data in a preceding pixel region corresponding to the pixel region in the preceding display pixel data.

3. The display panel drive-control device as claimed in claim 1, wherein the load judging circuit judges whether or not the drive load capacity is below a predetermined drive load capacity based on comparison of data of pixels adjacent to a pixel of display target on both sides thereof in the display pixel data, and judges the transition state based on a result of the judgment.

4. The display panel drive-control device as claimed in claim 1, wherein the load judging circuit judges an operation margin in relation to the drive load capacity based on comparison of data of pixels adjacent to a pixel of display target on both sides thereof in the display pixel data to data of preceding pixels corresponding to the both-side pixels in the preceding display pixel data, andthe drivability adjusting circuit adjusts the signal level of the display pixel data based on a result of the judgment on the operation margin.

5. The display panel drive-control device as claimed in claim 1, wherein the load judging circuit comprises a combinational logic circuit.

6. The display panel drive-control device as claimed in claim 1, wherein the drivability adjusting circuit comprises:a signal level adjusting circuit for adjusting the display pixel data to have such a signal level that is necessary for the display; anda drivability adjustment output circuit for adjusting a drivability of the display pixel data which is level-adjusted with the signal level adjusting circuit in accordance with a prediction result of the drive load capacity by the load judging circuit.

7. The display panel drive-control device as claimed in claim 6, further comprising: an output terminal for outputting the display pixel data; anda plurality of buffers connected in parallel to the output terminal, whereinthe drivability adjustment output circuit selects the buffer to be driven from among the plurality of buffers.

8. The display panel drive-control device as claimed in claim 6, wherein the drivability adjusting circuit comprise:a plurality of drivability adjustment output circuits having different levels of drivability respectively; anda selector for selecting the drivability adjustment output circuit suitable for the drive load capacity from the plurality of drivability adjustment output circuits.

9. The display panel drive-control device as claimed in claim 1, further comprising a delay adjusting circuit for delaying an output timing of the display pixel data so as to synchronize the output timing with an output timing of the prediction result by the load judging circuit.

10. The display panel drive-control device as claimed in claim 1, further comprising a data shift circuit for fetching the display pixel data by one scanning line while shifting the display pixel data in accordance with a pixel clock.

11. A display panel drive-control method comprising: a comparing step for comparing a group of display pixel data consisting of three pixels, that are a pixel to be controlled (k)n and pixels (k−1)n and (k+1)n adjacent thereto on both sides thereof in a scanning line n, to a group of preceding display pixel data consisting of three pixels, that are a pixel (k)n-1 corresponding to the pixel to be controlled (k)n and pixels (k−1)n-1 and (k+1)n-1 adjacent thereto on both sides thereof in a scanning line n−1 immediately before the scanning line n;a predicting step for monitoring a state of data transition from the preceding display pixel data to the display pixel data based on a comparison result obtained in the comparing step and predicting a drive load capacity based on an monitoring result thereby obtained; anda signal level adjusting step for adjusting a signal level of the display pixel data based on a prediction result thereby obtained.

12. The display panel drive-control method as claimed in claim 11, wherein the comparing step further includes:a first comparing step for comparing the display pixel data of the pixel (k−1)n to the display pixel data of the pixel (k−1)n-1 and comparing the display pixel data of the pixel (k+1)n to the display pixel data of the pixel (k±1)n-1; anda second comparing step for comparing the display pixel data of the pixel (k−1)n to the display pixel data of the pixel (k+1)n, whereinthe predicting step monitors the data transition state from the preceding display pixel data to the display pixel data based on results of the comparisons in the first and second comparing steps in the predicting step.