Patent Application
20070176866
1. Field of the Invention
This invention generally relates to an image sticking elimination circuit, and more particularly to an image sticking elimination circuit suitable for supplying charged power to display panel and driving circuit when an abnormal power shut down occurs.
2. Description of Related Art
Liquid crystal material was discovered by Europe, developed by the US, and applied by Japan in several fields. Currently, several liquid crystal technologies have been widely used in displays, especially for liquid crystal displays (LCD). The LCD has been developed from TN-LCD, STN-LCD, to TFT-LCD. Some manufacturers also begin to develop LPTS-LCD.
The conventional method to eliminate or reduce the image sticking is to shift the I-V curve of the transistor 132 (as shown in
However, to have a better resolution, one may not shift the I-V curve as he wishes because it also affects the circuits in the LCD panel 100. Hence, the image sticking issue cannot be solved by the conventional method without affecting the resolution of the LCD panel.
The present invention is directed to a display panel with an image sticking elimination circuit. When the abnormal power shut down occurs, the charges stored in the image sticking elimination circuit will raise the voltage of the gate line to a high voltage level and turn on the switch in the pixel units. Hence the image charges stored in the image charge storage device will be released to reduce or eliminate the image sticking.
The present invention is directed to a display panel with an image sticking elimination circuit comprising a plurality of pixel units driven by a gate driving circuit and a data driving circuit. The gate driving circuit is driven by a first voltage and a second voltage, wherein the first voltage turns on the pixel units for receiving signals from the data driving circuit, the second voltage turns off the pixel units for preventing the pixel units from receiving signals from the data driving circuit. The image sticking elimination circuit comprises a charge storage device having a first terminal and a second terminal; an isolation device having a first terminal, a second terminal and a third terminal; and a switch coupled between a data line driven by the data driving circuit and an ESD circuit. The first terminal of the charge storage device is coupled to the first voltage and the second terminal of the charge storage device is coupled to ground. The first terminal of the isolation device is coupled to the first terminal of the charge storage device, the second terminal of the isolation device is coupled to the first voltage and the third terminal of the isolation device is coupled to the second voltage. The isolation device is turned on when the abnormal power shut down occurs. The switch is adapted for determining whether or not to turn itself on according to voltage applied on the third terminal of the isolation device, and the switch is turned on when the abnormal power shut down occurs.
In an embodiment of the present invention, the image sticking elimination circuit further comprises a diode having a first terminal and a second terminal, wherein the first terminal of the diode is coupled to the first voltage and the second terminal of the diode is coupled to the first terminal of the charge storage device.
The present invention is directed to an image sticking elimination circuit of a display unit comprising a plurality of pixel units driven by a gate driving circuit and a data driving circuit. The gate driving circuit is driven by a first voltage and a second voltage, the first voltage turns on the pixel units for receiving data signals, the second voltage turns off the pixel units for preventing the pixel units from receiving data signals. The image sticking elimination circuit comprises a switch coupled between a data line driven by the data driving circuit and an ESD circuit; and an image sticking elimination circuit charged by the first voltage adapted for outputting charged power to turn on the switch and the pixel units when the abnormal power shut down occurs.
The present invention is also directed to a driving circuit of a display panel having a plurality of pixel units. The driving circuit comprises a voltage converter outputting a first voltage and a second voltage; a gate driving circuit driving the pixel units each coupling to one of a plurality of gate lines according to the first and second voltage, wherein the first voltage turns the pixel units on and the second voltage turns the pixel units off; a data driving circuit driving a plurality of data lines; a plurality of switches each coupled between a corresponding one of the data lines and an ESD circuit; and an image sticking elimination circuit charged by the first voltage, and when an abnormal power shut down occurs, the charged power is output to turn the pixel units and switches on.
The present invention uses an image sticking elimination circuit, and when the abnormal power shut down occurs, the charges stored in the charge storage device will raise the voltage of the gate line to a voltage level sufficient to turn on the pixel units and switches connected to ESD circuit. Hence, the image charges stored in the image charge storage device will be released to ESD circuit such that elimination or the reduction of the image sticking can be faster due to a grounded path conducting the released image charges.
The above is a brief description of some deficiencies in the prior art and advantages of the present invention. Other features, advantages and embodiments of the invention will be apparent to those skilled in the art from the following description, accompanying drawings and appended claims.
Although the switch device 332 is illustrated as an NMOS, those of ordinary skills would know that PMOS, MOSFET or JFET could be used to form the switch device 332.
Referring to
When the DC voltage supply provides the power to the voltage converter 340, the voltage converter 340 provides the gate driving circuit 110 with the high voltage VDD and low voltage VEE. Because switch device 332 is illustrated as an NMOS in the embodiment, high voltage VDD is used to turn on the switch device 332 and low voltage VEE is used to turn off the switch device 332. When pixel unit 330 is required to receive data, the gate driving circuit 310 uses the high voltage VDD to turn on the switch device 332 via the gate line 312. After the switch device 332 is turned on, the data driving circuit 320 can write data into the pixel unit 330 via the data line 322. After data is written into the pixel unit 330, the gate driving circuit 300 provides the low voltage VEE for turning off the switch device 332 to prevent the pixel unit 330 from receiving data. The pixel unit 330 will store the data in the image charge storage device 334 so that the liquid crystal cell 336 can continue to display the data before the next data is written (i.e., the switch device 332 is on again). However, when the abnormal power shut down occurs, the data is still stored in the image charge storage device 334. That is where the image sticking comes from.
In the present embodiment, the image sticking elimination circuit 300 includes an isolation device 302, a diode 304 and a charge storage device 306. The isolation device 302 comprises a first terminal 360, a second terminal 362 and a third terminal 364. The diode 304 comprises a first terminal 352 and a second terminal 354. The charge storage device 306 comprises a first terminal 356 and a second terminal 358. The isolation device 302 can be, but not limited to, a P-type MOSFET or a P-type JFET in the present embodiment. The charge storage device 306 can be, but not limited to, a capacitor. The first terminal 352 of the diode 304 is coupled to the voltage VDD, and the second terminal 354 of the diode 304 is coupled to the first terminal 356 of the charge storage device 306. Further, the second terminal 358 of the charge storage device 306 is coupled to ground. For the isolation device 302, the first terminal 360 is coupled to the first terminal 356 of the charge storage device 306, the second terminal 362 is coupled to the voltage VDD, and the third terminal 364 is coupled to the voltage VEE.
When the voltage converter 340 provides the power to the gate driving circuit 310, the voltage converter 340 also provides the voltage VDD to the isolation device 302 and the charge storage device 306 for respectively turning off the isolation device 302 and charging the charge storage device 306.
However, because the data driving circuit 320 is turned off when the power is low, the charges coming from the image charge storage device 334 can only be conducted to ground via leakage current. For improving image sticking elimination or reduction speed, the present embodiment provides a switch 333 coupled between data line 322 and an ESD circuit, and the switch 333 is coupled to terminal 364 and is turned on when abnormal power shut down occurs. In this embodiment, switch 333 is implemented by using an NMOS. When circuits work normally, NMOS 333 is turned off because voltage VEE is applied to gate of the NMOS 333. However, when abnormal power shut down occurs, charge storage device 306 releases charges stored therein, voltage of terminal 364 is raised and NMOS 333 is therefore turned on. After that, charges coming from the image charge storage device 334 can be grounded via the ESD circuit.
In this embodiment, the diode 304 is for the current flowing from the first terminal 352 of the diode 304 to the second terminal 354 of the diode 304. That is, when the charge storage device 306 discharges, the current only flows from the first terminal 360 of the isolation device 302 to the third terminal 364 of the isolation device 302, but the current will not flow through the diode 304. The isolation device 302 will be turned on when the voltage converter 340 does not provide the voltage VDD.
In an embodiment of the present invention, the charge storage device 306 can be a capacitor of the display and need not be an additional capacitor.
In another embodiment of the present invention, the first terminal 360 of the isolation device 302 can be coupled to a large resistor 392 to prevent the isolation device 302 from getting damaged by a large current. Further, an RC circuit (the resistor 394 and the capacitor 396 as shown in
For improving image sticking elimination speed, the present embodiment provides a switch 433 coupled between data line 422 and ESD circuit. The switch 433 is coupled to terminal 464 and is turned on when abnormal power shut down occurs. In this embodiment, switch 433 is implemented by using a PMOS. When circuits work normally, PMOS 433 is turned off because voltage VDD is applied to gate of the PMOS 433. However, when abnormal power-off occurs, charge storage device 406 releases charges stored therein, voltage of terminal 464 is down to a voltage near VEE and PMOS 433 is therefore turned on. After that, charges coming from the image charge storage device 434 can be grounded via the ESD circuit.
Referring to
In summary, the image sticking elimination circuit of the present invention does not have to adjust the I-V curve of the pixel unit so the image sticking elimination circuit will not affect the performance of the circuits in the display. When power shut down occurs, the charges stored in the charge storage device will turn both the pixel unit and the switch coupling to data line on. Hence the image charges stored in the image charge storage device will be released to ESD device for grounding to eliminate the image sticking.
The above description provides a full and complete description of the preferred embodiments of the present invention. Various modifications, alternate construction, and equivalent may be made by those skilled in the art without changing the scope or spirit of the invention. Accordingly, the above description and illustrations should not be construed as limiting the scope of the invention which is defined by the following claims.
