Patent Application
20240180000
Embodiments of the present disclosure relate to the field of display technologies, and particularly to a display substrate and a display apparatus.
Flexible OLED (Organic light emitting Diode) display has advantages of foldability, bendability and narrow frame, which is regarded to have a wide application prospect. OLED displays usually adopt a three-layer Thin Film Encapsulation (TFE) structure of inorganic layer-organic layer-inorganic layer. In TFE encapsulation layer, it is often required that the organic layer material has good fluidity and planarization surface after curing to ensure the encapsulation effect and display effect of the display. However, good fluidity easily leads to overflow of organic materials, and since the weak water and oxygen resistance of organic materials, once overflow occurs, it will lead to the encapsulation failure and affect the display effect.
The following is a summary of subject matter described herein in detail. The summary is not intended to limit the protection scope of claims.
Embodiments of the present disclosure provide a display substrate and a display apparatus.
In one aspect, embodiments of the present disclosure provide a display substrate, including an active area and a peripheral area located on the periphery of the active area, wherein a barrier dam and at least one barrier post are provided in the peripheral area. The display substrate includes a base substrate, and a light emitting structure layer and a encapsulation structure layer arranged on the base substrate, wherein the encapsulation structure layer is located on a side of the light emitting structure layer away from the base substrate, the light emitting structure layer includes a cathode, and the encapsulation structure layer includes an organic encapsulation layer. The at least one barrier post is located between the cathode and the barrier dam, and an orthographic projection of the at least one barrier post on the base substrate is located within a range of an orthographic projection of the organic encapsulation layer on the base substrate.
In some exemplary implementations, the peripheral area includes four sub-areas, upper, lower, left and right, and the at least one barrier post is arranged in at least one of the sub-areas.
In some exemplary embodiments, the barrier posts are provided in two sub-areas arranged opposite to each other.
In some exemplary embodiments, the at least one barrier post forms at least one annular structure around the active area.
In some exemplary embodiments, the peripheral area is provided with a plurality of barrier posts, which are sequentially arranged along a direction away from the active area.
In some exemplary embodiments, a cross section of the at least one barrier post is arranged in a shape of an inverted trapezoid.
In some exemplary embodiments, the quantity of the barrier posts is less than or equal to 10.
In some exemplary embodiments, the at least one barrier post includes a plurality of sub-barrier posts with spacings between adjacent sub-barrier posts, and the plurality of sub-barrier posts surround the active area.
In some exemplary embodiments, the peripheral area includes a first barrier post, a second barrier post, and a third barrier post arranged sequentially along a direction away from the active area, wherein sub-barrier posts of the first barrier post are aligned with sub-barrier posts of the third barrier post along the direction away from the active area, and spacings between the sub-barrier posts of the first barrier post are aligned with sub-barrier posts of the second barrier post.
In some exemplary embodiments, at least one of the plurality of sub-barrier posts includes a main body portion and a protrusion portion extending from a side of the main body portion towards the active area.
In some exemplary embodiments, the at least one barrier post includes a fourth barrier post and a fifth barrier post arranged sequentially along a direction away from the active area, wherein protrusion portions of sub-barrier posts of the fifth barrier post face spacings between the sub-barrier posts of the fourth barrier post.
In some exemplary embodiments, a furthest distance between a surface of a side of the at least one barrier post close to the active area and a surface of a side of the barrier post away from the active area is set to be from 1 micron to 7 microns; and a distance between a surface of the at least one barrier post away from the base substrate and a surface close to the base substrate is set to be from 0.5 microns to 5 microns.
In some exemplary embodiments, the display substrate further includes a pixel planarization layer located on a side of the light emitting structure layer close to the base substrate, and an orthographic projection of the at least one barrier post on the base substrate is partially overlapped with an orthographic projection of the pixel planarization layer on the base substrate.
On the other hand, an embodiment of the present disclosure provides a preparation method of a display substrate, including: forming a light emitting structure layer on a base substrate of an active area, forming a barrier dam and at least one barrier post on a base substrate of a peripheral area, and forming an encapsulation structure layer. Among them, the light emitting structure layer includes a cathode, and the at least one barrier post is located between the cathode and the barrier dam. An orthographic projection of the at least one barrier post on the base substrate is within the range of an orthographic projection of an organic encapsulation layer of the encapsulation structure layer on the base substrate.
In another aspect, an embodiment of the present disclosure provides a display apparatus, which includes the above display substrate.
In another aspect, an embodiment of the present disclosure provides a display substrate, including a base substrate, an encapsulation structure layer, a barrier dam, and at least one barrier post. The base substrate includes an active area and a peripheral area located on a periphery of the active area. The encapsulation structure layer is arranged on the base substrate, located in the active area and the peripheral area, and includes an organic encapsulation layer. A barrier dam and at least one barrier post are located in the peripheral area, and the at least one barrier post is located on a side of the barrier dam close to the active area. The organic encapsulation layer has a gradient area in the peripheral area, and an orthographic projection of the gradient area of the organic encapsulation layer on the base substrate is overlapped with an orthographic projection of the at least one barrier post on the base substrate.
In some exemplary implementations, an orthographic projection of the organic encapsulation layer on the base substrate is not overlapped with an orthographic projection of the barrier dam on the base substrate.
In some exemplary implementations, the above display substrate may further include a light emitting structure layer located on the base substrate, and the light emitting structure layer is located on a side of the encapsulation structure layer close to the base substrate. The light emitting structure layer includes a cathode layer, and an orthographic projection of the cathode layer on the base substrate is not overlapped with an orthographic projection of the at least one barrier post on the base substrate.
In some exemplary implementations, the at least one barrier post includes a plurality of sub-barrier posts, and there are spacings between adjacent sub-barrier posts.
In some exemplary embodiments, the peripheral area at least includes two adjacent barrier posts arranged sequentially along a direction away from the active area; and spacings between adjacent sub-barrier posts of one of the two barrier posts close to the active area are aligned with sub-barrier posts of one of the two barrier posts away from the active area.
In some exemplary implementations, at least one sub-barrier post of the at least one barrier post includes a main body portion and a protrusion portion extending from a side of the main body portion towards the active area. Protrusion portions of the sub-barrier posts of the barrier post away from the active area face spacings between adjacent sub-barrier posts of the barrier post close to the active area.
In some exemplary implementations, the peripheral area includes four sub-areas, upper, lower, left and right, and the at least one barrier post is arranged in at least one of the sub-areas.
In some exemplary embodiments, the barrier posts are provided in two sub-areas arranged opposite to each other.
Other aspects may be understood upon reading and understanding accompanying drawings and detailed description.
The drawings are intended to provide a further understanding for the technical solutions of the present disclosure and form a part of the specification, and are used to explain the technical solutions of the present disclosure together with embodiments of the present disclosure, and do not form limitations on the technical solutions of the present disclosure. Shapes and sizes of one or more components in the drawings do not reflect actual scales, and are only intended to schematically describe contents of the present disclosure.
The embodiments of the present disclosure will be described in detail below with reference to the drawings. It is to be noted that implementations may be practiced in a plurality of different forms. Those of ordinary skills in the art may easily understand such a fact that implementations and contents may be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be explained as being limited to contents described in following implementation modes only. The embodiments in the present disclosure and features in the embodiments may be combined randomly with each other if there is no conflict.
In the drawings, a size of one or more constituent elements, a thickness of a layer, or a region is sometimes exaggerated for clarity. Therefore, one mode of the present disclosure is not necessarily limited to the size, and a shape and a size of one or more components in the drawings do not reflect an actual scale. In addition, the drawings schematically illustrate ideal examples, and one mode of the present disclosure is not limited to shapes, numerical values, or the like shown in the drawings.
Ordinal numerals such as “first”, “second”, and “third” in the specification are set to avoid confusion between constituent elements, but not to set a limit in quantity.
In the specification, for convenience, wordings indicating orientation or positional relationships, such as “middle”, “upper”, “lower”, “front”, “back”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, and “outside”, are used for illustrating positional relationships between constituent elements with reference to the drawings, and are merely for facilitating the description of the specification and simplifying the description, rather than indicating or implying that a referred apparatus or element must have a particular orientation and be constructed and operated in the particular orientation. Therefore, they cannot be understood as limitations on the present disclosure. The positional relationships between the constituent elements may be changed as appropriate according to directions for describing the various constituent elements. Therefore, appropriate replacements may be made according to situations without being limited to the wordings described in the specification.
In the specification, unless otherwise specified and defined explicitly, terms “mount”, “mutually connect”, and “connect” should be understood in a broad sense. For example, a connection may be a fixed connection, a detachable connection, or an integrated connection; it may be a mechanical connection or an electrical connection; it may be a direct mutual connection, or an indirect connection through middleware, or internal communication between two elements. Those of ordinary skills in the art may understand meanings of the above-mentioned terms in the present disclosure according to situations.
In the specification, a transistor refers to an element which at least includes three terminals, i.e., a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain) and the source electrode (source electrode terminal, source region, or source), and a current can flow through the drain electrode, the channel region, and the source electrode. It is to be noted that, in the specification, the channel region refers to a region through which the current mainly flows.
In the specification, a first electrode may be a drain electrode, and a second electrode may be a source electrode. Or, the first electrode may be a source electrode, and the second electrode may be a drain electrode. In a case that transistors with opposite polarities are used, in a case that a direction of a current is changed during operation of a circuit, or the like, functions of the “source electrode” and the “drain electrode” are sometimes interchangeable. Therefore, the “source electrode” and the “drain electrode” are interchangeable in the specification.
In the specification, an “electrical connection” includes a case that constituent elements are connected together through an element having some electrical function. The “element having some electrical function” is not particularly limited as long as electrical signals between the connected constituent elements may be transmitted. Examples of the “element with the certain electrical effect” not only include electrodes and wirings, but also include switch elements such as transistors, resistors, inductors, capacitors, other elements with various functions, etc.
In the specification, “parallel” refers to a state in which an angle formed by two straight lines is above −10° and below 10°, and thus also includes a state in which the angle is above −5° and below 5°. In addition, “perpendicular” refers to a state in which an angle formed by two straight lines is above 80° and below 100°, and thus also includes a state in which the angle is above 85° and below 95°.
In the specification, a “film” and a “layer” are interchangeable. For example, a “conductive layer” may be replaced with a “conductive film” sometimes. Similarly, an “insulation film” may be replaced with an “insulation layer” sometimes.
As shown in
However, in the above design in which a barrier dam (dam) is provided in the peripheral area of the display substrate to block the movement of the organic material forming the organic encapsulation layer, the organic layer material is likely to flow to the barrier dam and climb up along the barrier dam, and especially in the display substrate with a narrow bezel, since the distance between the organic encapsulation layer and the barrier dam is short, the climbing movement is more likely to occur. In some technologies, in a case that a thickness of the organic encapsulation layer at the edge of the active area is less than that at the center of the active area (i.e., the thickness of the organic encapsulation layer at the edge of the active area is thinner), when the organic encapsulation layer climbs at the barrier dam, the organic materials filled within the pixel openings at the edge of the active area will be less, and even no organic materials may be filled within some pixel openings, thus affecting the encapsulation performance. In addition, this climbing movement of the organic encapsulation layer also easily leads to gaps or fractures in the encapsulation structure layer, and water vapor in the atmosphere will enter the light emitting devices along the gaps, which will make the organic materials in the light emitting devices oxidized and invalid, and form invalid areas that cannot emit light. As vapor continuously intrudes the light emitting device along the crack, the invalid region gradually expands, resulting in poor display of the display apparatus, which is referred to as Growing Dark Spot (GDS). This climbing movement of organic encapsulation layer may also affect the subsequent processing process, for example, it may affect an exposure process of FMLOC (Flexible Multi-Layer On Cell), resulting in the display substrate failing to pass the reliability test.
An embodiment of the present disclosure proposes a display substrate. The display substrate includes an active area and a peripheral area located on the periphery of the active area, wherein a barrier dam and at least one barrier post are provided in the peripheral area. The display substrate includes a base substrate, and a light emitting structure layer and a encapsulation structure layer arranged on the base substrate, wherein the encapsulation structure layer is located on a side of the light emitting structure layer away from the base substrate, the light emitting structure layer includes a cathode, and the encapsulation structure layer includes an organic encapsulation layer. The at least one barrier post is located between the cathode and the barrier dam, and an orthographic projection of the at least one barrier post on the base substrate is located within a range of an orthographic projection of the organic encapsulation layer on the base substrate. Among them, orthographic projections of the at least one barrier post and the cathode of the light emitting structure layer on the base substrate may be not overlapped.
According to the display substrate of this example, by arranging at least one barrier post between the cathode and the barrier dam, at least one layer of barrier may be formed between the organic encapsulation layer and the barrier dam, which indirectly prolongs a distance between the organic encapsulation layer and the barrier dam, and may prevent the organic encapsulation layer from climbing up at the barrier dam and reduce a risk of overflow of the organic encapsulation layer. Moreover, the display substrate provided by the embodiment of the present disclosure may help to improve the planarization and encapsulation effect of the organic encapsulation layer at the edge of the display substrate, which may avoid the GDS defect caused by the introduction of water and oxygen into the display substrate through the organic encapsulation layer.
In some exemplary embodiments, the quantity of barrier dams in the peripheral area may be one or two, which is not limited by the present disclosure.
In some exemplary embodiments, the barrier dam may be arranged to surround the active area.
In some exemplary embodiments, the encapsulation structure layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer that are stacked. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer may cover the active area, the barrier post and the barrier dam; and the organic encapsulation layer may cover the active area and the barrier post, and an orthographic projection of the organic encapsulation layer on the base substrate may not overlapped with an orthographic projection of the barrier dam on the base substrate.
In some exemplary embodiments, the at least one barrier post may form at least one annular structure surrounding the active area. For example, one barrier post may form an annular structure surrounding the active area. In some examples, a shape of the annular structure may be circular, rectangular, and elliptical or in another shape. For example, an orthographic projection of the annular structure on the base substrate may be a continuous closed ring; or the orthographic projection on the base substrate is a discontinuous annular structure, for example, the annular structure may include a plurality of components. There are spacings between the plurality of components, and the plurality of components collectively form an annular shape surrounding the active area.
In some embodiments, as shown in
In some exemplary embodiments, the peripheral area may be provided with a plurality of barrier posts, which may be sequentially arranged along a direction away from the active area. For example, each of the plurality of barrier posts may form an annular structure surrounding the active area, thereby forming a multilevel barrier to the organic encapsulation layer in the peripheral area. A size of the annular structure formed by each barrier post may be different, and a plurality of barrier posts are distributed in a plurality of annular shapes between the cathode and the barrier dam. Shapes of the plurality of annular structures formed by the plurality of barrier posts may be the same or at least partially different. For example, the plurality of annular structures formed by the plurality of barrier posts may all be closed rings, or the plurality of annular structures formed by the plurality of barrier posts may all be discontinuous annular structures; or the annular structure formed by at least one of the plurality of barrier posts is a closed ring, and the annular structure formed by at least one barrier post is a discontinuous annular structure. This embodiment is not limited thereto.
In some exemplary embodiments, a cross section of the at least one barrier post may be arranged in a shape of an inverted trapezoid. For example, the barrier post may be arranged around the active area, and a cross section of the barrier post is perpendicular to a plane in which the active area lies. A tangential plane of the barrier post in a direction away from the active area and perpendicular to its own extending direction (or a tangential direction of a point on the barrier post) and perpendicular to the plane where the active area is located is set as a cross section of the barrier post, and the cross section of the barrier post is arranged to be an inverted trapezoid. The cross section of the barrier post in this example is a plane perpendicular to the plane where the display substrate is located and perpendicular to the direction extension of the barrier post. The cross section of the barrier post is arranged to be an inverted trapezoid in this example, which may be beneficial for a better prevention of the flow of the organic encapsulation layer. In other implementations, the cross section of the barrier post may also be arranged to be in other shapes, such as polygons of other shapes, for example, trapezoids or the like.
In some exemplary embodiments, at least one barrier post is arranged between the active area and the barrier dam, each of which is arranged to be a continuous and closed annular structure, i.e. a closed ring.
In some exemplary embodiments, the quantity of barrier posts may be less than or equal to 10. In some examples, the quantity of barrier posts may be less than or equal to 5, for example, 3. For example, one to five barrier posts with annular structures may be arranged between the cathode and the barrier dam, i.e. one to five levels of barrier may be formed between the active area and the barrier dam. The quantity of barrier posts is not limited in the present embodiment, for example, different quantities of barrier posts may be arranged between the cathode and the barrier dam according to actual needs.
In some exemplary embodiments, a furthest distance between a surface of a side of the barrier post close to the active area and a surface of a side of the barrier post away from the active area may be set to be from 1 micron to 7 microns; and a distance between a surface of the barrier post away from the base substrate and a surface close to the base substrate may be set to be from 0.5 microns to 5 microns. In one example, a furthest distance between a surface of a side of the barrier post close to the active area and a surface of a side of the barrier post away from the active area may be set to be from 2 micron to 5 microns; and a distance between a surface of the barrier post away from the base substrate and a surface close to the base substrate may be set to be from 1 microns to 3 microns. In this example, a width of the barrier post may be set to be the maximum size of the barrier post in a direction from the active area to the peripheral area, i.e. a length of an orthographic projection of the barrier post on the base substrate along a direction from the peripheral area towards the active area is the farthest distance between the surface of a side of the barrier post close to the active area and the surface of a side of the barrier post away from the active area. A height of the barrier post may be set to be a vertical distance between a surface away of the barrier post from the base substrate and a surface of the barrier post close to the base substrate.
In some exemplary embodiments, at least one barrier post may include a plurality of sub-barrier posts, there may be spacings between adjacent sub-barrier posts, and the plurality of sub-barrier posts may surround the active area. For example, the plurality of sub-barrier posts may form discontinuous annular structures surrounding the active area. In this implementations, the orthographic projection of at least one barrier post on the base substrate may not be a closed ring, and the spacings between adjacent sub-barrier posts may form a notch of an annular structure. In some examples, the quantity of sub-barrier posts included by the barrier posts, as well as shapes, sizes, and spacings of the sub-barrier posts, may be set as required, which is not limited in the present disclosure.
In some exemplary embodiments, at least one barrier post of the peripheral area may include a first barrier post, a second barrier post, and a third barrier post arranged sequentially along a direction away from the active area. Along the direction away from the active area, the sub-barrier posts of the first barrier post may be aligned with the sub-barrier posts of the third barrier post, and the spacing between the sub-barrier posts of the first barrier post may be aligned with the sub-barrier posts of the second barrier post.
In some examples, the minimum distance between two cross sections of the sub-barrier post is referred to as a length of the sub-barrier post, i.e. the minimum distance of the surfaces between adjacent spacings which the sub-barrier post faces. In some exemplary implementations, the spacings between the sub-barrier posts of the first barrier post are aligned with the sub-barrier posts of the second barrier post, and the length of the sub-barrier posts of the second barrier post is greater than a length of the spacings between the sub-barrier posts of the first barrier post.
In some examples, the first barrier post, the second barrier post, and the third barrier post may form a first annular structure, a second annular structure, and a third annular structure, respectively, around the active area. Since there are spacings between the sub-barrier posts of each barrier post, orthographic projections of the first ring structure, the second annular structure and the third annular structure on the base substrate are discontinuous or closed rings with spacings, and the discontinuous positions correspond to the spacings between the sub-barrier posts respectively. Along a direction away from the active area, the sub-barrier posts of the first barrier post and the sub-barrier posts of the third barrier post may be aligned, i.e. along a direction away from the active area, discontinuous positions of the orthographic projections of the first annular structure and the third annular structure on the base substrate are corresponding. The spacings between the sub-barrier posts of the first barrier posts may be aligned with the sub-barrier posts of the second barrier posts, and the lengths of the sub-barrier posts of the second barrier posts may be greater than the spacings between the sub-barrier posts of the first barrier posts, i.e., along a direction away from the active area, an orthographic projection of the sub-barrier posts of the second barrier post on the base substrate may correspond to discontinuous positions of the orthographic projections of the first annular structure and the third annular structure on the base substrate. With the cooperation of the first annular structure, the second annular structure and the third annular structure, a complete closure of the active area may be formed, so that there is no vacancy along various directions away from the active area.
In some exemplary embodiments, at least one sub-barrier post of the at least one barrier post may include a main body portion and a protrusion portion extending from a side of the main body portion towards the active area. By arranging the sub-barrier post to include the main body portion and a protruding portion extending from a side of the main body portion towards the active area, a greater blocking effect may be achieved on the flow of the organic encapsulation layer.
In some exemplary embodiments, a width of the main body portion is used to represent a width of the sub-barrier posts, i.e. the farthest distance between surfaces of a side of the main body portions of the sub-barrier posts close to the active area and surfaces of a side of the main body portions of the sub-barrier posts away from the active area may be set to be from 1 micron to 7 microns; a height of the main body portions is used to represent a height of the sub-barrier posts, that is, a distance between the surfaces of the main body portions of the sub-barrier post away from the base substrate and the surfaces close to the base substrate may be set to be from 0.5 microns to 5 microns.
In some exemplary embodiments, the furthest distance between surfaces of a side of the main body portions of the sub-barrier posts close to the active area and surfaces of a side of the main body portions of the sub-barrier posts away from the active area may be set to be from 2 microns to 5 microns, and a distance between surfaces of the main body portions of the sub-barrier post away from the base substrate and surfaces close to the base substrate may be set to be from 1 microns to 3 microns.
In some exemplary embodiments, widths of protrusion portions of the sub-barrier posts, i.e. the farthest distance between surfaces of the protrusion portions of a side of the sub-barrier posts close to the active area and surfaces of a side of the main body portions of the sub-barrier post close to the active area, may be set to be from 1 micron to 7 microns; heights of the protrusion portions of the sub-barrier post, i.e. a distance between surfaces of the protrusion portions of the sub-barrier post away from the base substrate and surfaces close to the base substrate, may be set to be from 0.5 microns to 5 microns; and lengths of the protrusion portions of the sub-barrier posts is the minimum distance between two cross sections of the protrusion portions of the sub-barrier posts. The sizes of the main body portions and the protrusion portions of the sub-barrier posts may be set as required, which is not limited in the present disclosure.
In some exemplary embodiments, the at least one barrier post may include a fourth barrier post and a fifth barrier post arranged sequentially along a direction away from the active area, wherein protrusion portions of a sub-barrier post of the fifth barrier post face spacings between the sub-barrier posts of the fourth barrier post.
In some exemplary implementations, lengths of the sub-barrier posts of the fifth barrier post may be greater than the spacings between the sub-barrier posts of the fourth barrier post. The fourth barrier post and the fifth barrier post may form a fourth annular structure and a fifth annular structure surrounding the active area, respectively, and the protrusion portions of the sub-barrier posts are all directed towards the active area. Along the direction away from the active area, an orthographic projection of the sub-barrier posts of the fifth barrier posts on the base substrate corresponds to discontinuous positions of an orthographic projection of the fourth annular structure on the base substrate. With the cooperation of the fourth annular structure and the fifth annular structure, a complete closure of the active area is formed, and there is no vacancy along a plurality of directions away from the active area. The protruding portions of the sub-barrier posts are directed towards the active area, which may better block the movement of the organic encapsulation layer.
In some exemplary embodiments, the display substrate may further include a pixel planarization layer located on a side of the light emitting structure layer close to the base substrate, and an orthographic projection of the at least one barrier post on the base substrate may be partially overlapped with an orthographic projection of the pixel planarization layer on the base substrate.
In some exemplary implementations, the orthographic projection of the pixel planarization layer on the base substrate may not be overlapped with the orthographic projection of the barrier posts on the base substrate, or the orthographic projection of the pixel planarization layer on the base substrate may contain an orthographic projection of at least one of the plurality of barrier posts close to the active area on the base substrate. In a case that a plurality of barrier posts are provided, the orthographic projection of one or more barrier posts on the base substrate may be set to be within a range of the orthographic projection of the pixel planarization layer on the base substrate.
In some embodiments, the barrier dam may be made of a resin material, may be made of the same material as the pixel planarization layer, and may be formed in the same process as the pixel planarization layer.
Technical contents of the present disclosure will be described below through exemplary embodiments.
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In some examples, the widths of the three barrier posts may be approximately the same, and the width of each barrier post may be set to be d1. For example, the width d1 of a single barrier post may be about 2 microns to 5 microns. An orthographic projection of the first barrier post 501 on the base substrate 101 may be within a range of an orthographic projection of the pixel planarization layer 103 on the base substrate 101. The quantity of the barrier posts is not limited in the present embodiment, which may be, for example, set as required.
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In some other implementations, the barrier posts described in
A structure of the display substrate according to the present disclosure will be described below through an example of a preparation process of the display substrate. A “patterning process” mentioned in the present disclosure includes processes such as deposition of a film layer, photoresist coating, mask exposure, development, etching, and photoresist stripping. The deposition may be any one or more of sputtering, evaporation, and chemical vapor deposition, the coating may be any one or more of spray coating and spin coating, and the etching may be any one or more of dry etching and wet etching. A “thin film” refers to a layer of a thin film prepared from a material on an underlay substrate using a process of deposition or coating. If the “thin film” does not need a patterning process in an entire manufacturing process, the “thin film” may also be called a “layer”. If the “thin film” needs a patterning process in the entire manufacturing process, the “thin film” is called a “thin film” before the patterning process and is called a “layer” after the patterning process. The “layer” after the patterning process includes at least one “pattern”. “A and B are arranged in a same layer” mentioned in the present disclosure means that A and B are simultaneously formed through a same patterning process. “An orthographic projection of A includes an orthographic projection of B” means that the orthographic projection of B falls within a range of the orthographic projection of A, or the orthographic projection of A covers the orthographic projection of B.
Hereinafter, a manufacturing process of a display substrate is described with reference to
(1) A base substrate 101 is prepared. In some examples, the base substrate 101 may be a flexible underlay substrate. For example, the base substrate 101 may include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer and a second inorganic material layer which are stacked on a glass carrier plate. The first flexible material layer and the second flexible material layer may be made of polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film, etc; the first inorganic material layer and the second inorganic material layer may be made of silicon nitride (SiNx) or silicon oxide (SiOx), etc. to improve water and oxygen resistance of the base substrate, and the first inorganic material layer and the second inorganic material layer are also called barrier layers; and the semiconductor layer may be made of amorphous silicon (a-si). After this process, both the active area AA and the peripheral area PA include the base substrate 101.
(2) A drive structure layer 102 is prepared on the base substrate 101. In some exemplary implementations, the drive structure layer of the active area AA may include a pixel drive circuit, which may include, for example, a plurality of transistors and at least one capacitor. The drive structure layer of the peripheral area PA may include a composite insulation layer composed of a plurality of inorganic insulation layers.
In some exemplary implementations, a manufacturing process of the drive structure layer may include following acts.
A first insulation thin film and an active layer thin film are sequentially deposited on the base substrate 101 and the active layer thin film is patterned by a patterning process to form a first insulation layer 11 covering the entire base substrate 101 and a pattern of an active layer arranged on the first insulation layer 11, and the active layer 12 may be formed in the active area AA. After this patterning process, the peripheral area PA may include the first insulation layer 11 arranged on the base substrate 101.
Then, a second insulation thin film and a first metal thin film are sequentially deposited and the first metal thin film is patterned through a patterning process to form the second insulation layer 13 covering the pattern of the active layer and a pattern of a first gate metal layer arranged on the second insulation layer 13, the pattern of the first gate metal layer may be formed in the active area AA and may include a gate electrode 14, a first capacitor electrode 41, a plurality of gate lines (not shown), and a plurality of gate leads (not shown). After this patterning process, the peripheral area PA may include the first insulation layer 11 and the second insulation layer 13 that are stacked on the base substrate 101.
Then, a third insulation thin film and a second metal thin film are sequentially deposited and the second metal thin film is patterned through a patterning process to form the third insulation layer 15 covering the first gate metal layer and a pattern of a second gate metal layer arranged on the third insulation layer 15, the pattern of the second gate metal layer is formed in the active area AA and may include a second capacitor electrode 42 and a second gate lead (not shown), a position of the second capacitor electrode 42 corresponds to a position of the first capacitor electrode 41. After this patterning process, the peripheral area PA may include the first insulation layer 11, the second insulation layer 13, and the third insulation layer 15 that are stacked on the base substrate 101.
Then, a fourth insulation thin film is deposited, the fourth insulation thin film is patterned by a patterning process to form a pattern of a fourth insulation layer 16 covering the second gate metal layer, wherein the fourth insulation layer 16 is provided with two first vias which are formed in the active area AA. Positions of the two first vias correspond to positions of two ends of the first active layer 12. The fourth insulation layer 16, the third insulation layer 15 and the second insulation layer 13 within the two first vias are etched away to expose parts of surfaces of the active layer 12. After this patterning process, the peripheral area PA includes the first insulation layer 11, the second insulation layer 13, the third insulation layer 15, and the fourth insulation layer 16 that are stacked on the base substrate 101.
Subsequently, a third metal thin film is deposited, the third metal film is patterned by a patterning process, and a pattern of a source-drain metal layer is formed on the fourth insulation layer 16. The source-drain metal layer of the active area AA may include a source electrode 17, a drain electrode 18, and a plurality of data lines (not shown), and the source electrode 17 and the drain electrode 18 are connected to the active layer 12 through the first via, respectively. After this patterning process, the peripheral area PA includes the first insulation layer 11, the second insulation layer 13, the third insulation layer 15 and the fourth insulation layer 16 which are stacked on the flexible underlay substrate 10, and a low-voltage line 306 arranged on the fourth insulation layer 16. In some exemplary implementations, the source-drain metal layer may further include any one or more of a power supply line (VDD), a compensation line, and an auxiliary cathode according to actual needs. The source-drain metal layer is also called a first source-drain metal layer (SD1).
So far, manufacturing of the pattern of the drive structure layer on the flexible underlay substrate 10 is achieved. The active layer 12, the gate electrode 14, the source electrode 17 and the drain electrode 18 may form a first transistor, and the first capacitor electrode 41 and the second capacitor electrode 42 may form a first storage capacitor. In an exemplary implementation mode, the first transistor may be a Thin Film Transistor (TFT).
(3) A first planarization thin film is coated on the base substrate forming the aforementioned pattern to form a pixel planarization layer 103, and a second via, a first partition and a second partition are formed in the pixel planarization layer 103 by a patterning process, wherein the second via is formed in the active area AA, which may expose a part of the surface of the drain electrode of the first transistor, and the first partition and the second partition are formed in the peripheral area PA. The pixel planarization layer 103 within the first partition is removed by development, which may expose the surface of the low-voltage line 306, and the pixel planarization layer 103 within the second partition is removed by development to expose the surface of the fourth insulation layer 16. The pixel planarization layer 103 between the first partition and the second partition may be referred to as a first dam foundation, which is a component of the barrier dam 201. In the present disclosure, when the second partition is formed in the peripheral area PA for subsequent encapsulations, the inorganic layer in the encapsulation layer directly contacts the fourth insulation layer 16, thus ensuring the packaging effect and process quality.
(4) A transparent conductive thin film is deposited on the base substrate on which the aforementioned pattern is formed, and the transparent conductive film is patterned by a patterning process to form a pattern of an anode layer. The anode layer may include patterns of an anode 301 and a connection electrode 305, wherein the anode 301 is formed on the pixel planarization layer 103 of the active area AA and is connected to a drain electrode of the first transistor through the second via on the pixel planarization layer 103, and the connection electrode 305 is formed in the peripheral area PA and is connected to the low-voltage line 306.
(5) A pixel definition thin film is coated on the base substrate on which the aforementioned pattern is formed, and patterns of a pixel definition layer 304, and a second dam foundation are formed through masking, exposure and development processes, wherein the pixel definition layer 304 is formed in the active area AA and is provided thereon with a pixel opening, and the pixel definition thin film within the pixel opening is developed away to expose a surface of the anode 301. A second dam foundation is formed in the peripheral area PA and is located over the first dam foundation, and the second dam foundation is a component of the barrier dam 201.
(6) A light emitting layer 302 and a cathode layer (e.g. including cathode 303) are formed sequentially on the base substrate on which the aforementioned pattern is formed. In some examples, the light emitting layer 302 may include a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and an electron injection layer that are stacked, and the light emitting layer 302 may be formed within the pixel opening of the active area AA and is connected to the anode 301. Since the anode 301 is connected to the drain electrode of the transistor, the light emitting control of the light emitting layer 302 is achieved. One portion of the cathode 303 is connected to the light emitting layer, and after the other portion of the cathode 303 covers the pixel definition layer 304, it extends to the peripheral area PA and is connected to the connection electrode 305 in the peripheral area PA. Since the connection electrode 305 is connected to the low-voltage line 306, it is achieved that the cathode 303 is connected to the low-voltage line 306.
(7) A barrier post thin film is coated on the base substrate on which the aforementioned pattern is formed, and patterns of at least one barrier post 5 and a third dam foundation are formed in the peripheral area PA through masking, exposure and development processes. For example, a plurality of barrier posts 5 may be located between the barrier dam 201 and the cathode 303, and a cross section of at least one of the barrier posts 5 may be in a shape of an inverted trapezoid. The third dam foundation may be located above the second dam foundation and is a component of the barrier dam 201. For example, the first dam foundation, the second dam foundation, and the third dam foundation are stacked sequentially to form a barrier dam 201, which may have a trapezoidal cross-sectional shape. As described above, when both the barrier post thin film and the pixel definition layer are made of polyimide, they may be formed in the same layer by the same preparation process.
(8) an encapsulation structure layer is formed on the base substrate on which the aforementioned pattern is formed. In some examples, the encapsulation structure layer is formed in the active area AA and the peripheral area PA, which may adopt a stacked structure of inorganic material/organic material/inorganic material. Two inorganic material layers (i.e., the first inorganic encapsulation layer 401 and the second inorganic encapsulation layer 403) may be arranged in the active area AA and the peripheral area PA to wrap the barrier post 5 and the barrier dam 201, and the organic material layer (i.e., the organic encapsulation layer 402) is arranged between the two inorganic material layers, and is located on a side of the barrier dam 201 away from the peripheral area PA to cover the barrier post 5.
In some examples, the materials of the first inorganic encapsulation layer 401 and the second inorganic encapsulation layer 403 may include materials having a water and oxygen blocking effect, for example, silicon nitride, silicon oxide, silicon carbide (SiC), aluminum oxide (Al2O3), ZnS, ZnO and the like. The first inorganic encapsulation layer 401 and the second inorganic encapsulation layer 402 may be formed by means of chemical vapor deposition (CVD), atomic layer deposition (ALD) and other deposition modes. The material of the organic encapsulation layer 402 may be a mixture of a Monomer organic main body (more than 95% in volume) and a photoinitiator, a reactive diluent, various additives and the like, and can be formed into a film by ink jet printing and solidified under ultraviolet light irradiation to form the organic encapsulation layer 402.
(9) The glass carrier plate is stripped to form the display substrate according to an embodiment of the present disclosure, as shown in
In other implementations, the barrier dams may be prepared by other means, and two barrier dams may be provided in the peripheral area as required, and the quantity of barrier dams and the preparation method are not limited in the disclosed embodiment. In other implementations, a source-drain metal layer (double SD) structure with two layers may be adopt, which is not limited in the present disclosure.
In this example, the first insulation thin film, the second insulation thin film, the third insulation thin film and the fourth insulation thin film may be made of any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), and may be a single layer, a plurality of layers, or a composite layer. The first insulation layer may be referred to as a buffer layer, which is used to improve the water and oxygen resistance capability of the underlay substrate. The second insulation layer and the third insulation layer may be referred to as gate insulation (GI) layers. The fourth insulation layer may be referred to as an interlayer insulation (ILD) layer. The first metal thin film, the second metal thin film, and the third metal thin film may be made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy material of the above metals, such as AlNd alloy or MoNb alloy, which may have a single-layer structure or a multi-layer composite structure, such as Mo/Cu/Mo. The pixel planarization layer 15 may be made of an organic material. The cathode may be made of any one or more of Magnesium (Mg), Argentum (Ag), Aluminum (Al), Copper (Cu), and Lithium (Li), or an alloy made of any one or more of the aforementioned metals. An active layer thin film may be made of an amorphous Indium Gallium Zinc Oxide (a-IGZO), Zinc OxyNitride (ZnON), Indium Zinc Tin Oxide (IZTO), amorphous Silicon (a-Si), polycrystalline Silicon (p-Si), hexathiophene, polythiophene and other materials, that is, the present disclosure is applicable to transistors manufactured based on an oxide technology, a silicon technology, and an organic matter technology. The transparent conductive thin film may be made of indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel definition layer may be made of polyimide, acrylic or polyethylene terephthalate, and the barrier post thin film may be made of polyimide, polysilane, acrylic or epoxy resin.
In some embodiments, both the barrier post thin film and the pixel definition layer are made of polyimide, including the same material.
The structure of the display substrate of an embodiment of the present disclosure and the manufacturing process thereof are described only as an example. In some examples, a corresponding structure may be changed and a patterning process may be increased or decreased according to actual needs.
An embodiment of the present disclosure further provides a preparation method for a display substrate. The preparation method includes following acts. A light emitting structure layer is formed on the base substrate of the active area, and a barrier dam and at least one barrier post are formed on the base substrate of a peripheral area, respectively, wherein the light emitting structure layer includes a cathode, and the at least one barrier post is located between the cathode and the barrier dam; an encapsulation structure layer is formed on the display substrate on which the above-mentioned structure is formed, and an orthographic projection of the at least one barrier post on the base substrate is within a range of an orthographic projection of an organic encapsulation layer of the encapsulation structure layer on the base substrate.
In this example, at least one barrier post is arranged between the cathode and the barrier dam, so that at least one layer of barrier is formed between the organic encapsulation layer and the barrier dam, which indirectly prolongs a distance between the organic encapsulation layer and the barrier dam, and may prevent the organic encapsulation layer from climbing up at the barrier dam and reduce a risk of overflow of the organic encapsulation layer. Moreover, the preparation method of the display substrate provided by an embodiment of the present disclosure may help to improve the planarization and encapsulation effect of the organic encapsulation layer at the edge of the display substrate, which may avoid the GDS defect caused by the introduction of water and oxygen through the organic encapsulation layer.
The embodiment also provides a display substrate, including a base substrate, an encapsulation structure layer, a barrier dam, and at least one barrier post. The base substrate includes an active area and a peripheral area located on a periphery of the active area. The encapsulation structure layer is arranged on the base substrate, located in the active area and the peripheral area, and includes an organic encapsulation layer. The barrier dam and the at least one barrier post are located in the peripheral area, and the at least one barrier post is located on a side of the barrier dam close to the active area. The organic encapsulation layer has a gradient area in the peripheral area, and an orthographic projection of the gradient area of the organic encapsulation layer on the base substrate is overlapped with an orthographic projection of the at least one barrier post on the base substrate.
The display substrate provided by the embodiment may form at least one level of barrier on a side of the organic encapsulation layer close to the barrier dam by forming at least one barrier post overlapping with the gradient area of the organic encapsulation layer, so that the organic encapsulation layer from climbing up to the barrier dam during the preparation process may be effectively prevented, the overflow risk of the organic encapsulation layer may be reduced, and may also help to improve the planarization and encapsulation effect of the organic encapsulation layer, which may prevent water and oxygen from passing into the display substrate through the organic encapsulation layer to form GDS defects.
In some exemplary implementations, an orthographic projection of the organic encapsulation layer on the base substrate is not overlapped with an orthographic projection of the barrier dam on the base substrate.
In some exemplary implementations, the above display substrate may further include a light emitting structure layer located on the base substrate, and the light emitting structure layer is located on a side of the encapsulation structure layer close to the base substrate. The light emitting structure layer includes a cathode layer, and an orthographic projection of the cathode layer on the base substrate is not overlapped with an orthographic projection of the at least one barrier post on the base substrate.
In some exemplary implementations, the at least one barrier post includes a plurality of sub-barrier posts with spacings between adjacent sub-barrier posts. For example, when the barrier post includes a plurality of disconnected sub-barrier posts, the barrier post may form a discontinuous annular structure around the active area.
In some exemplary implementations, the peripheral area at least includes two adjacent barrier posts arranged sequentially along the direction away from the active area. Spacings between adjacent sub-barrier posts of one of the two barrier posts close to the active area is aligned with sub-barrier posts of one of the two barrier posts away from the active area. For example, in
In some exemplary implementations, at least one sub-barrier post of the at least one barrier post includes a main body portion and a protrusion portion extending from a side of the main body portion towards the active area. Protrusion portions of the sub-barrier posts of the barrier post away from the active area face spacings between adjacent sub-barrier posts of the barrier post close to the active area. For example, in
In some exemplary implementations, the at least one barrier post is a closed annular structure surrounding the active area. For example, in
In some exemplary implementations, the peripheral area may include four sub-areas of the upper, lower, left and right, and the at least one barrier post may be arranged in at least one of the sub-areas. In some examples, barrier posts may be provided in two sub-areas arranged opposite to each other. For example, barrier posts may be arranged in the left and right sub-areas.
Relevant description of the display substrate of the present embodiment may refer to the descriptions in the aforementioned embodiments, and thus will not be repeated here.
The embodiment further provides a display apparatus which includes the display substrate using the aforementioned embodiments. In some examples, the display apparatus may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a laptop computer, a digital photo frame, and a navigator.
Although the implementations disclosed in the present disclosure are as above, the described contents are only implementations used for convenience of understanding the present disclosure and are not intended to limit the present disclosure. Any skilled person in the art to which the present invention pertains can make any modifications and alterations in forms and details of implementations without departing from the spirit and scope of the present disclosure. However, the patent protection scope of the present disclosure should be subject to the scope defined by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202210108262.4 | Jan 2022 | CN | national |
The present application is a U.S. National Phase Entry of International PCT Application No. PCT/CN2023/072919 having an international filing date of Jan. 18, 2023, which claims priority to Chinese Patent Application No. 202210108262.4 filed on Jan. 28, 2022 and entitled “Display Substrate and Preparation Method therefor, and Display Apparatus”. The above-identified applications are incorporated by reference herein in their entireties.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2023/072919 | 1/18/2023 | WO |
