This is a National Phase Application filed under 35 U.S.C. 371 as a national stage of PCT/CN2019/121249, filed on Nov. 27, 2019, the content of which is hereby incorporated by reference in its entirety.
The present disclosure belongs to the field of display technology, and particularly relates to a display substrate and a display device.
The micro inorganic light emitting diode technology is a new generation display technology, and has higher brightness, better luminous efficiency and lower power consumption compared with the existing OLED technology. However, since the manufacturing process of a micro inorganic light emitting diode display substrate is complicated, and micro inorganic light emitting diodes are formed on the display substrate by a transfer printing method, a large electrostatic discharge (ESD) occurs in the manufacturing process of the micro inorganic light emitting diode display substrate, and how to reduce the ESD is an urgent technical problem to be solved.
The present disclosure is directed to at least one of the problems in the related art, and provides a display substrate and a display device.
In a first aspect, an embodiment of the present invention provides a display substrate, which includes:
In an embodiment, the signal supply circuit and the redundant signal supply circuit of each signal supply module are electrically coupled to at least one of the plurality of pixel units through at least one of the plurality of signal lines.
In an embodiment, each of the plurality of pixel units includes a plurality of sub-pixels; the plurality of signal lines include data line groups, and each of the data line groups includes a plurality of data lines; pixel units in a same column are coupled with a same data line group, sub-pixels in a same column are coupled with a same data line, and sub-pixels in different columns are coupled with different data lines;
In an embodiment, the display substrate further includes: a data voltage introduction line, a first electrostatic ring structure and a second electrostatic ring structure;
In an embodiment, each of the first electrostatic ring structure and the second electrostatic ring structure includes a first electrostatic transistor, a second electrostatic transistor, a third electrostatic transistor and a fourth electrostatic transistor;
In an embodiment, resistance values of the first protection resistor, the second protection resistor, the third protection resistor and the fourth protection resistor are all between 400Ω and 500Ω.
In an embodiment, the pixel unit includes three sub-pixels; the data line group includes three data lines.
In an embodiment, the first data selector and the second data selector are on a side of the base substrate where signal input terminals of the data lines are located.
In an embodiment, the signal lines include gate lines; the pixel units in a same row are coupled with a same gate line; the signal supply circuit of each of the signal supply modules includes a first shift register, and the redundant signal supply circuit includes a second shift register; the first shift register and the second shift register are arranged in pairs and coupled to a same gate line; and
In an embodiment, the gate line is coupled with two signal supply modules, and the two signal supply modules are coupled to two opposite ends of the gate line, respectively.
In an embodiment, in the signal supply modules, a plurality of first shift registers are coupled in cascade, and a plurality of second shift registers are coupled in cascade; stages of first shift registers are respectively coupled with different gate lines; stages of second shift registers are respectively coupled with different gate lines;
In an embodiment, only one of the signal supply circuit and the redundant signal supply circuit of each of the signal supply modules is electrically coupled to at least one of the plurality of pixel units through at least one of the plurality of signal lines.
In an embodiment, each of the plurality of pixel units includes a plurality of sub-pixels; the plurality of signal lines include data line groups, and each of the data line groups includes a plurality of data lines; pixel units in a same column are coupled with a same data line group, sub-pixels in a same column are coupled with a same data line, and sub-pixels in different columns are coupled with different data lines;
In an embodiment, the display substrate further includes: a data voltage introduction line, a first electrostatic ring structure and a second electrostatic ring structure;
In an embodiment, each of the first electrostatic ring structure and the second electrostatic ring structure includes a first electrostatic transistor, a second electrostatic transistor, a third electrostatic transistor and a fourth electrostatic transistor;
In an embodiment, the first data selector and the second data selector are on a side of the base substrate where signal input terminals of the data lines are located.
In an embodiment, the signal lines include gate lines; pixel units in a same row are coupled with a same gate line; the signal supply circuit of each of the signal supply modules includes a first shift register, and the redundant signal supply circuit includes a second shift register; the first shift register and the second shift register are arranged in pairs and correspond to a same gate line; and
In an embodiment, the gate line is coupled with two signal supply modules, and the two signal supply modules are coupled to two opposite ends of the gate line, respectively.
In an embodiment, in the signal supply modules, a plurality of first shift registers are coupled in cascade, and a plurality of second shift registers are coupled in cascade; stages of first shift registers are respectively coupled with different gate lines; stages of second shift registers are respectively coupled with different gate lines;
In an embodiment, the pixel unit includes a light emitting device; the light emitting device includes: a micro inorganic light emitting diode.
In a third aspect, an embodiment of the present invention provides a display panel, which includes the display substrate described above.
In order that those skilled in the art can better understand technical solutions of the present disclosure, the present disclosure will be further described in detail below with reference to the accompanying drawings and specific implementations.
Unless defined otherwise, technical or scientific terms used herein shall have their ordinary meanings as understood by one of ordinary skill in the art to which this disclosure belongs. The use of “first,” “second,” and the like in this disclosure is not intended to indicate any order, quantity, or importance, but is used to distinguish one element from another. Also, the use of the terms “a,” “an”, “the”, and the like does not denote a limitation of quantity, but denotes the presence of at least one. The word “comprise”, “include”, or the like, means that the element or item preceding the word includes the element or item listed after the word and its equivalent, but does not exclude other elements or items. The terms “connect” or “couple” and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Words “upper”, “lower”, “left”, “right”, and the like are used only to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
As shown in
As shown in
As shown in
Thereinafter, structures of the sub-pixel, the first shift register, and the first data selector will be described.
Transistors used in embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics, and since a source electrode and a drain electrode of the used transistor are symmetrical, there is no difference between the source electrode and the drain electrode. In the embodiments of the present disclosure, to distinguish the source electrode and the drain electrode of the transistor, one electrode is referred to as a first electrode, the other electrode is referred to as a second electrode, and a gate is referred to as a control electrode. In addition, transistors may be divided into N type transistors and P type transistors according to the characteristics of the transistors. In a case of adopting a P type transistor, the first electrode is the source electrode of the P type transistor, the second electrode is the drain electrode of the P type transistor, and when the gate electrode is applied with a low level, the source electrode and the drain electrode are conducted. In a case of adopting a N type transistor, the first electrode is the source electrode of the N type transistor, the second electrode is the drain electrode of the N type transistor, and when the gate electrode is applied with a high level, the source electrode and the drain electrode are conducted. N-type transistors are taken as examples of transistors in the pixel circuit and the first data selector described below, but it is appreciated that the implementation using P-type transistors can be conceived by those skilled in the art without creative efforts, and therefore is within the protection scope of the embodiments of the present disclosure; P-type transistors are taken as examples of transistors in the first shift register described below, and it is appreciated that the implementation using N-type transistors can be conceived by those skilled in the art without creative efforts, and therefore is within the protection scope of the embodiments of the present disclosure.
For each transistor adopting an N-type transistor, its working level signal terminal is a high level signal terminal VGH, and its non-working level signal terminal is a low level signal terminal VGL. For each transistor adopting a P-type transistor, its working level signal terminal is a low level signal end VGL, and its non-working level signal terminal is a high level signal terminal VGH.
Each sub-pixel at least includes a pixel circuit therein; as shown in
The light emitting device D may be an electric current type light emitting diode, and further may be an electric current type inorganic light emitting diode, such as a micro light emitting diode (Micro LED) or a mini light emitting diode (Mini LED), and of course, the light emitting device D in the embodiments of the present disclosure may also be an organic light emitting diode (OLED). One of the first and second electrodes of the light emitting device D is an anode and the other is a cathode.
It should be noted that, in a case where the light emitting device D is a micro inorganic light emitting diode, the third transistor has a larger channel width-to-length ratio than that in a case where the light emitting device D is an OLED, so as to meet driving requirement of the micro inorganic light emitting diode.
As illustrated in
As shown in
Specifically, one of the sixteenth transistor T16, the seventeenth transistor T17 and the eighteenth transistor T18 is controlled to be turned on through a timing signal output from the timing controller (not shown). When the timing controller controls the sixteenth transistor T16 to be turned on, a data voltage supplied by the source driver is supplied to the data line Data11 coupled to the sixteenth transistor T16 through the data voltage introduction line (four data voltage introduction lines, i.e., Data1′, Data2′, Data3′, Data 4′, are illustrated in
According to the above description of the structures of the parts of the display substrate, it can be seen that the structure of the display substrate with micro inorganic light emitting diodes is complicated, so that during manufacturing, the process is more complicated compared with manufacturing processes of a traditional liquid crystal display substrate and a traditional OLED display substrate, and thus, accumulation of electrostatic charges occurs in the manufacturing process. As a result, the channel of a transistor in the display substrate is broken down, and particularly, after the transistor in the pixel circuit is broken down, display of the display panel may have a point defect, line defect or area defect.
It should be further noted that, in a display substrate provided in the embodiments of the present disclosure, a signal supply circuit and a redundant signal supply circuit may have a same structure, or may have different circuit structures that implement a same function. In this way, when the signal supply circuit fails, the redundant signal supply circuit may supply the same signal to a pixel unit in the display substrate, and the signal supply circuit and the redundant signal supply circuit adopt the same structure, which facilitates the manufacturing of the display substrate. Of course, the signal supply circuit and the redundant signal supply circuit may have different structures, and in this case, the redundant signal supply circuit and the signal supply circuit need to have a same function. For convenience of understanding, the following embodiments will be described by taking a case where the signal supply circuit and the redundant signal supply circuit adopt a same structure.
In a first aspect, an embodiment of the present disclosure provides a display substrate, which includes a base substrate, and a pixel unit, a signal line, and a signal supply module that are disposed on the base substrate. In particular, in the embodiment of the present disclosure, each signal supply module S includes a signal supply circuit and a redundant signal supply circuit; the signal supply circuit and the redundant signal supply circuit of each signal supply module S are electrically coupled to at least one of a plurality of pixel units through at least one of a plurality of signal lines. That is, each signal supply module S is configured to supply a signal to a pixel unit to which a signal line coupled thereto is coupled.
Since the signal supply module S of the display substrate is provided with the redundant signal supply circuit in the embodiment of the present disclosure, even if one of the signal supply circuit and the corresponding redundant signal supply circuit is damaged due to electrostatic charge accumulation in the manufacturing process of the display panel, the other one can supply a corresponding signal to the signal line in the display substrate so as to ensure normal operation of the display substrate.
It should be noted that, the numbers of the signal supply circuit and the redundant signal supply circuit in each signal supply module S are both one. Of course, each signal supply module S may be correspondingly provided with one signal supply circuit and a plurality of redundant signal supply circuits. The embodiments of the present disclosure are described by taking a case where the signal supply circuit and the redundant signal supply circuit in the signal supply module S are provided in pairs, that is, the signal supply module S includes one signal supply circuit and one redundant signal supply circuit as an example. Before using the display substrate to form a display panel, the circuit structure that fails in each signal supply module S needs to be electrically disconnected with other electrical structures in the display substrate through a laser cutting process. Specifically, a connection line between an output terminal of the circuit structure that fails and the signal line(s) may be cut off, so that the circuit structure that fails is prevented from outputting an error signal to the signal line(s). Of course, if neither the signal supply circuit nor the redundant signal supply circuit in the signal supply module S fails, any one of the signal supply circuit and the redundant signal supply circuit in the signal supply modules S is electrically disconnected from the other electrical structure(s) in the display substrate to reduce the load of the display substrate.
In some embodiments, as shown in
The structures of the first shift register and the second shift register are the same as those of the above-described first shift register, and therefore, descriptions thereof are not repeated. It should be understood that the signal input terminal Input, the first clock signal terminal CLK, the second clock signal terminal CLKB, the high level signal terminal VGH, and the low level signal terminal VGL coupled to the second shift register are respectively the same as the signal input terminal Input, the first clock signal terminal CLK, the second clock signal terminal CLKB, the high level signal terminal VGH, and the low level signal terminal VGL of the first shift register corresponding thereto.
In some embodiments, the display substrate is a dual-side driving type display substrate, that is, one row of pixel units is driven by two first shift registers, and correspondingly, one row of pixel units corresponds to two second shift registers. Specifically, taking one row of pixel units as an example, the row of pixel units is coupled to one gate line Gate, the signal output terminals of the two first shift registers are respectively coupled to two ends of the gate line Gate, and the signal output terminals of the two second shift registers are also respectively coupled to the two ends of the gate line Gate, that is, the first shift registers and the second shift registers are arranged in a one-to-one correspondence manner. Thus, if one of the first shift register and the second shift register at one end of the gate line Gate is damaged, the gate line Gate may be provided with a gate scan signal through the other one. Of course, in the embodiment of the present disclosure, the two first shift registers may be positioned in a middle area of the display substrate, for example, the first shift register is positioned between two columns of pixel units, and the two first shift registers driving a same gate line are positioned between pixel units of different columns. The position of the first shift register is not limited in any way in the embodiments of the present disclosure.
Specifically, as shown in
In some embodiments, as shown in
For convenience of description, taking a case where each column of pixel units includes three columns of sub-pixels of three different colors, namely, red, green and blue as an example, a data line coupled to red sub-pixels in a same column is referred to as a data line Data11, and similarly, a data line coupled to green sub-pixels in a same column is referred to as a data line Data12, and a data line coupled to blue sub-pixels in a same column is referred to as a data line Data13. Hereinafter, the connection relationship between the data line Data11, the data line Data12, and the data line Data13, which are respectively coupled to the three columns of sub-pixels in the first column of pixel units, and the first and second data selectors will be specifically described.
Specifically, as shown in
In some embodiments, each of the first data selector and the second data selector may include the sixteenth transistor T16, the seventeenth transistor T17, and the eighteenth transistor T18, and the connection relationship between each transistor in the second data selector and the source driver, the timing controller, the data line Data11, the data line Data12, and the data line Data13 is the same as that in the first data selector. The connection relationship has already been described above, and is not described in detail here.
In some embodiments, the first data selector and the second data selector are both disposed at a side of the base substrate where the signal input terminals of the data lines Data are located.
In some embodiments, as shown in
In some embodiments, as shown in
In some embodiments, each of resistances of the first protection resistor, the second protection resistor, the third protection resistor and the fourth protection resistor is, but not limited to, between 400Ω and 500Ω.
As shown in
A first electrode of the first electrostatic transistor T19 is coupled to a control electrode thereof and the data voltage introduction line Data′, a second electrode of the first electrostatic transistor T19 is coupled to a first electrode and a control electrode of the second electrostatic transistor T20, and a second electrode of the second electrostatic transistor T20 is coupled to a low level signal terminal VGL; a first electrode of the third electrostatic transistor T21 is coupled to the data voltage introduction line Data1′, a second electrode of the third electrostatic transistor T21 is coupled to and a control electrode thereof and a first electrode of the fourth electrostatic transistor T22, and a second electrode of the fourth electrostatic transistor T22 is coupled to a control electrode thereof and a high operation level signal terminal VGH.
When a data introduced to the data voltage introduction line Data1′ is a negative high voltage, the first electrostatic transistor T19 and the second electrostatic transistor T20 are turned on, and static electricity is extracted through the low level signal terminal VGL of the branch where the first electrostatic transistor T19 and the second electrostatic transistor T20 are located.
When a data introduced from the data voltage introduction line Data1′ is a positive high voltage, the third electrostatic transistor T21 and the fourth electrostatic transistor T22 are turned on, and static electricity is extracted through the high level signal terminal VGH of the branch where the third electrostatic transistor T21 and the fourth electrostatic transistor T22 are located. It should be understood that the voltage value of the positive high voltage in this case should be generally greater than the value of the voltage input by the high level voltage terminal VGH coupled to the second electrode of the fourth electrostatic transistor T22.
The working principle of the second electrostatic ring structure is the same as that of the first electrostatic ring structure, and therefore, the description thereof is omitted.
In a second aspect, as shown in
According to the display substrate in the present embodiment of the present disclosure, after the above-described display substrate is subjected to failure detection, the circuit structure that fails in each signal supply module S is electrically disconnected from other electrical structures in the display substrate through a laser cutting process; specifically, the connection lines between the output terminal of the circuit structure that fails and the signal lines can be cut off, so as to prevent the circuit structure that fails from outputting an error signal to the signal lines. Of course, if neither the signal supply circuit nor the redundant signal supply circuit in the signal supply module S fails, any one of the signal supply circuit and the redundant signal supply circuit in the signal supply module S is electrically disconnected from other electrical structures in the display substrate, so as to obtain the display substrate in the present embodiment, so that the display substrate in the embodiment of the present disclosure has a higher yield.
In the embodiment of the present disclosure, the signal supply circuit in the signal supply module S may be the first shift register, and in this case the redundant signal supply circuit is the second shift register. Of course, the signal supply circuit in the signal supply module S in the embodiment of the present disclosure may be the first data selector, and in this case, the redundant signal supply circuit may be the second data selector. The first shift register, the second shift register, the first data selector and the second data selector may adopt the same structures as described above, and therefore, the descriptions thereof are not repeated. Other structures of the display substrate according to the embodiment of the present disclosure may also be the same as those of the above-described display substrate, and thus, the descriptions thereof are not repeated.
In a third aspect, an embodiment of the present disclosure further provides a display panel, which includes the display substrate. The display panel may be a liquid crystal display device or an electroluminescent display device, such as a liquid crystal panel, an OLED panel, a MicroLED panel, a MiniLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and any product or component with a display function.
It could be understood that the above embodiments are merely exemplary embodiments adopted for describing the principle of the present disclosure, but the present disclosure is not limited thereto. Various variations and improvements may be made by those of ordinary skill in the art without departing from the spirit and essence of the present disclosure, and these variations and improvements shall also be regarded as falling into the protection scope of the present disclosure.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2019/121249 | 11/27/2019 | WO |
Publishing Document | Publishing Date | Country | Kind |
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WO2021/102734 | 6/3/2021 | WO | A |
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