Patent Application
20240170625
This relates generally to electronic devices and, more particularly, to electronic devices with displays.
If care is not taken, the components used in displaying content may be bulky and may not exhibit desired levels of optical performance and power consumption.
An electronic device may have one or more displays that produce images for a user.
The display may include a display module that generates light and an optical system that redirects the light from the display module. The display module may include an illumination engine and a spatial light modulator such as a reflective display panel. The illumination engine may include an array of light-emitting diodes mounted to a semiconductor die with driver circuitry. The driver circuitry may independently drive each of the light-emitting diodes in the array using drive signals.
Each light-emitting diode in the array may include a plurality of independently addressable contact pads that are electrically connected to one of the diode terminals (e.g., either the anodes or cathodes) of the light-emitting diodes and a common contact pad that is electrically connected to the other diode terminals of the light-emitting diode. Effectively, the LED array may include independently addressable cathodes and a common anode or independently addressable anodes and a common cathode.
The common contact pad may be interposed between the driver die and the individually addressable contact pads. Alternatively, the individually addressable contact pads may be interposed between the driver die and the common contact pad. In other words, the individually addressable contact pads and the common contact pad may be vertically stacked to improve thermal dissipation.
Each LED array in the illumination engine may have a dedicated driver die or one driver die may be shared between multiple LED arrays. Each LED array may emit a single respective color of light or a single LED array may include LEDs of multiple different colors.
An illustrative system having a device with one or more display systems is shown in
The operation of system 10 may be controlled using control circuitry 16. Control circuitry 16 may include storage and processing circuitry for controlling the operation of system 10. Circuitry 16 may include storage such as hard disk drive storage, nonvolatile memory (e.g., electrically-programmable-read-only memory configured to form a solid state drive), volatile memory (e.g., static or dynamic random-access-memory), etc. Processing circuitry in control circuitry 16 may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, graphics processing units, application specific integrated circuits, and other integrated circuits. Software code (instructions) may be stored on storage in circuitry 16 and run on processing circuitry in circuitry 16 to implement operations for system 10 (e.g., data gathering operations, operations involving the adjustment of components using control signals, image rendering operations to produce image content to be displayed for a user, etc.).
System 10 may include input-output circuitry such as input-output devices 12. Input-output devices 12 may be used to allow data to be received by system 10 from external equipment (e.g., a tethered computer, a portable device such as a handheld device or laptop computer, or other electrical equipment) and to allow a user to provide device 10 with user input. Input-output devices 12 may also be used to gather information on the environment in which system 10 is operating. Output components in devices 12 may allow system 10 to provide a user with output and may be used to communicate with external electrical equipment. Input-output devices 12 may include sensors and other components 18 (e.g., image sensors for gathering images of real-world object that are digitally merged with virtual objects on a display in system 10, accelerometers, depth sensors, light sensors, haptic output devices, speakers, batteries, wireless communications circuits for communicating between system 10 and external electronic equipment, etc.). In one suitable arrangement that is sometimes described herein as an example, components 18 may include gaze tracking sensors. As an example, the gaze tracking sensors may include infrared or other light emitters that emit infrared light and image sensors that sense the infrared or other light reflected off of the user's eye (e.g., where the sensed light identifies the gaze direction of the user's eye).
Display modules 14A may include reflective displays (e.g., liquid crystal on silicon (LCOS) displays, digital-micromirror device (DMD) displays, or other spatial light modulators), emissive displays (e.g., micro-light-emitting diode (μLED) displays, organic light-emitting diode (OLED) displays, laser-based displays, etc.), or displays of other types. Light sources in display modules 14A may include μLEDs, OLEDs, LEDs, mini LEDs, lasers, combinations of these, or any other desired light-emitting components. In one suitable arrangement that is described herein as an example, display module 14A may include a spatial light modulator and an illumination engine. The illumination engine may generate illumination light. The spatial light modulator may spatially modulate illumination light to produce image light 22 (e.g., using images to be displayed by the image light). The arrays of light sources in display module 14A may be formed in the illumination engine and may produce the illumination light. The spatial light modulator 33 may be a transmissive or reflective spatial light modulator.
Optical systems 14B may form lenses. If desired, optical system 14B may contain components (e.g., an optical combiner, etc.) to allow real-world image light from real-world images or objects to be combined optically with virtual (computer-generated) images such as virtual images in image light 22. Optical system 14B may include collimating optics. If desired, display module 14A and/or optical system 14B may be mounted within support structure 20 of
System 10 may, if desired, include wireless circuitry and/or other circuitry to support communications with a computer or other external equipment (e.g., a computer that supplies display 14 with image content). During operation, control circuitry 16 may supply image content to display 14. The content may be remotely received (e.g., from a computer or other content source coupled to system 10) and/or may be generated by control circuitry 16 (e.g., text, other computer-generated content, etc.).
Arrays 40A, 40B, and 40C may each emit illumination light 35 of a corresponding wavelength range (e.g., color). For example, array 40A may emit red light, array 40B may emit green light, and array 40C may emit blue light. Prism 42 (sometimes referred to as an optical combiner) may combine the light emitted by arrays 40A, 40B, and 40C into illumination light 35 (e.g., illumination light 35 may include red, green, and blue light, etc.) and may provide illumination light 35 to spatial light modulator 33. Time multiplexing may also be used to provide red, green, and blue illumination light 35 to spatial light modulator 33. Lenses or other optical components may be interposed between arrays 40A, 40B, and/or 40C and prism 42 and/or between prism 42 and spatial light modulator 33.
Spatial light modulator 33 may include prism 46 and a reflective display panel such as display panel 44. Display panel 44 may include a DMD panel, an LCOS panel, or other reflective display panel. Prism 46 may direct illumination light 35 to display panel 44 (e.g., to different pixels on display panel 44). Control circuitry 16 (
If desired, the light sources (e.g., LEDs) in arrays 40A, 40B, and 40C may be independently adjusted (e.g., by control circuitry 16 of
In this way, control circuitry 16 may independently control the intensity, the emission duration, and/or duty cycles of light sources in arrays 40A, 40B, and 40C to control the brightness of illumination light 35 at different regions of display panel 44. For example, control circuitry 16 may independently control the intensity of the light sources in array portion 49 to control the amount of illumination light 35 provided to the pixels in region 48 of display panel 44. Similarly, control circuitry 16 may independently control the intensity, the emission duration, and/or duty cycles of the light sources in array portion 47 to control the amount of illumination light 35 provided to the pixels in region 45 of display panel 44. In this way, the brightness of different regions in the images of image light 22 may be independently controlled.
Including independently adjustable light sources in each array of illumination engine 31 may, for example, conserve power in display module 14A and provide a high quality image with enhanced dynamic range and contrast with locally-dimmed regions.
In general, each array may have any desired number of independently controllable light sources (e.g., every light source in each array may be independently controlled or groups of light sources in each array may be independently controlled). Arrays 40A, 40B, and 40C may be independently controlled (e.g., in addition to independently controlling different light sources within the arrays). In this way, display module 14A may perform local dimming of illumination light 35 and thus the images in image light 22 for any desired number of regions in the image, for regions of any desired size (e.g., for regions as small as one pixel), and in any desired color channels. This flexibility may serve to optimize the appearance of the images in image light 22 regardless of the contents of the images, while also optimizing consumption of resources in display module 14A, for example.
Substrate 54 may include driving circuitry 50 that drives the light sources 60 in array 40. Driver circuitry 50 may, for example, produce drive signals and power supply signals that are provided to the light sources in array 40 over conductive interconnect structures (paths) 52. The drive signals may be used to independently control each of the LEDs (or sets of the LEDs) in array 40. The same driver circuitry 50 may be used to drive each array 40 in illumination engine 31 or each array 40 in illumination engine 31 may be driven by respective driver circuitry 50.
Substrate 54 with integral driving circuitry 50 may sometimes be referred to as a driver 55, silicon driver 55, silicon driver die 55, semiconductor driver 55, semiconductor driver die 55, driver die 55, etc.
In one suitable arrangement that is described herein as an example, light sources 60 are LEDs (e.g., OLEDs, μLEDs, mini LEDs, other types of light-emitting diodes, etc.). Light sources 60 may therefore sometimes be referred to herein as LEDs 60. Each LED 60 in array 40 is mounted to the same surface of a substrate layer such as substrate layer 54. LEDs 60 may be arranged in a grid of rows and columns or in any other desired pattern on substrate layer 54.
Each LED 60 may include an anode formed by a p-type semiconductor layer and a cathode formed by an n-type semiconductor layer. In one possible arrangement, each LED may have first and second contact pads (e.g., for the anode and cathode, respectively) formed side-by-side on the substrate 54. The first and second contact pads may be controlled by driver circuitry 50. However, having side-by-side contact pads in this manner may limit the thermal performance of the array. Due to manufacturing tolerance (e.g., minimum gaps between the contact pads) required to avoid undesirably shorting adjacent contact pads, the contact pads may occupy less than 50% of the total surface area of the LED (e.g., when viewed from above in the negative Z-direction in
To improve the thermal performance of the LED and uniformity of light emitted from the LED, each LED may have vertically stacked anode and cathode contact pads. With this type of arrangement, the anode and cathode contact pads may have approximately the same footprint (occupying a high percentage of the total LED surface area). This improves thermal dissipation and, accordingly, the overall performance of array 40. Additionally, having an LED with a vertically stacked anode and cathode contact pads (sometimes referred to as a vertical LED) improves uniformity of light emitted from the LED (since the via through the LED in the side-by-side arrangement can be omitted).
Additional semiconductor layers may be formed on the LED substrate. As shown in
N-type semiconductor layer(s) 64 may ultimately serve as cathodes for the LEDs in array 40. The LED also includes one or more p-type semiconductor layer(s) 68 that ultimately serve as anodes for the LEDs in array 40. The p-type semiconductor layer(s) may include p-type doped gallium nitride (GaN) or any other desired material. The p-type semiconductor layer(s) 68 may be an epitaxial layer (e.g., formed using epitaxy-type crystal growth/material deposition). P-type semiconductor layer(s) 68 may sometimes be referred to herein as p-type epitaxial layer(s) 68, p-type layer(s) 68, etc.
Multi-quantum wells (MQW) such as MQW 66 may be formed at the interface between p-type layer 68 and n-type layer 64. MQW 66 ultimately forms the active light emitting area of LEDs 60. The MQW layer may include gallium nitride (GaN), gallium indium nitride (GaInN), aluminum gallium indium phosphide (AlGaInP), or any other desired materials. Multi-quantum wells 66 may sometimes be referred to as multi-quantum wells layer 66.
P-metal layers 70 and contact pad 72 may be formed over layers 64, 66, and 68. P-metal layers 70 may include one or more of a p-type ohmic contact layer, a mirror metal layer, a current spreading layer, etc. On the p-metal layers 70, a contact pad 72 is formed. Contact pad 72 may be configured to bond to a contact pad of a separate semiconductor substrate (e.g., substrate 50 in
After layers 64, 66, and 68 are formed on substrate 62, the layers may be etched or cut into a desired shape having desired dimensions (e.g., the dimensions of the array). This etching step be performed before or after one or more of layers 70 and 72 are deposited. A dielectric layer 74 may be formed at the edges of the diode formed by n-type layer 64, MQW layer 66, and p-type layer 68.
Next, as shown in
Next, as shown in
In the example of
As shown, even after the etching process, the p-type semiconductor layer of all the LEDs is attached to a common p-metal layer 70, contact pad 72, and contact pad 76. Contact pad 72 serves as the contact pad (sometimes referred to as anode electrode) for all the LEDs in the array. Driver die 55 provides a common anode voltage to all of the LEDs via contact pad 76, contact pad 72, and p-metal layer 70. The cathodes, meanwhile, are individually controllable. Driver die 55 may individually control the voltage applied to the n-type semiconductor layer of each LED. Having one shared electrode (e.g., a common anode in
A dielectric layer 78-1 is formed to fill the spaces between adjacent LEDs and around the edges of the array. The LEDs may each be laterally surrounded (e.g., in the XY-plane) by portions of dielectric layer 78-1. Respective portions of dielectric layer 78-1 may be interposed between adjacent LEDs 60-1 and 60-2, between adjacent LEDs 60-2 and 60-3, and between adjacent LEDs 60-3 and 60-4.
Vias 80 (sometimes referred to as conductive vias 80, metal vias 80, etc.) and metal interconnect routing lines 82 (sometimes referred to as conductive interconnect routing lines 82, signal lines 82, etc.) may electrically connect contact pads 84 on driver die 55 (sometimes referred to as driver pads 84) to contact pads 86 on n-type semiconductor layers 64 (sometimes referred to as LED contact pads 86, electrode pads 86, etc.). Contact pads 72, 76, 84, and 86 as well as signal lines 82 and vias 80 may all be formed from a conductive material such as a metal material.
Contact pads 86 are used to provide a signal to n-type semiconductor layer 64 and therefore may sometimes be referred to as n contact pads, n-type contact pads, n-terminal contact pads, etc. Contact pad 72 is used to provide a signal to p-type semiconductor layer 68 and therefore may sometimes be referred to as p contact pad, p-type contact pad, p-terminal contact pad, etc.
In some arrangements, all the metal interconnect routing lines 82 may be formed on the upper surface of dielectric layer 78-1. However, this may cause crowding of the routing lines as there is a limited surface area on the upper surface of dielectric layer 78-1 on which to route lines between all the LEDs and the periphery of the array (where the routing lines are connected to driver pads 84 by vias). To alleviate crowding of the routing lines, an additional dielectric layer 78-2 may be included over dielectric layer 78-1. Some of the metal interconnect routing lines 82 (sometimes referred to as signal lines 82) may be routed on the upper surface of dielectric layer 78-2 while some of the metal interconnect routing lines 82 may be routed on the upper surface of dielectric layer 78-1. In this type of arrangement, a signal line for a first LED (e.g., on dielectric layer 78-2) may directly overlap a signal line for a second, different LED (e.g., on dielectric layer 78-1). This type of arrangement increases the amount of surface area available for routing, which alleviates crowding of the signal lines.
The LED array may include any desired number of LEDs. There may be more than one total LED, more than 2 total LEDs, more than 4 total LEDs, more than 9 total LEDs, more than 16 total LEDs, more than 25 total LEDs, more than 60 total LEDs, more than 64 total LEDs, more than 100 total LEDs, more than 1,000 total LEDs, less than 100 total LEDs, less than 75 total LEDs, etc. The LEDs may be arranged in any desired number of rows and columns (e.g., a square array, a non-square array, etc.).
In the example of
In an alternative arrangement, an LED array may be formed with vertical LEDs that have a common cathode and individually controllable anodes. The individually controllable anodes may be interposed between the driver die and the common cathode. This greatly simplifies the routing scheme for the array. Because the individually controllable anodes are attached directly to the driver die, there is no need to fit routing lines for each individually controllable electrode as in
As shown in
After the etching, dielectric layer 74 is formed around the light sources. Then, p-metal layers 70 and contact pads 72 are formed over each light source. Each light source has a respective p-metal layer 70 and a respective p contact pad 72.
Importantly, the individual diodes in
This is in contrast to
Next, as shown in
Next, as shown in
The electrode pad 86 may be formed as a continuous mesh (e.g., that overlaps the spaces between adjacent LEDs so as to not overlap the LEDs and decrease transmittance of light). An additional current spreading layer 88 may optionally be formed between the n-type semiconductor layer 64 and electrode pad 86. The current spreading layer 88 may be formed from a conductive material such as indium tin oxide (ITO) and may have a high transparency (e.g., greater than 90%, greater than 95%, greater than 99%, etc.).
The metal mesh 86 is electrically connected to one or more driver contact pads 84. Although not explicitly shown in
It should be noted that in either the embodiments of
Additionally, the relative positioning of the cathode and anode are merely illustrative. In general, the positions of the cathode and anode in any given embodiment may be switched. For example, in
In one possible arrangement, shown in
In another possible arrangement, shown in
Since arrays 40A and 40C do not have a dedicated driver die, the LEDs may be formed on a dummy substrate 90. Array 40A includes LEDs 60A on dummy substrate 90A while array 40C includes LEDs 60C on dummy substrate 90B. The dummy substrate may be formed from glass, silicon, or another desired dielectric material. The dummy substrate does not include driving circuitry. Instead, a flexible printed circuit board (sometimes referred to as flexible printed circuit) connects metal contacts and routing layers on the dummy substrate to driver circuitry 50 in semiconductor substrate 54.
As shown, a first flexible printed circuit board 92A electrically connects driver circuitry 50 in semiconductor substrate 54 (of array 40B) to metal contacts and routing layers on dummy substrate 90A. A second flexible printed circuit board 92B electrically connects driver circuitry 50 in semiconductor substrate 54 to metal contacts and routing layers on dummy substrate 90B. In this way, driver circuitry 50 can drive the LEDs of arrays 40A, 40B, and 40C.
In the embodiments of
As shown in
Incorporating multiple colors of LEDs in a single array may allow for the prism (optical combiner) to be omitted from illumination engine 31.
Because multiple colors are emitted from the array, the optical combiner 42 of
In accordance with an embodiment, a display system is provided that includes an array of light-emitting diodes configured to emit light in a first direction; and a driver die with driver circuitry that controls the array of light-emitting diodes, the array of light-emitting diodes are mounted on the driver die, each light-emitting diode includes an n-type semiconductor layer and a p-type semiconductor layer, each light-emitting diode includes a respective contact pad for a selected one of the n-type semiconductor layer and a p-type semiconductor layer, the array of light-emitting diodes share a common contact pad for a remaining one of the n-type semiconductor layer and a p-type semiconductor layer, and the common contact pad overlaps the respective contact pads in the first direction.
In accordance with another embodiment, each respective contact pad is electrically connected to the n-type semiconductor layer for that light-emitting diode and the array of light-emitting diodes shares a common contact pad for the p-type semiconductor layer.
In accordance with another embodiment, each respective contact pad is electrically connected to the p-type semiconductor layer for that light-emitting diode and the array of light-emitting diodes shares a common contact pad for the n-type semiconductor layer.
In accordance with another embodiment, the common contact pad is interposed between the driver die and the respective contact pads.
In accordance with another embodiment, the display system includes a first dielectric layer formed over the driver die that has portions that laterally surround the light-emitting diodes in the array.
In accordance with another embodiment, the display system includes conductive routing lines on an upper surface of the first dielectric layer; and conductive vias, the conductive vias and the conductive routing lines electrically connect at least some of the respective contact pads to the driver die.
In accordance with another embodiment, the conductive vias are formed at a periphery of the array of light-emitting diodes.
In accordance with another embodiment, the display includes a second dielectric layer that is formed over the first dielectric layer; additional conductive routing lines on an upper surface of the second dielectric layer; and additional conductive vias that extend through the first and second dielectric layers.
In accordance with another embodiment, at least one of the additional conductive routing lines directly overlaps one of the conductive routing lines in the first direction.
In accordance with another embodiment, the respective contact pads are interposed between the driver die and the common contact pad.
In accordance with another embodiment, the display system includes a current spreading layer that is electrically connected to the common contact pad, the current spreading layer is formed from indium tin oxide.
In accordance with another embodiment, the common contact pad is formed as a mesh over the array of light-emitting diodes.
In accordance with another embodiment, the array of light-emitting diodes has at least a first subset of light-emitting diodes that emits light at a first wavelength and a second subset of light-emitting diodes that emits light at a second wavelength that is different than the first wavelength.
In accordance with an embodiment, a display system is provided that includes a display panel configured to produce image light by modulating illumination light; and an illumination engine configured to generate the illumination light, the illumination engine includes a first array of light-emitting diodes that emit light at a first wavelength, the first array of light-emitting diodes is mounted on a driver die and is controlled by driver circuitry in the driver die; a second array of light-emitting diodes that emit light at a second wavelength that is different than the first wavelength, the second array of light-emitting diodes is mounted on a first substrate and is controlled by the driver circuitry in the driver die; a third array of light-emitting diodes that emit light at a third wavelength that is different than the first and second wavelengths, the third array of light-emitting diodes is mounted on a second substrate and is controlled by the driver circuitry in the driver die; and an optical combiner that is configured to combine the light from the first, second, and third arrays into the illumination light.
In accordance with another embodiment, the illumination engine includes a first flexible printed circuit that electrically connects the second array of light-emitting diodes on the first substrate to the driver circuitry in the driver die.
In accordance with another embodiment, the illumination engine includes a second flexible printed circuit that electrically connects the third array of light-emitting diodes on the second substrate to the driver circuitry in the driver die.
In accordance with another embodiment, the first and second substrates are dummy substrates that do not include driver circuitry.
In accordance with another embodiment, the first and second substrates are glass substrates.
In accordance with an embodiment, a display system is provided that includes an array of light-emitting diodes configured to emit illumination light; and a substrate with driver circuitry that controls the array of light-emitting diodes, the array of light-emitting diodes are mounted on the substrate, each light-emitting diode includes an n-type semiconductor layer and a p-type semiconductor layer, each light-emitting diode includes an respective p contact pad that electrically connects the p-type semiconductor layer for that light-emitting diode to the driver circuitry, the array of light-emitting diodes share a common n contact pad that electrically connects the n-type semiconductor layer for each light-emitting diode to the driver circuitry, and the p contact pads are interposed between the substrate and the n contact pad.
In accordance with another embodiment, each light-emitting diode additionally includes a multi-quantum wells layer that is interposed between the n-type semiconductor layer and the p-type semiconductor layer for that light-emitting diode.
The foregoing is merely illustrative and various modifications can be made to the described embodiments. The foregoing embodiments may be implemented individually or in any combination.
This application claims priority to U.S. provisional patent application No. 63/172,026, filed Apr. 7, 2021, which is hereby incorporated by reference herein in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/US2022/019081 | 3/7/2022 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 63172026 | Apr 2021 | US |
