Patent Application
20220076610
The present invention relates to a display and a method of driving a display.
Displays are ubiquitous and are a core component of every wearable device, smart phone, tablet, laptop, desktop, TV or display system. Common display technologies today range from Liquid Crystal Displays (LCDs) to more recent Organic Light Emitting Diode (OLED) displays. The type of displays are distinguished by the way light is either controlled or emitted. In some cases, there is a light control element, like liquid crystal molecules or a MEMs device, that acts as a light switch which is controlled by current or voltage, whereas in other cases, there is a light emitting device, such as an LED that emits light when it is biased by current or voltage.
WO2013/121051 discloses an improved light emitting device, referred to as an integrated or inorganic LED (iLED) which comprises a substrate with a semiconductor material comprising a light generating layer positioned on the substrate. The semiconductor material and/or the substrate are configured to control light internally to output quasi-collimated light from a light emitting surface of the iLED. The iLED comprises an optical component positioned at the light emitting surface and configured to receive quasi-collimated light exiting the light emitting surface and to alter one or more optical properties of at least some of the quasi-collimated light.
For any display, regardless of its particular light emitting device, the smallest light element of the display is referred to as a pixel and these are typically arranged in a matrix of rows and columns. In order to produce images, display pixels have to be programmed for predetermined time periods called frames. The most common way of programming a display is the row-by-row method. Here, every row of pixels is addressed sequentially and the pixels of the row are simultaneously programmed in parallel.
Display addressing circuitry can comprise either passive or active matrix. Active matrix circuitry, for example, as described in WO2010/119113, uses thin film transistor technology (TFT), where transistors based on amorphous, oxide or polycrystalline silicon technology are manufactured on glass panels of different dimensions and are used either as voltage switches or current sources to control the operation of light emitting devices. Passive matrix circuitry implies that addressing signals are delivered directly to the light emitting devices without any other control.
Initially, both active and passive addressing matrices used an analog approach where a pixel's brightness was based on the level of the applied bias voltage or the current. For example, if an 8-bit gray-scale were being employed, pixels would be biased with one or 256 different voltage or current values during a frame. The analog approach is solid and accurate, however, increased performance demands have led to move from the analog approach to a digital one.
According to the digital approach, pixel brightness is no longer controlled by the voltage/current level, but according to the time duration of light emitted from a pixel. Thus, a frame is divided into a specific number of time slots called sub-frames. During any given sub-frame, a pixel is either switched ON (and emitting light) or OFF. Referring to FIG. 1, if for example, 8-bit gray-scale is desired, each frame is divided into 8 sub-frames, each with a different time duration. The sub-frame with the longest duration represents the Most Significant Bit (MSB) and the sub-frame with the shortest duration represents the Least Significant Bit (LSB) of a pixel value for the frame. Therefore, instead of programming the brightness by the bias voltage/current level, brightness is controlled by the integral of the ON pulse duration during a sub-frame. The advantage of using the digital approach is that the ON voltage/current level remains the same for all frames and sub-frames and can be set to the optimum operating value for the light emitting device, whereas using the analog approach requires light emitting devices which can perform across a range of operating values.
The most common digital driving methods are Pulse Width Modulation (PWM), for example, as described in WO2010/014991, and colour sequential, for example, as described in WO2014/012247. The difference between PWM and color sequential is that in the case of the PWM, all 3 colors (red, green, blue) of light emitting devices emit light simultaneously during one sub-frame while for color sequential, each sub-frame is further divided into red, green and blue periods meaning that for a given sub-frame duration only red light emitting devices over the whole panel emit light, then only green and finally only blue light emitting devices. So whereas one approach to implementing PWM is for rows of a matrix to comprise a mix of red, green and blue pixels and for these to be simultaneously activated when programmed; whereas for colour sequential, each row of a matrix might only comprise either red, green or blue sub-pixels. The difference results in the colour sequential scheme requiring at least three times the switching frequency than for PWM, since during the same sub-frame, it has to switch three times, once for each colour.
Both digital driving methods suffer from different visual artefacts caused by the switching of emitted light, the most common one being termed ‘flicker noise’. In some cases, special driving algorithms can be used to mitigate these problems, but in general it is preferable to increase the frequency of the digital driving pulses so that the switching cannot be observed by a viewer.
However, the pulse frequency is limited by the pixel circuit design and its propagation delay. As the complexity of the pixel design increases, more components can result in higher propagation delays for the digital pulses since the pulses have to charge and discharge or activate more components.
Typically frames are refreshed at frequencies of at least 50-60 Hz, but in the future for high performance displays this could increase to 600 Hz and beyond, reducing frame time significantly and so increasing the switching demands for display addressing circuitry. Thus, as performance demands for displays increase, for example, to allow for increased frame refresh rate, optimization of addressing methods becomes a necessity.
According to a first aspect, the present invention provides a display according to claim 1.
In embodiments, analog and digital sub-frames are employed to determine pixel brightness during a frame. Here, an analog approach is employed for the Least Significant Bits (LSB) and a digital approach for the Most Significant Bits (MSB).
It is appreciated that switching some light emitting devices using on/off pulses can increase the performance demand on the device and cause failure or it can lead to unwanted visible artefacts. In some embodiments, rather than an on/off pulse, a stepped waveform with multiple intermedia voltage levels is applied to pixels, during both analog and/or digital sub-frames, both to reduce power and to smooth transition from the perspective of a viewer.
Some embodiments comprise an active matrix of inorganic LED (iLED) devices.
In some embodiments, control pulses are applied directly to the light emitting device and in some cases applied directly from a driver to the light emitting devices.
Some embodiments operate by applying a control pulse at the cathode of the light emitting device instead at a high power supply side of a pixel.
According to a second aspect, the present invention provides a display according to claim 17.
Various embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
Referring now to
A plurality of peripheral driving blocks comprise:
Scan driver—which produces the pulses enabling respective rows of the matrix to be programmed for a subsequent sub-frame;
DATA driver—which delivers both variable level outputs to program individuals cells of a row enabled by the scan driver; and
PWM Driver—which produces the PWM pulses used to bias programmed cells enabling the cells to emit light or not according to their programming. (Note that the term “PWM” is used in the present description to relate to pulsed signals for activating cells within a row—such pulses may be employed as part of a conventional PWM addressing scheme or a color sequential scheme.)
Two synchronization blocks are employed: one located between the scan driver and DATA driver in order to ensure that the required data signals are delivered after a scan pulse is applied to a row; and a second between the DATA and PWM drivers to ensure that PWM pulses are applied when data loading is completed.
Each row within the matrix is addressed with a respective scan line S1 . . . Sn which goes high or is asserted when a respective row of the display is to be addressed (or programmed) by the DATA driver for the subsequent sub-frame. During a given frame for each row, the PWM driver provides a sequence of driving pulses using respective PWM signals P1 . . . Pn. Each signal P can be a time shifted version of the adjacent PWM signal synchronized with the scan line signals S1 . . . Sn and DATA driver signals D1 . . . Dm.
In embodiments of the present invention, the DATA driver provides programming signals D1 . . . Dm for each pixel of the display—these signals are updated for each sub-frame from scan line to scan line.
Referring briefly to
In each case, the scan line for the row and the data line for the cell are connected to a thin-film transistor T1. When a given row is selected by asserting the associated scan line signal, T1 is switched on and the data line signal is used either to charge or discharge a charge storage capacitor Cst shunt-connected between T1 and the gate of the transistor T2 to program a required charge for the subsequent sub-frame. In some embodiments, such as
Conventionally, the values for each data signal D1 . . . Dm are digital in that they are either high or low, (“0” or “1”, asserted or not) switching on a pixel for a subsequent sub-frame when the scan line signal S and the PWM signal P for a pixel are asserted and the value for D is high and switching off the pixel, if during the same period, the value for D is low.
In some embodiments of the present invention, a digital driving method is combined with an analog approach not alone to potentially reduce the time required for a frame, but also to reduce the maximum switching frequency required to program pixels for a frame. In this case, values for D1 . . . Dm can be set not only high or low, but also to intermediate values.
Referring now to
In the example of
In the example of
These levels provide a sufficient level of charge to Cst to partially or fully switch on both T2 and the iLED during the analog 1st sub-frame (or to switch off T2 for gray level 0) and so provide the finer adjustment of the brightness of the iLED during the frame as a whole.
Using the approach of
Other combinations of analog and data sub-frames are also possible.
In either case, it will be seen that the matrix only operates in analog mode for a small proportion of its operating cycle, i.e. 4 or 8 emission cycles of 256 cycles and so this provides satisfactory device durability.
It will be appreciated that using the architecture of
Referring back to
In other embodiments, such as
The advantage of this approach is that the voltage swing for the PWM pulse can now be reduced compared to the pulses used in the matrix of
To further reduce the power consumption, instead of a digital two-level voltage swing for the PWM signals, a stepped multi-voltage level PWM pulse can be applied as shown in
The main advantage of the voltage stepping pulse is lower power consumption (theoretically it can reach −33%) because the extent of the PWM pulse swing is reduced.
Furthermore, the transition of the iLED from the ON to the OFF state will be smoother, so reducing visual artefacts. The number of the intermedia voltage levels (Vint1 . . . Vint3) and their time duration is determined based on the display's specifications and the required performance as well as the mixed mode pulse waveform. Again, these intermediate voltages can either be provided by DACs incorporated with the PWM driver or through providing fixed reference voltage lines and multiplexors for selecting those lines as required within the PWM driver.
The above embodiments have been described with successively longer sub-frames within any given frame. However, it will be appreciated that sub-frames need not be ordered as such and can be mixed to avoid visual aliasing artefacts.
It will also been seen that embodiments of the invention can comprise more than 1 analog sub-frame.
| Number | Date | Country | Kind |
|---|---|---|---|
| 1604699.7 | Mar 2016 | GB | national |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 15458832 | Mar 2017 | US |
| Child | 17527036 | US |
