Patent Grant
11515850
This patent application is a national phase filing under section 371 of PCT/JP2019/021793, filed May 31, 2019, which claims the priority of Japanese patent application no. 2018-165110, filed Sep. 4, 2018, each of which is incorporated herein by reference in its entirety.
The present invention relates to a distributed amplifier in which amplifiers configured with cascode stages are connected in parallel between an input side transmission line and an output side transmission line.
Broadband amplifiers are desired in various systems such as high-speed communication and high-resolution radar, and one example is a distributed amplifier. A distributed amplifier enables broadband signal amplification by incorporating a parasitic capacitance of a transistor into transmission lines of input and output sides to perform matching and matching propagation constants of the transmission lines between the input and output sides.
Conventionally, in order to further increase a band of a distributed amplifier, a configuration in which a cascode stage is used as an amplifier has been proposed (for example, see Non Patent Literature 1).
Generally, a cascode stage (a cascode circuit) is a circuit configuration in which two transistors of an upper stage and a lower stage that operate in a saturation region are longitudinally stacked, the upper stage is configured with a base (gate) grounded amplification circuit, and the lower stage is configured with an emitter (source) grounded amplification circuit.
The amplifier An (n=1, 2, 3, . . . , N) in
A bias potential Vb1 is applied to the base terminal of Q1 via a resistance element R1. Further, a bias potential Vb2 generated by a bias circuit B is applied to a base terminal of Q2. The bias circuit B includes resistance elements R2 and R3 (bleeder resistances) connected in series between the negative potential VEE and a ground potential GND (0 V), and a capacitive element C2 connected in parallel to R3 on the GND side. Vb2 obtained by performing resistance division with R2 and R3 is applied to the base terminal of Q2. C2 has a function of stabilizing Vb2.
[NPL 1] Chen, Jiashu, and Ali M. Niknejad, “Design and analysis of a stage-scaled distributed power amplifier,” IEEE Transactions on Microwave Theory and Techniques, VOL. 59.5, pp. 1274-1283, MAY 2011.
According to the conventional distributed amplifier described above, by using the cascode stage as the amplifier, influence of the Miller capacitance between the collector and the base of the input transistor is reduced so that wider band amplification can be obtained. However, there is a problem that a gain on a high frequency side decreases due to an increase in transmission line loss on the high frequency side of an operating signal frequency band, an increase in phase difference between signals propagating through input and output lines, etc. For that reason, it is difficult to realize a wider band amplifier.
Embodiments of the present invention are intended to solve such a problem, and an object of embodiments of the present invention is to provide a distributed amplifier in which a gain reduction on a high frequency side can be compensated for.
In order to achieve such an object, a distributed amplifier according to embodiments of the present invention includes an input side transmission line configured to transmit an input signal that is an amplification target, an output side transmission line configured to transmit an output signal obtained by amplifying the input signal, and a plurality of amplifiers configured with cascode stages, which are connected in parallel between the input side transmission line and the output side transmission line, in which the amplifier includes an input transistor and an output transistor which are cascode-connected to each other, a transmission line or an inductor connected to a base terminal of the output transistor, and a bias circuit configured to apply a bias potential to the base terminal of the output transistor via the transmission line.
According to embodiments of the present invention, on a high frequency side of an operating signal frequency band, impedance of the transmission line connected to the output transistor of the amplifier increases, and positive feedback is applied from an emitter terminal of the output transistor to a collector terminal thereof. For this reason, a peaking effect is obtained on the high frequency side of the operating signal frequency band, and as a result, a gain reduction on the high frequency side can be compensated for. Therefore, a wider band distributed amplifier can be realized.
Next, embodiments of the present invention will be described with reference to the drawings.
First, a distributed amplifier 10 according to a first embodiment of the present invention will be described with reference to
As shown in
The distributed amplifier 10 according to the present embodiment is different from the conventional distributed amplifier 50 of
The input side transmission line W1 is a line for transmitting an input signal that is an amplification target, and has an input terminal Vin of the distributed amplifier 10 at one end thereof and a port resistance RP1 (=50Ω) is connected to the other end. The output side transmission line W2 is a line for transmitting an output signal obtained by amplifying the input signal, and has an output terminal Vout of the distributed amplifier 10 at one end thereof, and a port resistance RP2 (=50Ω) is connected to the other end.
The amplifier An includes an input transistor Q1 and an output transistor Q2 which are cascode-connected to each other, the transmission line WA connected to an input terminal (a base terminal) of output transistor Q2, and the bias circuit B which applies a bias potential to the input terminal of output transistor Q2 via the transmission line WA.
Generally, a cascode stage (a cascode circuit) is a circuit configuration in which two transistors of an upper stage and a lower stage that operate in a saturation region are longitudinally stacked, the upper stage is configured with an emitter (source) grounded amplification circuit, and the lower stage is configured with a base (gate) grounded amplification circuit.
The amplifier An of
A bias potential Vb1 is applied to the base terminal of input transistor Q1 via a resistance element R1. A bias potential Vb2 generated by the bias circuit B is applied to the base terminal of output transistor Q2 via the transmission line WA. The bias circuit B includes resistance elements R2 and R3 (bleeder resistances) connected in series between the negative potential VEE and a ground potential GND (o V), and a capacitive element C2 connected in parallel to resistance element R3 on the GND side. The bias potential Vb2 obtained by performing resistance division with resistance elements R2 and R3 is applied to the base terminal of the output transistor Q2. The capacitive element C2 has a function of stabilizing the bias potential Vb2.
The transmission line WA is configured as a planar waveguide (high-frequency transmission line), such as a coplanar waveguide calculator (CWP), which is formed of a conductor film formed on a dielectric substrate used in an integrated circuit.
In addition, although a case in which NPN type bipolar transistors are used for transistors Q1 and Q2 will be described as an example in the present embodiment, the present invention is not limited thereto. For example, PNP type bipolar transistors may be used for transistors Q1 and Q2. Further, field effect transistors such as N-MOS and P-MOS may be used for transistors Q1 and Q2 instead of the bipolar transistors.
Next, an operation of the distributed amplifier 10 according to the present embodiment will be described with reference to
In the amplifier An, an input signal Sin from the input side transmission line W1 input to the input terminal Vic is applied to the base terminal of the input transistor Q1 after a DC potential is cut off by the capacitive element C1. The bias potential Vb1 is applied to the base terminal of input transistor Q1 via the resistance element R1, and the bias potential Vb2 generated by the bias circuit B is applied to the base terminal of the output transistor Q2.
As a result, since the base potential of output transistor Q2 is constant, an emitter potential of output transistor Q2 is also substantially constant. For this reason, input signal Sin is amplified by input transistor Q1 and then converted into an emitter current of output transistor Q2 and becomes a collector current of output transistor Q2, which is output from an output terminal Vio to the output side transmission line W2. In this case, since input transistor Q1 is a grounded-emitter amplifier circuit, a Miller effect occurs in which a parasitic capacitance Cbc between the base and the collector of input transistor Q1 is amplified by a gain of input transistor Q1. Since a load of input transistor Q1 serves as the emitter terminal of output transistor Q2 and a collector current of input transistor Q1 and the emitter current of output transistor Q2 are equal, the gain of input transistor Q1 becomes 1, and the Miller effect is greatly inhibited.
On the other hand, the transmission line WA connected between the bias circuit B and the base terminal of output transistor Q2 is configured as a planar waveguide such as a coplanar waveguide calculator, and has frequency characteristics in which impedance increases on a high frequency side of an operating signal frequency band.
For this reason, ground impedance of output transistor Q2 becomes relatively high on the high frequency side, and positive feedback is applied from the emitter terminal of output transistor Q2 to the collector terminal. This positive feedback is performed via the parasitic capacitance Cbc between the base and the collector and a parasitic capacitance Cbe between the base and the emitter of output transistor Q2, as shown in
Therefore, a peaking effect can be obtained on the high frequency side of the operating signal frequency band, and as a result, a gain reduction on the high frequency side can be compensated for. Thus, a wider band distributed amplifier 10 can be realized.
Next, simulation results of the frequency characteristic of the distributed amplifier 10 according to the present embodiment will be described with reference to
In
In the simulation, six amplifiers An were connected in parallel, and the coplanar waveguide calculator CWP shown in
In the characteristics P and PA, a DC gain is 10 dB. For this reason, a −3 dB band (7 dB) is 168 GHz for the characteristic P and 255 GHz for the characteristic PA. Therefore, according to the present embodiment, it is understood that the frequency characteristic can be greatly widened over about 50% as compared with the conventional configuration.
As described above, the present embodiment is configured such that the plurality of amplifiers A1, A2, A3, . . . , and AN configured with cascode stages, which are connected in parallel between the input side transmission line W1 and the output side transmission line W2, are provided, the transmission line WA is connected to the input terminal (base terminal) of the output transistor Q2 of each of the amplifiers An, and the bias potential Vb2 is applied from the bias circuit B to the input terminal of the output transistor Q2 via the transmission line WA.
With this, the impedance of the transmission line WA increases on the high frequency side of the operating signal frequency band, and positive feedback is applied from the emitter terminal to the collector terminal of output transistor Q2 via the parasitic capacitance Cbc between the base and collector of output transistor Q2 and the parasitic capacitance Cbe between the base and emitter. For this reason, a peaking effect is obtained on the high frequency side of the operating signal frequency band, and as a result, a gain reduction on the high frequency side can be compensated for. Therefore, a wider band distributed amplifier 10 can be realized.
Further, in the present embodiment, the planar waveguide, specifically, the coplanar waveguide calculator may be used for the transmission line WA. As a result, the WA having stable characteristics can be easily formed on the dielectric substrate of the integrated circuit included in the amplifier An.
Further, in the present embodiment, an equivalent inductance value realized by the transmission line WA may be set within a range of 20 pH to 25 pH. As a result, as shown in
Next, a distributed amplifier 10 according to a second embodiment of the present invention will be described with reference to
In the first embodiment, the case in which the planar waveguide such as the CPW is used for the transmission line WA of the amplifier An has been described as an example. In the present embodiment, a case in which an inductor LA is used for the transistor line WA will be described.
As shown in
The inductor LA may be a general high frequency coil, a so-called plane coil in which a signal conductor formed on a surface of a dielectric substrate used in an integrated circuit is formed in a spiral shape, or a distributed constant line having a narrow line width for a short distance. Other configurations according to the present embodiment are similar to those of the first embodiment, and detailed descriptions thereof will be omitted here.
Next, an operation of the distributed amplifier 10 according to the present embodiment will be described with reference to
The inductor LA connected between the bias circuit B and the base terminal of output transistor Q2 is configured as a high frequency waveguide such as a coplanar waveguide calculator, and has a frequency characteristic in which impedance increases on the high frequency side of the operating signal frequency band.
For this reason, the ground impedance of output transistor Q2 becomes relatively high on the high frequency side, and positive feedback is applied from the emitter terminal of output transistor Q2 to the collector terminal. This positive feedback is performed via the parasitic capacitance Cbc between the base and the collector of output transistor Q2 and the parasitic capacitance Cbe between the base and the emitter of output transistor Q2, as shown in
Therefore, a peaking effect can be obtained on the high frequency side of the operating signal frequency band, and as a result, a gain reduction on the high frequency side can be compensated for. As a result, a wider band distributed amplifier 10 can be realized.
Next, simulation results of a frequency characteristic of the distributed amplifier 10 according to the present embodiment will be described with reference to
In
In the simulation, six amplifiers An were connected in parallel and the inductor LA having an inductance value La=25.0 pH was used.
In the characteristics P and PB, the DC gain is 10 dB. For this reason, the −3 dB band (7 dB) is 168 GHz for the characteristic P and 287 GHz for the characteristic PB. Therefore, according to the present embodiment, it is understood that the frequency characteristic can be greatly widened over about 70% as compared with the conventional configuration.
In the case of La=15.0 pH, as shown in the characteristic P1, since the peaking effect due to the positive feedback of output transistor Q2 is small, it deviates from the −3 dB band around a portion exceeding 200 GHz, and a rise in a pass characteristic on the high frequency side of the operating signal frequency band is not sufficient. On the other hand, in the case of La=30.0 pH, as shown in the characteristic P4, since the peaking effect is too large, oscillation may occur on the high frequency side, which is not desirable.
For this reason, as shown by the characteristics P2 and P3, it can be seen that, at La=20.0 pH to 25.0 pH, stable and favorable frequency characteristics with the −3 dB band extended to the high frequency side can be obtained.
Further, the optimum range of the inductance value La=20.0 pH to 25.0 pH shown in
As described above, the present embodiment is configured such that the inductor LA is used for the transmission line WA.
For this reason, as compared with the transmission line WA including the planar waveguide such as CPW, stable and favorable frequency characteristics in which the −3 dB band is extended to the high frequency side can be obtained, and as a result, a gain reduction on the high frequency side can be compensated for. Therefore, a wider band distributed amplifier 10 can be realized.
Further, by selecting the inductor LA and the inductance value La of the transmission line WA from the range of 20.0 pH to 25.0 pH, stable and favorable frequency characteristics with the −3 dB band extended to the high frequency side can be obtained.
Next, a distributed amplifier 10 according to a third embodiment of the present invention will be described.
In the first embodiment, the case in which the CPW is used for the transmission line WA of the amplifier An has been described as an example. In the present embodiment, a case in which a microstrip line is used for the transmission line WA will be described.
Other configurations according to the present embodiment are the same as those of the first embodiment, and detailed descriptions thereof will be omitted here. Further, an operation and simulation results in a case in which the microstrip line is used for the transmission line WA are the same as those in the first embodiment, and detailed descriptions thereof will be omitted here.
As described above, the present embodiment is configured such that the microstrip line is used for the transmission line WA.
As a result, the same operational effects as when CWP is used can be obtained. Further, in the case of CWP, a layout of a ground (ground potential) may be complicated. However, in the case of the microstrip line, since the ground conductor 31 is provided, the layout of the ground (ground potential) becomes easy.
Although the transmission line or the inductor is added to the base terminal of the output transistor Q2 in the first embodiment, a sufficient wider bandwidth cannot be obtained with only one transmission line or inductor added to the base terminal in some cases. In a fourth embodiment, in order to obtain a still wider band, as shown in
In order to show effects of the present embodiment, a characteristic simulation was performed using a small signal equivalent circuit obtained by simplifying the unit cell shown in
In the distributed amplifier according to the fourth embodiment, a frequency characteristic (in particular, a peaking frequency) after it has been manufactured may be different from that when it was designed due to variations in manufacturing process or the like. It is desirable to have a configuration in which the frequency characteristic such as the peaking frequency can be adjusted after it has been manufactured. In a fifth embodiment, as shown in
Further, as a configuration with which the frequency characteristic such as the peaking frequency can be adjusted, by changing the voltage (Vbcas) of the base terminal of the output transistor Q2 of the cascode stage (that is, the bias potential of the bias circuit) as shown in
In a sixth embodiment, in addition to the configuration of
By making a resistance value of the degeneration resistor, the capacitance of the capacitor, or both, variable, and combining them with the adjusting mechanism of
Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments. Various modifications that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention. In addition, the respective embodiments can be implemented in any combination as long as there is no contradiction. For example, at least one of the configuration of the variable capacitor and the configuration of changing the bias potential of the bias circuit in the fifth embodiment may be applied to the configuration of the first embodiment or the configuration of connecting the parallel circuit of the resistor and the capacitor to the input stage of the cascode stage in the sixth embodiment may be applied to the configurations of the first embodiment and the fourth embodiment.
10 Distributed amplifier
W1 Input side transmission line
W2 Output side transmission line
A1, A2, A3, AN, An Amplifier
Q1 Input transistor
Q2 Output transistor
B Bias circuit
WA Transmission line
LA Inductor
| Number | Date | Country | Kind |
|---|---|---|---|
| JP2018-165110 | Sep 2018 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2019/021793 | 5/31/2019 | WO |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2020/049813 | 3/12/2020 | WO | A |
| Number | Name | Date | Kind |
|---|---|---|---|
| 6864750 | Shigematsu | Mar 2005 | B2 |
| 20030011436 | Shigematsu | Jan 2003 | A1 |
| 20090009253 | Shigematsu | Jan 2009 | A1 |
| Number | Date | Country |
|---|---|---|
| H05304428 | Nov 1993 | JP |
| 2003092523 | Mar 2003 | JP |
| 200641936 | Feb 2006 | JP |
| 2014175675 | Sep 2014 | JP |
| 2007108103 | Sep 2007 | WO |
| Entry |
|---|
| J. Chen, et al., “Design and Analysis of a Stage-Scaled Distributed Power Amplifier,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, No. 5, May 2011, 10 pages. |
| Number | Date | Country | |
|---|---|---|---|
| 20210257979 A1 | Aug 2021 | US |
