DMA transfer apparatus

Abstract

To lighten the load on a processor in DMA transfer, a DMA transfer apparatus 13 for executing DMA transfer between local memory 16 that each processor has and global memory 15 shared by the processors, wherein a DMA transfer termination notification is issued to the destination determined by referencing a table 14 for managing destinations to which a notification of DMA transfer termination is to be sent.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIG. 1 is a block diagram to show the configuration of a multiprocessor system incorporating the invention;

FIG. 2 is a drawing to show a management table;

FIG. 3 is a chart to show a DMA transfer sequence;

FIG. 4 is a chart to show a DMA transfer sequence;

FIG. 5 is a chart to show a DMA transfer sequence;

FIG. 6 is a chart to show a DMA transfer sequence;

FIG. 7 is a drawing to show the structure of stream data;

FIG. 8 is a drawing to show memory-to-memory data copy;

FIG. 9 is a chart to show a DMA transfer sequence in a related art; and

FIG. 10 is a chart to show a sequence of executing DMA transfer more than once.

Claims

1. A DMA transfer apparatus for executing DMA transfer between local memory that each processor has and global memory shared by the processors, said DMA transfer apparatus comprising: a table for managing destinations to which a notification of DMA transfer termination is to be sent; anda controller for issuing a DMA transfer termination notification to the destination determined by referencing said table.

2. The DMA transfer apparatus as claimed in claim 1 wherein said table manages the timing at which a notification of DMA transfer termination is to be sent, and wherein said controller issues a DMA transfer termination notification at the timing determined by referencing said table.

3. The DMA transfer apparatus as claimed in claim 2 wherein said table manages the timing defined as the number of untransferred data pieces or the number of already transferred data pieces.

4. The DMA transfer apparatus as claimed in claim 1 wherein said table manages a slave processor as the destination to which a notification of DMA transfer termination is to be sent.

5. The DMA transfer apparatus as claimed in claim 1 wherein said table manages said table as the destination to which a notification of DMA transfer termination is to be sent.